Mercurial > repos > blastem
annotate vdp.c @ 327:1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
| author | Mike Pavone <pavone@retrodev.com> |
|---|---|
| date | Mon, 13 May 2013 21:06:08 -0700 |
| parents | 8c01b4154480 |
| children | bf7ed23efa40 |
| rev | line source |
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1 #include "vdp.h" |
| 75 | 2 #include "blastem.h" |
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3 #include <stdlib.h> |
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4 #include <string.h> |
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5 |
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6 #define NTSC_ACTIVE 225 |
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7 #define PAL_ACTIVE 241 |
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8 #define BUF_BIT_PRIORITY 0x40 |
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9 #define MAP_BIT_PRIORITY 0x8000 |
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10 #define MAP_BIT_H_FLIP 0x800 |
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11 #define MAP_BIT_V_FLIP 0x1000 |
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12 |
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13 //Mode reg 1 |
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14 #define BIT_HINT_EN 0x10 |
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15 #define BIT_PAL_SEL 0x04 |
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16 #define BIT_HVC_LATCH 0x02 |
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17 #define BIT_DISP_DIS 0x01 |
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18 |
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19 //Mode reg 2 |
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20 #define BIT_DISP_EN 0x40 |
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21 #define BIT_VINT_EN 0x20 |
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22 #define BIT_DMA_ENABLE 0x10 |
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23 #define BIT_PAL 0x08 |
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24 #define BIT_MODE_5 0x04 |
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25 |
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26 //Mode reg 3 |
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27 #define BIT_EINT_EN 0x10 |
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28 #define BIT_VSCROLL 0x04 |
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29 |
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30 //Mode reg 4 |
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31 #define BIT_H40 0x01 |
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32 #define BIT_HILIGHT 0x8 |
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33 |
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34 #define SCROLL_BUFFER_SIZE 32 |
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35 #define SCROLL_BUFFER_DRAW 16 |
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36 |
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37 #define FIFO_SIZE 4 |
| 40 | 38 |
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39 void init_vdp_context(vdp_context * context) |
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40 { |
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41 memset(context, 0, sizeof(*context)); |
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42 context->vdpmem = malloc(VRAM_SIZE); |
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43 memset(context->vdpmem, 0, VRAM_SIZE); |
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44 context->framebuf = malloc(FRAMEBUF_SIZE); |
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45 memset(context->framebuf, 0, FRAMEBUF_SIZE); |
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46 context->linebuf = malloc(LINEBUF_SIZE + SCROLL_BUFFER_SIZE*2); |
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47 memset(context->linebuf, 0, LINEBUF_SIZE + SCROLL_BUFFER_SIZE*2); |
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48 context->tmp_buf_a = context->linebuf + LINEBUF_SIZE; |
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49 context->tmp_buf_b = context->tmp_buf_a + SCROLL_BUFFER_SIZE; |
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50 context->sprite_draws = MAX_DRAWS; |
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51 context->fifo_cur = malloc(sizeof(fifo_entry) * FIFO_SIZE); |
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52 context->fifo_end = context->fifo_cur + FIFO_SIZE; |
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53 } |
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54 |
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55 void render_sprite_cells(vdp_context * context) |
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56 { |
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57 if (context->cur_slot >= context->sprite_draws) { |
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58 sprite_draw * d = context->sprite_draw_list + context->cur_slot; |
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59 |
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60 uint16_t dir; |
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61 int16_t x; |
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62 if (d->h_flip) { |
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63 x = d->x_pos + 7; |
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64 dir = -1; |
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65 } else { |
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66 x = d->x_pos; |
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67 dir = 1; |
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68 } |
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69 //printf("Draw Slot %d of %d, Rendering sprite cell from %X to x: %d\n", context->cur_slot, context->sprite_draws, d->address, x); |
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70 context->cur_slot--; |
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71 for (uint16_t address = d->address; address != ((d->address+4) & 0xFFFF); address++) { |
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72 if (x >= 0 && x < 320 && !(context->linebuf[x] & 0xF)) { |
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73 context->linebuf[x] = (context->vdpmem[address] >> 4) | d->pal_priority; |
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74 } |
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75 x += dir; |
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76 if (x >= 0 && x < 320 && !(context->linebuf[x] & 0xF)) { |
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77 context->linebuf[x] = (context->vdpmem[address] & 0xF) | d->pal_priority; |
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78 } |
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79 x += dir; |
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80 } |
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81 } |
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82 } |
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83 |
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84 void vdp_print_sprite_table(vdp_context * context) |
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85 { |
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86 uint16_t sat_address = (context->regs[REG_SAT] & 0x7F) << 9; |
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87 uint16_t current_index = 0; |
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88 uint8_t count = 0; |
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89 do { |
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90 uint16_t address = current_index * 8 + sat_address; |
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91 uint8_t height = ((context->vdpmem[address+2] & 0x3) + 1) * 8; |
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92 uint8_t width = (((context->vdpmem[address+2] >> 2) & 0x3) + 1) * 8; |
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93 int16_t y = ((context->vdpmem[address] & 0x3) << 8 | context->vdpmem[address+1]) & 0x1FF; |
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94 int16_t x = ((context->vdpmem[address+ 6] & 0x3) << 8 | context->vdpmem[address + 7]) & 0x1FF; |
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95 uint16_t link = context->vdpmem[address+3] & 0x7F; |
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96 uint8_t pal = context->vdpmem[address + 4] >> 5 & 0x3; |
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97 uint8_t pri = context->vdpmem[address + 4] >> 7; |
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98 uint16_t pattern = ((context->vdpmem[address + 4] << 8 | context->vdpmem[address + 5]) & 0x7FF) << 5; |
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99 //printf("Sprite %d: X=%d(%d), Y=%d(%d), Width=%u, Height=%u, Link=%u, Pal=%u, Pri=%u, Pat=%X\n", current_index, x, x-128, y, y-128, width, height, link, pal, pri, pattern); |
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100 current_index = link; |
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101 count++; |
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102 } while (current_index != 0 && count < 80); |
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103 } |
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104 |
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105 void vdp_print_reg_explain(vdp_context * context) |
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106 { |
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107 char * hscroll[] = {"full", "7-line", "cell", "line"}; |
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108 printf("**Mode Group**\n" |
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109 "00: %.2X | H-ints %s, Pal Select %d, HVC latch %s, Display gen %s\n" |
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110 "01: %.2X | Display %s, V-ints %s, Height: %d, Mode %d\n" |
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111 "0B: %.2X | E-ints %s, V-Scroll: %s, H-Scroll: %s\n" |
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112 "0C: %.2X | Width: %d, Shadow/Highlight: %s\n", |
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113 context->regs[REG_MODE_1], context->regs[REG_MODE_1] & BIT_HINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_PAL_SEL != 0, |
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114 context->regs[REG_MODE_1] & BIT_HVC_LATCH ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_DISP_DIS ? "disabled" : "enabled", |
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115 context->regs[REG_MODE_2], context->regs[REG_MODE_2] & BIT_DISP_EN ? "enabled" : "disabled", context->regs[REG_MODE_2] & BIT_VINT_EN ? "enabled" : "disabled", |
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116 context->regs[REG_MODE_2] & BIT_PAL ? 30 : 28, context->regs[REG_MODE_2] & BIT_MODE_5 ? 5 : 4, |
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117 context->regs[REG_MODE_3], context->regs[REG_MODE_3] & BIT_EINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_3] & BIT_VSCROLL ? "2 cell" : "full", |
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118 hscroll[context->regs[REG_MODE_3] & 0x3], |
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119 context->regs[REG_MODE_4], context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32, context->regs[REG_MODE_4] & BIT_HILIGHT ? "enabled" : "disabled"); |
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120 printf("\n**Table Group**\n" |
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121 "02: %.2X | Scroll A Name Table: $%.4X\n" |
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122 "03: %.2X | Window Name Table: $%.4X\n" |
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123 "04: %.2X | Scroll B Name Table: $%.4X\n" |
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124 "05: %.2X | Sprite Attribute Table: $%.4X\n" |
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125 "0D: %.2X | HScroll Data Table: $%.4X\n", |
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126 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0x38) << 10, |
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127 context->regs[REG_WINDOW], (context->regs[REG_WINDOW] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3C : 0x3E)) << 10, |
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128 context->regs[REG_SCROLL_B], (context->regs[REG_SCROLL_B] & 0x7) << 13, |
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129 context->regs[REG_SAT], (context->regs[REG_SAT] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3E : 0x3F)) << 9, |
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130 context->regs[REG_HSCROLL], (context->regs[REG_HSCROLL] & 0x1F) << 10); |
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131 char * sizes[] = {"32", "64", "invalid", "128"}; |
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132 printf("\n**Misc Group**\n" |
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133 "07: %.2X | Backdrop Color: $%X\n" |
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134 "0A: %.2X | H-Int Counter: %u\n" |
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135 "0F: %.2X | Auto-increment: $%X\n" |
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136 "10: %.2X | Scroll A/B Size: %sx%s\n", |
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137 context->regs[REG_BG_COLOR], context->regs[REG_BG_COLOR] & 0x3F, |
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138 context->regs[REG_HINT], context->regs[REG_HINT], |
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139 context->regs[REG_AUTOINC], context->regs[REG_AUTOINC], |
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140 context->regs[REG_SCROLL], sizes[context->regs[REG_SCROLL] & 0x3], sizes[context->regs[REG_SCROLL] >> 4 & 0x3]); |
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141 |
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142 //TODO: Window Group, DMA Group |
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143 } |
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144 |
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145 void scan_sprite_table(uint32_t line, vdp_context * context) |
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146 { |
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147 if (context->sprite_index && context->slot_counter) { |
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148 line += 1; |
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149 line &= 0xFF; |
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150 context->sprite_index &= 0x7F; |
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151 if (context->latched_mode & BIT_H40) { |
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152 if (context->sprite_index >= MAX_SPRITES_FRAME) { |
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153 context->sprite_index = 0; |
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154 return; |
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155 } |
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156 } else if(context->sprite_index >= MAX_SPRITES_FRAME_H32) { |
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157 context->sprite_index = 0; |
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158 return; |
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159 } |
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160 //TODO: Read from SAT cache rather than from VRAM |
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161 uint16_t sat_address = (context->regs[REG_SAT] & 0x7F) << 9; |
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162 uint16_t address = context->sprite_index * 8 + sat_address; |
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163 line += 128; |
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164 uint16_t y = ((context->vdpmem[address] & 0x3) << 8 | context->vdpmem[address+1]) & 0x1FF; |
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165 uint8_t height = ((context->vdpmem[address+2] & 0x3) + 1) * 8; |
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166 //printf("Sprite %d | y: %d, height: %d\n", context->sprite_index, y, height); |
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167 if (y <= line && line < (y + height)) { |
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168 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line); |
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169 context->sprite_info_list[--(context->slot_counter)].size = context->vdpmem[address+2]; |
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170 context->sprite_info_list[context->slot_counter].index = context->sprite_index; |
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171 context->sprite_info_list[context->slot_counter].y = y-128; |
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172 } |
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173 context->sprite_index = context->vdpmem[address+3] & 0x7F; |
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174 if (context->sprite_index && context->slot_counter) |
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175 { |
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176 address = context->sprite_index * 8 + sat_address; |
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177 y = ((context->vdpmem[address] & 0x3) << 8 | context->vdpmem[address+1]) & 0x1FF; |
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178 height = ((context->vdpmem[address+2] & 0x3) + 1) * 8; |
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179 //printf("Sprite %d | y: %d, height: %d\n", context->sprite_index, y, height); |
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180 if (y <= line && line < (y + height)) { |
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181 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line); |
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182 context->sprite_info_list[--(context->slot_counter)].size = context->vdpmem[address+2]; |
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183 context->sprite_info_list[context->slot_counter].index = context->sprite_index; |
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184 context->sprite_info_list[context->slot_counter].y = y-128; |
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185 } |
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186 context->sprite_index = context->vdpmem[address+3] & 0x7F; |
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187 } |
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188 } |
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189 } |
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190 |
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191 void read_sprite_x(uint32_t line, vdp_context * context) |
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192 { |
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193 if (context->cur_slot >= context->slot_counter) { |
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194 if (context->sprite_draws) { |
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195 line += 1; |
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196 line &= 0xFF; |
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197 //in tiles |
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198 uint8_t width = ((context->sprite_info_list[context->cur_slot].size >> 2) & 0x3) + 1; |
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199 //in pixels |
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200 uint8_t height = ((context->sprite_info_list[context->cur_slot].size & 0x3) + 1) * 8; |
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201 uint16_t att_addr = ((context->regs[REG_SAT] & 0x7F) << 9) + context->sprite_info_list[context->cur_slot].index * 8 + 4; |
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202 uint16_t tileinfo = (context->vdpmem[att_addr] << 8) | context->vdpmem[att_addr+1]; |
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203 uint8_t pal_priority = (tileinfo >> 9) & 0x70; |
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204 uint8_t row; |
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205 if (tileinfo & MAP_BIT_V_FLIP) { |
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206 row = (context->sprite_info_list[context->cur_slot].y + height - 1) - line; |
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207 } else { |
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208 row = line-context->sprite_info_list[context->cur_slot].y; |
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209 } |
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210 uint16_t address = ((tileinfo & 0x7FF) << 5) + row * 4; |
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211 int16_t x = ((context->vdpmem[att_addr+ 2] & 0x3) << 8 | context->vdpmem[att_addr + 3]) & 0x1FF; |
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212 if (x) { |
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213 context->flags |= FLAG_CAN_MASK; |
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214 } else if(context->flags & (FLAG_CAN_MASK | FLAG_DOT_OFLOW)) { |
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215 context->flags |= FLAG_MASKED; |
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216 } |
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217 |
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218 context->flags &= ~FLAG_DOT_OFLOW; |
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219 int16_t i; |
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220 if (context->flags & FLAG_MASKED) { |
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221 for (i=0; i < width && context->sprite_draws; i++) { |
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222 --context->sprite_draws; |
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223 context->sprite_draw_list[context->sprite_draws].x_pos = -128; |
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224 } |
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225 } else { |
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226 x -= 128; |
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227 int16_t base_x = x; |
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228 int16_t dir; |
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229 if (tileinfo & MAP_BIT_H_FLIP) { |
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230 x += (width-1) * 8; |
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231 dir = -8; |
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232 } else { |
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233 dir = 8; |
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234 } |
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235 //printf("Sprite %d | x: %d, y: %d, width: %d, height: %d, pal_priority: %X, row: %d, tile addr: %X\n", context->sprite_info_list[context->cur_slot].index, x, context->sprite_info_list[context->cur_slot].y, width, height, pal_priority, row, address); |
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236 for (i=0; i < width && context->sprite_draws; i++, x += dir) { |
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237 --context->sprite_draws; |
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238 context->sprite_draw_list[context->sprite_draws].address = address + i * height * 4; |
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239 context->sprite_draw_list[context->sprite_draws].x_pos = x; |
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240 context->sprite_draw_list[context->sprite_draws].pal_priority = pal_priority; |
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241 context->sprite_draw_list[context->sprite_draws].h_flip = (tileinfo & MAP_BIT_H_FLIP) ? 1 : 0; |
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242 } |
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243 } |
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244 if (i < width) { |
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245 context->flags |= FLAG_DOT_OFLOW; |
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246 } |
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247 context->cur_slot--; |
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248 } else { |
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249 context->flags |= FLAG_DOT_OFLOW; |
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250 } |
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251 } |
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252 } |
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253 |
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254 #define VRAM_READ 0 |
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255 #define VRAM_WRITE 1 |
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256 #define CRAM_READ 8 |
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257 #define CRAM_WRITE 3 |
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258 #define VSRAM_READ 4 |
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259 #define VSRAM_WRITE 5 |
| 75 | 260 #define DMA_START 0x20 |
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261 |
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262 void external_slot(vdp_context * context) |
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263 { |
| 75 | 264 //TODO: Figure out what happens if CD bit 4 is not set in DMA copy mode |
| 265 //TODO: Figure out what happens when CD:0-3 is not set to a write mode in DMA operations | |
| 266 //TODO: Figure out what happens if DMA gets disabled part way through a DMA fill or DMA copy | |
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267 if(context->flags & FLAG_DMA_RUN) { |
| 75 | 268 uint16_t dma_len; |
| 269 switch(context->regs[REG_DMASRC_H] & 0xC0) | |
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270 { |
| 75 | 271 //68K -> VDP |
| 272 case 0: | |
| 273 case 0x40: | |
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274 switch(context->dma_cd & 0xF) |
| 75 | 275 { |
| 276 case VRAM_WRITE: | |
| 277 if (context->flags & FLAG_DMA_PROG) { | |
| 278 context->vdpmem[context->address ^ 1] = context->dma_val; | |
| 279 context->flags &= ~FLAG_DMA_PROG; | |
| 280 } else { | |
| 281 context->dma_val = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); | |
| 282 context->vdpmem[context->address] = context->dma_val >> 8; | |
| 283 context->flags |= FLAG_DMA_PROG; | |
| 284 } | |
| 285 break; | |
| 286 case CRAM_WRITE: | |
| 287 context->cram[(context->address/2) & (CRAM_SIZE-1)] = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); | |
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288 //printf("CRAM DMA | %X set to %X from %X at %d\n", (context->address/2) & (CRAM_SIZE-1), context->cram[(context->address/2) & (CRAM_SIZE-1)], (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->cycles); |
| 75 | 289 break; |
| 290 case VSRAM_WRITE: | |
| 291 if (((context->address/2) & 63) < VSRAM_SIZE) { | |
| 292 context->vsram[(context->address/2) & 63] = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); | |
| 293 } | |
| 294 break; | |
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295 } |
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296 break; |
| 75 | 297 //Fill |
| 298 case 0x80: | |
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299 switch(context->dma_cd & 0xF) |
| 75 | 300 { |
| 301 case VRAM_WRITE: | |
| 302 //Charles MacDonald's VDP doc says that the low byte gets written first | |
| 142 | 303 context->vdpmem[context->address] = context->dma_val; |
| 304 context->dma_val = (context->dma_val << 8) | ((context->dma_val >> 8) & 0xFF); | |
| 75 | 305 break; |
| 306 case CRAM_WRITE: | |
| 307 context->cram[(context->address/2) & (CRAM_SIZE-1)] = context->dma_val; | |
| 308 break; | |
| 309 case VSRAM_WRITE: | |
| 310 if (((context->address/2) & 63) < VSRAM_SIZE) { | |
| 311 context->vsram[(context->address/2) & 63] = context->dma_val; | |
| 312 } | |
| 313 break; | |
| 314 } | |
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315 break; |
| 75 | 316 //Copy |
| 317 case 0xC0: | |
| 318 if (context->flags & FLAG_DMA_PROG) { | |
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319 switch(context->dma_cd & 0xF) |
| 75 | 320 { |
| 321 case VRAM_WRITE: | |
| 322 context->vdpmem[context->address] = context->dma_val; | |
| 323 break; | |
| 324 case CRAM_WRITE: | |
| 325 context->cram[(context->address/2) & (CRAM_SIZE-1)] = context->dma_val; | |
| 326 break; | |
| 327 case VSRAM_WRITE: | |
| 328 if (((context->address/2) & 63) < VSRAM_SIZE) { | |
| 329 context->vsram[(context->address/2) & 63] = context->dma_val; | |
| 330 } | |
| 331 break; | |
| 332 } | |
| 333 context->flags &= ~FLAG_DMA_PROG; | |
| 334 } else { | |
| 335 //I assume, that DMA copy copies from the same RAM as the destination | |
| 336 //but it's possible I'm mistaken | |
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337 switch(context->dma_cd & 0xF) |
| 75 | 338 { |
| 339 case VRAM_WRITE: | |
| 340 context->dma_val = context->vdpmem[(context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]]; | |
| 341 break; | |
| 342 case CRAM_WRITE: | |
| 343 context->dma_val = context->cram[context->regs[REG_DMASRC_L] & (CRAM_SIZE-1)]; | |
| 344 break; | |
| 345 case VSRAM_WRITE: | |
| 346 if ((context->regs[REG_DMASRC_L] & 63) < VSRAM_SIZE) { | |
| 347 context->dma_val = context->vsram[context->regs[REG_DMASRC_L] & 63]; | |
| 348 } else { | |
| 349 context->dma_val = 0; | |
| 350 } | |
| 351 break; | |
| 352 } | |
| 353 context->flags |= FLAG_DMA_PROG; | |
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354 } |
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355 break; |
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356 } |
| 75 | 357 if (!(context->flags & FLAG_DMA_PROG)) { |
| 358 context->address += context->regs[REG_AUTOINC]; | |
| 359 context->regs[REG_DMASRC_L] += 1; | |
| 135 | 360 if (!context->regs[REG_DMASRC_L]) { |
| 361 context->regs[REG_DMASRC_M] += 1; | |
| 362 } | |
| 75 | 363 dma_len = ((context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L]) - 1; |
| 364 context->regs[REG_DMALEN_H] = dma_len >> 8; | |
| 365 context->regs[REG_DMALEN_L] = dma_len; | |
| 366 if (!dma_len) { | |
| 367 context->flags &= ~FLAG_DMA_RUN; | |
| 368 } | |
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369 } |
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370 } else { |
| 75 | 371 fifo_entry * start = (context->fifo_end - FIFO_SIZE); |
| 372 if (context->fifo_cur != start && start->cycle <= context->cycles) { | |
| 373 if ((context->regs[REG_MODE_2] & BIT_DMA_ENABLE) && (context->cd & DMA_START)) { | |
| 374 context->flags |= FLAG_DMA_RUN; | |
| 375 context->dma_val = start->value; | |
| 138 | 376 context->address = start->address; //undo auto-increment |
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377 context->dma_cd = context->cd; |
| 75 | 378 } else { |
| 138 | 379 switch (start->cd & 0xF) |
| 75 | 380 { |
| 381 case VRAM_WRITE: | |
| 382 if (start->partial) { | |
| 383 //printf("VRAM Write: %X to %X\n", start->value, context->address ^ 1); | |
| 138 | 384 context->vdpmem[start->address ^ 1] = start->value; |
| 75 | 385 } else { |
| 386 //printf("VRAM Write High: %X to %X\n", start->value >> 8, context->address); | |
| 138 | 387 context->vdpmem[start->address] = start->value >> 8; |
| 75 | 388 start->partial = 1; |
| 389 //skip auto-increment and removal of entry from fifo | |
| 390 return; | |
| 391 } | |
| 392 break; | |
| 393 case CRAM_WRITE: | |
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394 //printf("CRAM Write | %X to %X\n", start->value, (start->address/2) & (CRAM_SIZE-1)); |
| 138 | 395 context->cram[(start->address/2) & (CRAM_SIZE-1)] = start->value; |
| 75 | 396 break; |
| 397 case VSRAM_WRITE: | |
| 138 | 398 if (((start->address/2) & 63) < VSRAM_SIZE) { |
| 75 | 399 //printf("VSRAM Write: %X to %X\n", start->value, context->address); |
| 138 | 400 context->vsram[(start->address/2) & 63] = start->value; |
| 75 | 401 } |
| 402 break; | |
| 403 } | |
| 138 | 404 //context->address += context->regs[REG_AUTOINC]; |
| 75 | 405 } |
| 406 fifo_entry * cur = start+1; | |
| 407 if (cur < context->fifo_cur) { | |
| 408 memmove(start, cur, sizeof(fifo_entry) * (context->fifo_cur - cur)); | |
| 409 } | |
| 410 context->fifo_cur -= 1; | |
| 411 } else { | |
| 412 context->flags |= FLAG_UNUSED_SLOT; | |
| 413 } | |
|
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414 } |
|
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415 } |
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416 |
| 40 | 417 #define WINDOW_RIGHT 0x80 |
| 418 #define WINDOW_DOWN 0x80 | |
| 419 | |
|
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420 void read_map_scroll(uint16_t column, uint16_t vsram_off, uint32_t line, uint16_t address, uint16_t hscroll_val, vdp_context * context) |
|
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421 { |
| 40 | 422 if (!vsram_off) { |
| 423 uint16_t left_col, right_col; | |
| 424 if (context->regs[REG_WINDOW_H] & WINDOW_RIGHT) { | |
|
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425 left_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2; |
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426 right_col = 42; |
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427 } else { |
| 40 | 428 left_col = 0; |
| 429 right_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2; | |
| 430 if (right_col) { | |
| 431 right_col += 2; | |
| 432 } | |
| 433 } | |
|
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434 uint16_t top_line, bottom_line; |
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435 if (context->regs[REG_WINDOW_V] & WINDOW_DOWN) { |
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436 top_line = (context->regs[REG_WINDOW_V] & 0x1F) * 8; |
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437 bottom_line = 241; |
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438 } else { |
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439 top_line = 0; |
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440 bottom_line = (context->regs[REG_WINDOW_V] & 0x1F) * 8; |
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441 } |
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442 if ((column >= left_col && column < right_col) || (line >= top_line && line < bottom_line)) { |
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443 uint16_t address = context->regs[REG_WINDOW] << 10; |
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444 uint16_t line_offset, offset, mask; |
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445 if (context->latched_mode & BIT_H40) { |
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446 address &= 0xF000; |
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447 line_offset = (((line) / 8) * 64 * 2) & 0xFFF; |
|
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448 mask = 0x7F; |
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449 |
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450 } else { |
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451 address &= 0xF800; |
|
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452 line_offset = (((line) / 8) * 32 * 2) & 0xFFF; |
|
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453 mask = 0x3F; |
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454 } |
|
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455 offset = address + line_offset + (((column - 2) * 2) & mask); |
|
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456 context->col_1 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
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457 //printf("Window | top: %d, bot: %d, left: %d, right: %d, base: %X, line: %X offset: %X, tile: %X, reg: %X\n", top_line, bottom_line, left_col, right_col, address, line_offset, offset, ((context->col_1 & 0x3FF) << 5), context->regs[REG_WINDOW]); |
|
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458 offset = address + line_offset + (((column - 1) * 2) & mask); |
|
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459 context->col_2 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
|
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460 context->v_offset = (line) & 0x7; |
|
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461 context->flags |= FLAG_WINDOW; |
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462 return; |
| 40 | 463 } |
| 464 context->flags &= ~FLAG_WINDOW; | |
| 465 } | |
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466 uint16_t vscroll; |
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467 switch(context->regs[REG_SCROLL] & 0x30) |
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468 { |
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469 case 0: |
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470 vscroll = 0xFF; |
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471 break; |
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472 case 0x10: |
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473 vscroll = 0x1FF; |
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474 break; |
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475 case 0x20: |
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476 //TODO: Verify this behavior |
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477 vscroll = 0; |
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478 break; |
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479 case 0x30: |
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480 vscroll = 0x3FF; |
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481 break; |
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482 } |
|
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483 vscroll &= (context->vsram[(context->regs[REG_MODE_3] & BIT_VSCROLL ? column : 0) + vsram_off] + line); |
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484 context->v_offset = vscroll & 0x7; |
|
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485 //printf("%s | line %d, vsram: %d, vscroll: %d, v_offset: %d\n",(vsram_off ? "B" : "A"), line, context->vsram[context->regs[REG_MODE_3] & 0x4 ? column : 0], vscroll, context->v_offset); |
|
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486 vscroll /= 8; |
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487 uint16_t hscroll_mask; |
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488 uint16_t v_mul; |
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489 switch(context->regs[REG_SCROLL] & 0x3) |
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490 { |
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491 case 0: |
|
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492 hscroll_mask = 0x1F; |
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493 v_mul = 64; |
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494 break; |
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495 case 0x1: |
|
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496 hscroll_mask = 0x3F; |
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497 v_mul = 128; |
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498 break; |
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499 case 0x2: |
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500 //TODO: Verify this behavior |
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501 hscroll_mask = 0; |
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502 v_mul = 0; |
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503 break; |
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504 case 0x3: |
|
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|
505 hscroll_mask = 0x7F; |
|
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506 v_mul = 256; |
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507 break; |
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508 } |
| 28 | 509 uint16_t hscroll, offset; |
| 510 for (int i = 0; i < 2; i++) { | |
|
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511 hscroll = (column - 2 + i - ((hscroll_val/8) & 0xFFFE)) & hscroll_mask; |
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512 offset = address + ((vscroll * v_mul + hscroll*2) & 0x1FFF); |
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513 //printf("%s | line: %d, col: %d, x: %d, hs_mask %X, scr reg: %X, tbl addr: %X\n", (vsram_off ? "B" : "A"), line, (column-2+i), hscroll, hscroll_mask, context->regs[REG_SCROLL], offset); |
| 28 | 514 uint16_t col_val = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
| 515 if (i) { | |
| 516 context->col_2 = col_val; | |
| 517 } else { | |
| 518 context->col_1 = col_val; | |
| 519 } | |
| 520 } | |
|
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521 } |
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522 |
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523 void read_map_scroll_a(uint16_t column, uint32_t line, vdp_context * context) |
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524 { |
|
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24
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|
525 read_map_scroll(column, 0, line, (context->regs[REG_SCROLL_A] & 0x38) << 10, context->hscroll_a, context); |
|
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526 } |
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527 |
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528 void read_map_scroll_b(uint16_t column, uint32_t line, vdp_context * context) |
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529 { |
|
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|
530 read_map_scroll(column, 1, line, (context->regs[REG_SCROLL_B] & 0x7) << 13, context->hscroll_b, context); |
|
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531 } |
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532 |
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533 void render_map(uint16_t col, uint8_t * tmp_buf, vdp_context * context) |
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534 { |
|
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|
535 uint16_t address = ((col & 0x7FF) << 5); |
|
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|
536 if (col & MAP_BIT_V_FLIP) { |
|
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|
537 address += 28 - 4 * context->v_offset; |
|
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538 } else { |
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|
539 address += 4 * context->v_offset; |
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540 } |
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541 uint16_t pal_priority = (col >> 9) & 0x70; |
|
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|
542 int32_t dir; |
|
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|
543 if (col & MAP_BIT_H_FLIP) { |
|
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544 tmp_buf += 7; |
|
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545 dir = -1; |
|
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|
546 } else { |
|
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|
547 dir = 1; |
|
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changeset
|
548 } |
|
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|
549 for (uint32_t i=0; i < 4; i++, address++) |
|
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|
550 { |
|
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|
551 *tmp_buf = pal_priority | (context->vdpmem[address] >> 4); |
|
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|
552 tmp_buf += dir; |
|
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diff
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553 *tmp_buf = pal_priority | (context->vdpmem[address] & 0xF); |
|
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|
554 tmp_buf += dir; |
|
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changeset
|
555 } |
|
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
556 } |
|
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parents:
diff
changeset
|
557 |
|
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Mike Pavone <pavone@retrodev.com>
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|
558 void render_map_1(vdp_context * context) |
|
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|
559 { |
|
39
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Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
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38
diff
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|
560 render_map(context->col_1, context->tmp_buf_a+SCROLL_BUFFER_DRAW, context); |
|
20
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561 } |
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Mike Pavone <pavone@retrodev.com>
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diff
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|
562 |
|
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diff
changeset
|
563 void render_map_2(vdp_context * context) |
|
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|
564 { |
|
39
3c69319269ef
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38
diff
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|
565 render_map(context->col_2, context->tmp_buf_a+SCROLL_BUFFER_DRAW+8, context); |
|
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|
566 } |
|
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Mike Pavone <pavone@retrodev.com>
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|
567 |
|
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Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
568 void render_map_3(vdp_context * context) |
|
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parents:
diff
changeset
|
569 { |
|
39
3c69319269ef
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Mike Pavone <pavone@retrodev.com>
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38
diff
changeset
|
570 render_map(context->col_1, context->tmp_buf_b+SCROLL_BUFFER_DRAW, context); |
|
20
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diff
changeset
|
571 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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diff
changeset
|
572 |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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changeset
|
573 void render_map_output(uint32_t line, int32_t col, vdp_context * context) |
|
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Mike Pavone <pavone@retrodev.com>
parents:
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|
574 { |
|
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Mike Pavone <pavone@retrodev.com>
parents:
diff
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|
575 if (line >= 240) { |
|
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Mike Pavone <pavone@retrodev.com>
parents:
diff
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|
576 return; |
|
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Mike Pavone <pavone@retrodev.com>
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changeset
|
577 } |
|
39
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
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38
diff
changeset
|
578 render_map(context->col_2, context->tmp_buf_b+SCROLL_BUFFER_DRAW+8, context); |
|
20
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diff
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|
579 uint16_t *dst, *end; |
|
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Mike Pavone <pavone@retrodev.com>
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|
580 uint8_t *sprite_buf, *plane_a, *plane_b; |
|
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parents:
diff
changeset
|
581 if (col) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
582 { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
583 col-=2; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
584 dst = context->framebuf + line * 320 + col * 8; |
|
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
585 sprite_buf = context->linebuf + col * 8; |
|
43
3fc57e1a2c56
Add debug render mode and fix vertical flip bit for bg tiles
Mike Pavone <pavone@retrodev.com>
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42
diff
changeset
|
586 uint16_t a_src; |
| 40 | 587 if (context->flags & FLAG_WINDOW) { |
| 588 plane_a = context->tmp_buf_a + SCROLL_BUFFER_DRAW; | |
|
43
3fc57e1a2c56
Add debug render mode and fix vertical flip bit for bg tiles
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42
diff
changeset
|
589 a_src = FBUF_SRC_W; |
| 40 | 590 } else { |
| 591 plane_a = context->tmp_buf_a + SCROLL_BUFFER_DRAW - (context->hscroll_a & 0xF); | |
|
43
3fc57e1a2c56
Add debug render mode and fix vertical flip bit for bg tiles
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parents:
42
diff
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|
592 a_src = FBUF_SRC_A; |
| 40 | 593 } |
|
39
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
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38
diff
changeset
|
594 plane_b = context->tmp_buf_b + SCROLL_BUFFER_DRAW - (context->hscroll_b & 0xF); |
| 30 | 595 end = dst + 16; |
|
43
3fc57e1a2c56
Add debug render mode and fix vertical flip bit for bg tiles
Mike Pavone <pavone@retrodev.com>
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42
diff
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|
596 uint16_t src; |
| 30 | 597 //printf("A | tmp_buf offset: %d\n", 8 - (context->hscroll_a & 0x7)); |
|
230
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parents:
191
diff
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|
598 |
|
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|
599 if (context->regs[REG_MODE_4] & BIT_HILIGHT) { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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diff
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|
600 for (; dst < end; ++plane_a, ++plane_b, ++sprite_buf, ++dst) { |
|
d3266cee02c9
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191
diff
changeset
|
601 uint8_t pixel; |
|
d3266cee02c9
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parents:
191
diff
changeset
|
602 |
|
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Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
603 src = 0; |
|
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Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
604 uint8_t sprite_color = *sprite_buf & 0x3F; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
605 if (sprite_color == 0x3E || sprite_color == 0x3F) { |
|
232
54873acb982e
Shadow and higlight operators were switched
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parents:
230
diff
changeset
|
606 if (sprite_color == 0x3F) { |
|
54873acb982e
Shadow and higlight operators were switched
Mike Pavone <pavone@retrodev.com>
parents:
230
diff
changeset
|
607 src = FBUF_SHADOW; |
|
230
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
608 } else { |
|
232
54873acb982e
Shadow and higlight operators were switched
Mike Pavone <pavone@retrodev.com>
parents:
230
diff
changeset
|
609 src = FBUF_HILIGHT; |
|
230
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
610 } |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
611 if (*plane_a & BUF_BIT_PRIORITY && *plane_a & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
612 pixel = *plane_a; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
613 src |= a_src; |
|
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Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
614 } else if (*plane_b & BUF_BIT_PRIORITY && *plane_b & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
615 pixel = *plane_b; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
616 src |= FBUF_SRC_B; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
617 } else if (*plane_a & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
618 pixel = *plane_a; |
|
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Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
619 src |= a_src; |
|
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Implemented shadow hilight mode.
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191
diff
changeset
|
620 } else if (*plane_b & 0xF){ |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
621 pixel = *plane_b; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
622 src |= FBUF_SRC_B; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
623 } else { |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
624 pixel = context->regs[REG_BG_COLOR] & 0x3F; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
625 src |= FBUF_SRC_BG; |
|
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Implemented shadow hilight mode.
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191
diff
changeset
|
626 } |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
627 } else { |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
628 if (*sprite_buf & BUF_BIT_PRIORITY && *sprite_buf & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
629 pixel = *sprite_buf; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
630 src = FBUF_SRC_S; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
631 } else if (*plane_a & BUF_BIT_PRIORITY && *plane_a & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
632 pixel = *plane_a; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
633 src = a_src; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
634 } else if (*plane_b & BUF_BIT_PRIORITY && *plane_b & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
635 pixel = *plane_b; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
636 src = FBUF_SRC_B; |
|
233
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232
diff
changeset
|
637 } else { |
|
9d10669f2579
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232
diff
changeset
|
638 if (!(*plane_a & BUF_BIT_PRIORITY || *plane_a & BUF_BIT_PRIORITY)) { |
|
9d10669f2579
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232
diff
changeset
|
639 src = FBUF_SHADOW; |
|
230
d3266cee02c9
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191
diff
changeset
|
640 } |
|
233
9d10669f2579
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parents:
232
diff
changeset
|
641 if (*sprite_buf & 0xF) { |
|
9d10669f2579
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232
diff
changeset
|
642 pixel = *sprite_buf; |
|
9d10669f2579
Less broken implementation of shadow/highlight
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232
diff
changeset
|
643 if (*sprite_buf & 0xF == 0xE) { |
|
9d10669f2579
Less broken implementation of shadow/highlight
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232
diff
changeset
|
644 src = FBUF_SRC_S; |
|
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232
diff
changeset
|
645 } else { |
|
9d10669f2579
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232
diff
changeset
|
646 src |= FBUF_SRC_S; |
|
9d10669f2579
Less broken implementation of shadow/highlight
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232
diff
changeset
|
647 } |
|
9d10669f2579
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232
diff
changeset
|
648 } else if (*plane_a & 0xF) { |
|
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232
diff
changeset
|
649 pixel = *plane_a; |
|
9d10669f2579
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232
diff
changeset
|
650 src |= a_src; |
|
9d10669f2579
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232
diff
changeset
|
651 } else if (*plane_b & 0xF){ |
|
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232
diff
changeset
|
652 pixel = *plane_b; |
|
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232
diff
changeset
|
653 src |= FBUF_SRC_B; |
|
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232
diff
changeset
|
654 } else { |
|
9d10669f2579
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232
diff
changeset
|
655 pixel = context->regs[REG_BG_COLOR] & 0x3F; |
|
9d10669f2579
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232
diff
changeset
|
656 src |= FBUF_SRC_BG; |
|
9d10669f2579
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232
diff
changeset
|
657 } |
|
230
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
658 } |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
659 } |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
660 *dst = (context->cram[pixel & 0x3F] & 0xEEE) | ((pixel & BUF_BIT_PRIORITY) ? FBUF_BIT_PRIORITY : 0) | src; |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
661 } |
|
230
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
662 } else { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
663 for (; dst < end; ++plane_a, ++plane_b, ++sprite_buf, ++dst) { |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
664 uint8_t pixel; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
665 if (*sprite_buf & BUF_BIT_PRIORITY && *sprite_buf & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
666 pixel = *sprite_buf; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
667 src = FBUF_SRC_S; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
668 } else if (*plane_a & BUF_BIT_PRIORITY && *plane_a & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
669 pixel = *plane_a; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
670 src = a_src; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
671 } else if (*plane_b & BUF_BIT_PRIORITY && *plane_b & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
672 pixel = *plane_b; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
673 src = FBUF_SRC_B; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
674 } else if (*sprite_buf & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
675 pixel = *sprite_buf; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
676 src = FBUF_SRC_S; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
677 } else if (*plane_a & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
678 pixel = *plane_a; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
679 src = a_src; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
680 } else if (*plane_b & 0xF){ |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
681 pixel = *plane_b; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
682 src = FBUF_SRC_B; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
683 } else { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
684 pixel = context->regs[REG_BG_COLOR] & 0x3F; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
685 src = FBUF_SRC_BG; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
686 } |
|
291
eea3b118940d
Make sure all rendering operations mask CRAM with 0xEEE before using it
Mike Pavone <pavone@retrodev.com>
parents:
233
diff
changeset
|
687 *dst = (context->cram[pixel & 0x3F] & 0xEEE) | ((pixel & BUF_BIT_PRIORITY) ? FBUF_BIT_PRIORITY : 0) | src; |
|
230
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
688 } |
|
20
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Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
689 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
690 } else { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
691 //dst = context->framebuf + line * 320; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
692 //sprite_buf = context->linebuf + col * 8; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
693 //plane_a = context->tmp_buf_a + 16 - (context->hscroll_a & 0x7); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
694 //plane_b = context->tmp_buf_b + 16 - (context->hscroll_b & 0x7); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
695 //end = dst + 8; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
696 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
697 |
| 40 | 698 uint16_t remaining; |
| 699 if (!(context->flags & FLAG_WINDOW)) { | |
| 700 remaining = context->hscroll_a & 0xF; | |
| 701 memcpy(context->tmp_buf_a + SCROLL_BUFFER_DRAW - remaining, context->tmp_buf_a + SCROLL_BUFFER_SIZE - remaining, remaining); | |
| 702 } | |
|
39
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
changeset
|
703 remaining = context->hscroll_b & 0xF; |
|
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
changeset
|
704 memcpy(context->tmp_buf_b + SCROLL_BUFFER_DRAW - remaining, context->tmp_buf_b + SCROLL_BUFFER_SIZE - remaining, remaining); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
705 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
706 |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
707 #define COLUMN_RENDER_BLOCK(column, startcyc) \ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
708 case startcyc:\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
709 read_map_scroll_a(column, line, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
710 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
711 case (startcyc+1):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
712 external_slot(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
713 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
714 case (startcyc+2):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
715 render_map_1(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
716 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
717 case (startcyc+3):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
718 render_map_2(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
719 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
720 case (startcyc+4):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
721 read_map_scroll_b(column, line, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
722 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
723 case (startcyc+5):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
724 read_sprite_x(line, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
725 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
726 case (startcyc+6):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
727 render_map_3(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
728 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
729 case (startcyc+7):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
730 render_map_output(line, column, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
731 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
732 |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
733 #define COLUMN_RENDER_BLOCK_REFRESH(column, startcyc) \ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
734 case startcyc:\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
735 read_map_scroll_a(column, line, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
736 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
737 case (startcyc+1):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
738 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
739 case (startcyc+2):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
740 render_map_1(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
741 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
742 case (startcyc+3):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
743 render_map_2(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
744 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
745 case (startcyc+4):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
746 read_map_scroll_b(column, line, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
747 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
748 case (startcyc+5):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
749 read_sprite_x(line, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
750 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
751 case (startcyc+6):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
752 render_map_3(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
753 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
754 case (startcyc+7):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
755 render_map_output(line, column, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
756 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
757 |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
758 void vdp_h40(uint32_t line, uint32_t linecyc, vdp_context * context) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
759 { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
760 uint16_t address; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
761 uint32_t mask; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
762 switch(linecyc) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
763 { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
764 //sprite render to line buffer starts |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
765 case 0: |
|
26
a7c2b92d8056
Fix management of context->sprite_draws so the sprite layer only draws when it should
Mike Pavone <pavone@retrodev.com>
parents:
25
diff
changeset
|
766 context->cur_slot = MAX_DRAWS-1; |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
767 memset(context->linebuf, 0, LINEBUF_SIZE); |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
768 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
769 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
770 case 1: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
771 case 2: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
772 case 3: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
773 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
774 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
775 //sprite attribute table scan starts |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
776 case 4: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
777 render_sprite_cells( context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
778 context->sprite_index = 0x80; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
779 context->slot_counter = MAX_SPRITES_LINE; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
780 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
781 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
782 case 5: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
783 case 6: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
784 case 7: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
785 case 8: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
786 case 9: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
787 case 10: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
788 case 11: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
789 case 12: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
790 case 13: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
791 case 14: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
792 case 15: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
793 case 16: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
794 case 17: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
795 case 18: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
796 case 19: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
797 case 20: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
798 //!HSYNC asserted |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
799 case 21: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
800 case 22: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
801 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
802 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
803 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
804 case 23: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
805 external_slot(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
806 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
807 case 24: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
808 case 25: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
809 case 26: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
810 case 27: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
811 case 28: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
812 case 29: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
813 case 30: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
814 case 31: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
815 case 32: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
816 case 33: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
817 case 34: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
818 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
819 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
820 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
821 case 35: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
822 address = (context->regs[REG_HSCROLL] & 0x3F) << 10; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
823 mask = 0; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
824 if (context->regs[REG_MODE_3] & 0x2) { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
825 mask |= 0xF8; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
826 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
827 if (context->regs[REG_MODE_3] & 0x1) { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
828 mask |= 0x7; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
829 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
830 line &= mask; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
831 address += line * 4; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
832 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1]; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
833 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3]; |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
834 //printf("%d: HScroll A: %d, HScroll B: %d\n", line, context->hscroll_a, context->hscroll_b); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
835 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
836 case 36: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
837 //!HSYNC high |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
838 case 37: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
839 case 38: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
840 case 39: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
841 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
842 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
843 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
844 case 40: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
845 read_map_scroll_a(0, line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
846 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
847 case 41: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
848 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
849 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
850 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
851 case 42: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
852 render_map_1(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
853 scan_sprite_table(line, context);//Just a guess |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
854 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
855 case 43: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
856 render_map_2(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
857 scan_sprite_table(line, context);//Just a guess |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
858 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
859 case 44: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
860 read_map_scroll_b(0, line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
861 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
862 case 45: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
863 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
864 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
865 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
866 case 46: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
867 render_map_3(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
868 scan_sprite_table(line, context);//Just a guess |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
869 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
870 case 47: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
871 render_map_output(line, 0, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
872 scan_sprite_table(line, context);//Just a guess |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
873 //reverse context slot counter so it counts the number of sprite slots |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
874 //filled rather than the number of available slots |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
875 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter; |
|
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
876 context->cur_slot = MAX_SPRITES_LINE-1; |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
877 context->sprite_draws = MAX_DRAWS; |
|
36
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
878 context->flags &= (~FLAG_CAN_MASK & ~FLAG_MASKED); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
879 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
880 COLUMN_RENDER_BLOCK(2, 48) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
881 COLUMN_RENDER_BLOCK(4, 56) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
882 COLUMN_RENDER_BLOCK(6, 64) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
883 COLUMN_RENDER_BLOCK_REFRESH(8, 72) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
884 COLUMN_RENDER_BLOCK(10, 80) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
885 COLUMN_RENDER_BLOCK(12, 88) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
886 COLUMN_RENDER_BLOCK(14, 96) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
887 COLUMN_RENDER_BLOCK_REFRESH(16, 104) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
888 COLUMN_RENDER_BLOCK(18, 112) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
889 COLUMN_RENDER_BLOCK(20, 120) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
890 COLUMN_RENDER_BLOCK(22, 128) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
891 COLUMN_RENDER_BLOCK_REFRESH(24, 136) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
892 COLUMN_RENDER_BLOCK(26, 144) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
893 COLUMN_RENDER_BLOCK(28, 152) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
894 COLUMN_RENDER_BLOCK(30, 160) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
895 COLUMN_RENDER_BLOCK_REFRESH(32, 168) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
896 COLUMN_RENDER_BLOCK(34, 176) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
897 COLUMN_RENDER_BLOCK(36, 184) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
898 COLUMN_RENDER_BLOCK(38, 192) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
899 COLUMN_RENDER_BLOCK_REFRESH(40, 200) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
900 case 208: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
901 case 209: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
902 external_slot(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
903 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
904 default: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
905 //leftovers from HSYNC clock change nonsense |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
906 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
907 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
908 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
909 |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
910 void vdp_h32(uint32_t line, uint32_t linecyc, vdp_context * context) |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
911 { |
| 37 | 912 uint16_t address; |
| 913 uint32_t mask; | |
|
20
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
914 switch(linecyc) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
915 { |
|
f664eeb55cb4
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
916 //sprite render to line buffer starts |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
917 case 0: |
| 37 | 918 context->cur_slot = MAX_DRAWS_H32-1; |
| 919 memset(context->linebuf, 0, LINEBUF_SIZE); | |
| 920 render_sprite_cells(context); | |
|
20
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
921 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
922 case 1: |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
923 case 2: |
| 37 | 924 case 3: |
| 925 render_sprite_cells(context); | |
|
20
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
926 break; |
| 37 | 927 //sprite attribute table scan starts |
|
20
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
928 case 4: |
| 37 | 929 render_sprite_cells( context); |
| 930 context->sprite_index = 0x80; | |
| 931 context->slot_counter = MAX_SPRITES_LINE_H32; | |
| 932 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
933 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
934 case 5: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
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|
935 case 6: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
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|
936 case 7: |
|
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
937 case 8: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
938 case 9: |
|
f664eeb55cb4
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parents:
diff
changeset
|
939 case 10: |
|
f664eeb55cb4
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
940 case 11: |
|
f664eeb55cb4
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
941 case 12: |
|
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parents:
diff
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|
942 case 13: |
| 37 | 943 render_sprite_cells(context); |
| 944 scan_sprite_table(line, context); | |
|
20
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parents:
diff
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|
945 case 14: |
| 37 | 946 external_slot(context); |
|
20
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parents:
diff
changeset
|
947 break; |
|
f664eeb55cb4
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
948 case 15: |
|
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
949 case 16: |
|
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
950 case 17: |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
951 case 18: |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
952 case 19: |
| 37 | 953 //HSYNC start |
|
20
f664eeb55cb4
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
954 case 20: |
|
f664eeb55cb4
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
955 case 21: |
|
f664eeb55cb4
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
956 case 22: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
957 case 23: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
958 case 24: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
959 case 25: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
960 case 26: |
| 37 | 961 render_sprite_cells(context); |
| 962 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
963 break; |
|
f664eeb55cb4
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
964 case 27: |
| 37 | 965 external_slot(context); |
|
20
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
966 break; |
|
f664eeb55cb4
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
967 case 28: |
| 37 | 968 address = (context->regs[REG_HSCROLL] & 0x3F) << 10; |
| 969 mask = 0; | |
| 970 if (context->regs[REG_MODE_3] & 0x2) { | |
| 971 mask |= 0xF8; | |
| 972 } | |
| 973 if (context->regs[REG_MODE_3] & 0x1) { | |
| 974 mask |= 0x7; | |
| 975 } | |
| 976 line &= mask; | |
| 977 address += line * 4; | |
| 978 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1]; | |
| 979 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3]; | |
| 980 //printf("%d: HScroll A: %d, HScroll B: %d\n", line, context->hscroll_a, context->hscroll_b); | |
|
20
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
981 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
982 case 29: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
983 case 30: |
|
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
984 case 31: |
| 37 | 985 case 32: |
| 986 render_sprite_cells(context); | |
| 987 scan_sprite_table(line, context); | |
|
20
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
988 break; |
| 37 | 989 //!HSYNC high |
|
20
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
990 case 33: |
| 37 | 991 read_map_scroll_a(0, line, context); |
|
20
f664eeb55cb4
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parents:
diff
changeset
|
992 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
993 case 34: |
| 37 | 994 render_sprite_cells(context); |
| 995 scan_sprite_table(line, context); | |
|
20
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parents:
diff
changeset
|
996 break; |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
997 case 35: |
| 37 | 998 render_map_1(context); |
| 999 scan_sprite_table(line, context);//Just a guess | |
|
20
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parents:
diff
changeset
|
1000 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1001 case 36: |
| 37 | 1002 render_map_2(context); |
| 1003 scan_sprite_table(line, context);//Just a guess | |
|
20
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1004 break; |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1005 case 37: |
| 37 | 1006 read_map_scroll_b(0, line, context); |
|
20
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1007 break; |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1008 case 38: |
| 37 | 1009 render_sprite_cells(context); |
| 1010 scan_sprite_table(line, context); | |
|
20
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1011 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1012 case 39: |
| 37 | 1013 render_map_3(context); |
| 1014 scan_sprite_table(line, context);//Just a guess | |
|
20
f664eeb55cb4
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1015 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1016 case 40: |
| 37 | 1017 render_map_output(line, 0, context); |
| 1018 scan_sprite_table(line, context);//Just a guess | |
| 1019 //reverse context slot counter so it counts the number of sprite slots | |
| 1020 //filled rather than the number of available slots | |
| 1021 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter; | |
| 1022 context->cur_slot = MAX_SPRITES_LINE_H32-1; | |
| 1023 context->sprite_draws = MAX_DRAWS_H32; | |
| 1024 context->flags &= (~FLAG_CAN_MASK & ~FLAG_MASKED); | |
|
20
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parents:
diff
changeset
|
1025 break; |
| 37 | 1026 COLUMN_RENDER_BLOCK(2, 41) |
| 1027 COLUMN_RENDER_BLOCK(4, 49) | |
| 1028 COLUMN_RENDER_BLOCK(6, 57) | |
| 1029 COLUMN_RENDER_BLOCK_REFRESH(8, 65) | |
| 1030 COLUMN_RENDER_BLOCK(10, 73) | |
| 1031 COLUMN_RENDER_BLOCK(12, 81) | |
| 1032 COLUMN_RENDER_BLOCK(14, 89) | |
| 1033 COLUMN_RENDER_BLOCK_REFRESH(16, 97) | |
| 1034 COLUMN_RENDER_BLOCK(18, 105) | |
| 1035 COLUMN_RENDER_BLOCK(20, 113) | |
| 1036 COLUMN_RENDER_BLOCK(22, 121) | |
| 1037 COLUMN_RENDER_BLOCK_REFRESH(24, 129) | |
| 1038 COLUMN_RENDER_BLOCK(26, 137) | |
| 1039 COLUMN_RENDER_BLOCK(28, 145) | |
| 1040 COLUMN_RENDER_BLOCK(30, 153) | |
| 1041 COLUMN_RENDER_BLOCK_REFRESH(32, 161) | |
|
20
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parents:
diff
changeset
|
1042 case 169: |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1043 case 170: |
| 37 | 1044 external_slot(context); |
|
20
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parents:
diff
changeset
|
1045 break; |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1046 } |
|
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1047 } |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1048 void latch_mode(vdp_context * context) |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1049 { |
|
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parents:
diff
changeset
|
1050 context->latched_mode = (context->regs[REG_MODE_4] & 0x81) | (context->regs[REG_MODE_2] & BIT_PAL); |
|
f664eeb55cb4
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1051 } |
|
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parents:
diff
changeset
|
1052 |
|
54
3b79cbcf6846
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parents:
43
diff
changeset
|
1053 int is_refresh(vdp_context * context) |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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43
diff
changeset
|
1054 { |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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parents:
43
diff
changeset
|
1055 uint32_t linecyc = context->cycles % MCLKS_LINE; |
|
3b79cbcf6846
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parents:
43
diff
changeset
|
1056 if (context->latched_mode & BIT_H40) { |
|
3b79cbcf6846
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parents:
43
diff
changeset
|
1057 linecyc = linecyc/16; |
|
189
806c3b7a6f2a
Fix background rendering when display is off and improve refresh cycle emulation so that direct color DMA demos work
Mike Pavone <pavone@retrodev.com>
parents:
180
diff
changeset
|
1058 //TODO: Figure out the exact behavior that reduces DMA slots for direct color DMA demos |
|
806c3b7a6f2a
Fix background rendering when display is off and improve refresh cycle emulation so that direct color DMA demos work
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parents:
180
diff
changeset
|
1059 return (linecyc == 37 || linecyc == 69 || linecyc == 102 || linecyc == 133 || linecyc == 165 || linecyc == 197 || linecyc >= 210 || (linecyc < 6 && (context->flags & FLAG_DMA_RUN) && ((context->dma_cd & 0xF) == CRAM_WRITE))); |
|
54
3b79cbcf6846
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parents:
43
diff
changeset
|
1060 } else { |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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parents:
43
diff
changeset
|
1061 linecyc = linecyc/20; |
|
189
806c3b7a6f2a
Fix background rendering when display is off and improve refresh cycle emulation so that direct color DMA demos work
Mike Pavone <pavone@retrodev.com>
parents:
180
diff
changeset
|
1062 //TODO: Figure out which slots are refresh when display is off in 32-cell mode |
|
191
1b4d856b067a
Fixes for direct color dma stuff
Mike Pavone <pavone@retrodev.com>
parents:
190
diff
changeset
|
1063 //These numbers are guesses based on H40 numbers |
|
1b4d856b067a
Fixes for direct color dma stuff
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parents:
190
diff
changeset
|
1064 return (linecyc == 24 || linecyc == 56 || linecyc == 88 || linecyc == 120 || linecyc == 152 || (linecyc < 5 && (context->flags & FLAG_DMA_RUN) && ((context->dma_cd & 0xF) == CRAM_WRITE))); |
|
189
806c3b7a6f2a
Fix background rendering when display is off and improve refresh cycle emulation so that direct color DMA demos work
Mike Pavone <pavone@retrodev.com>
parents:
180
diff
changeset
|
1065 //The numbers below are the refresh slots during active display |
|
191
1b4d856b067a
Fixes for direct color dma stuff
Mike Pavone <pavone@retrodev.com>
parents:
190
diff
changeset
|
1066 //return (linecyc == 66 || linecyc == 98 || linecyc == 130 || linecyc == 162); |
|
54
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Get Flavio's color bar demo kind of sort of working
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parents:
43
diff
changeset
|
1067 } |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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parents:
43
diff
changeset
|
1068 } |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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parents:
43
diff
changeset
|
1069 |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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parents:
43
diff
changeset
|
1070 void check_render_bg(vdp_context * context, int32_t line) |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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parents:
43
diff
changeset
|
1071 { |
|
3b79cbcf6846
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parents:
43
diff
changeset
|
1072 if (line > 0) { |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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parents:
43
diff
changeset
|
1073 line -= 1; |
|
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1074 uint16_t * start = NULL, *end = NULL; |
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1075 uint32_t linecyc = (context->cycles % MCLKS_LINE); |
|
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1076 if (context->latched_mode & BIT_H40) { |
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1077 linecyc /= 16; |
|
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1078 if (linecyc >= 50 && linecyc < 210) { |
|
190
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1079 uint32_t x = (linecyc-50)*2; |
|
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|
1080 start = context->framebuf + line * 320 + x; |
|
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1081 end = start + 2; |
|
54
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|
1082 } |
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1083 } else { |
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|
1084 linecyc /= 20; |
|
189
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1085 if (linecyc >= 43 && linecyc < 171) { |
|
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1086 uint32_t x = (linecyc-43)*2; |
|
191
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1087 start = context->framebuf + line * 320 + x; |
|
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1088 end = start + 2; |
|
54
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1089 } |
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1090 } |
|
291
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1091 uint16_t color = (context->cram[context->regs[REG_BG_COLOR] & 0x3F] & 0xEEE); |
|
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1092 while (start != end) { |
|
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1093 *start = color; |
|
54
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1094 ++start; |
|
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1095 } |
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1096 } |
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1097 } |
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1098 |
|
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1099 void vdp_run_context(vdp_context * context, uint32_t target_cycles) |
|
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1100 { |
|
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1101 while(context->cycles < target_cycles) |
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1102 { |
|
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1103 uint32_t line = context->cycles / MCLKS_LINE; |
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1104 uint32_t active_lines = context->latched_mode & BIT_PAL ? PAL_ACTIVE : NTSC_ACTIVE; |
|
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1105 if (!line) { |
|
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|
1106 latch_mode(context); |
|
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1107 } |
|
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1108 uint32_t linecyc = context->cycles % MCLKS_LINE; |
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1109 if (linecyc == 0) { |
|
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1110 if (line <= 1 || line >= active_lines) { |
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1111 context->hint_counter = context->regs[REG_HINT]; |
|
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1112 } else if (context->hint_counter) { |
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1113 context->hint_counter--; |
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1114 } else { |
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1115 context->flags2 |= FLAG2_HINT_PENDING; |
|
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1116 context->hint_counter = context->regs[REG_HINT]; |
|
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1117 } |
|
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1118 } else if(line == active_lines) { |
|
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1119 uint32_t intcyc = context->latched_mode & BIT_H40 ? (148 + 40) * 4 : (132 + 28) * 5;; |
|
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1120 if (linecyc == intcyc) { |
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1121 context->flags2 |= FLAG2_VINT_PENDING; |
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1122 } |
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1123 } |
|
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1124 if (line < active_lines && context->regs[REG_MODE_2] & DISPLAY_ENABLE) { |
|
20
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1125 //first sort-of active line is treated as 255 internally |
|
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1126 //it's used for gathering sprite info for line |
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1127 line = (line - 1) & 0xFF; |
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1128 |
|
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1129 //Convert to slot number |
|
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1130 if (context->latched_mode & BIT_H40){ |
|
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|
1131 //TODO: Deal with nasty clock switching during HBLANK |
|
317
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|
1132 uint32_t clock_inc = MCLKS_LINE-linecyc < 16 ? MCLKS_LINE-linecyc : 16; |
|
20
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|
1133 linecyc = linecyc/16; |
|
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|
1134 vdp_h40(line, linecyc, context); |
|
317
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|
1135 context->cycles += clock_inc; |
|
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|
1136 } else { |
|
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|
1137 linecyc = linecyc/20; |
|
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|
1138 vdp_h32(line, linecyc, context); |
|
20
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|
1139 context->cycles += 20; |
|
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|
1140 } |
|
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|
1141 } else { |
|
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|
1142 if (!is_refresh(context)) { |
|
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|
1143 external_slot(context); |
|
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|
1144 } |
|
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|
1145 if (line < active_lines) { |
|
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43
diff
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|
1146 check_render_bg(context, line); |
|
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|
1147 } |
|
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|
1148 if (context->latched_mode & BIT_H40){ |
|
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|
1149 uint32_t clock_inc = MCLKS_LINE-linecyc < 16 ? MCLKS_LINE-linecyc : 16; |
|
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|
1150 //TODO: Deal with nasty clock switching during HBLANK |
|
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|
1151 context->cycles += clock_inc; |
|
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|
1152 } else { |
|
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|
1153 context->cycles += 20; |
|
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|
1154 } |
|
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|
1155 } |
|
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|
1156 } |
|
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1157 } |
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1158 |
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|
1159 uint32_t vdp_run_to_vblank(vdp_context * context) |
|
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|
1160 { |
|
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1161 uint32_t target_cycles = ((context->latched_mode & BIT_PAL) ? PAL_ACTIVE : NTSC_ACTIVE) * MCLKS_LINE; |
|
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|
1162 vdp_run_context(context, target_cycles); |
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|
1163 return context->cycles; |
|
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|
1164 } |
|
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|
1165 |
| 75 | 1166 void vdp_run_dma_done(vdp_context * context, uint32_t target_cycles) |
| 1167 { | |
| 1168 for(;;) { | |
| 1169 uint32_t dmalen = (context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L]; | |
| 1170 if (!dmalen) { | |
| 1171 dmalen = 0x10000; | |
| 1172 } | |
| 1173 uint32_t min_dma_complete = dmalen * (context->latched_mode & BIT_H40 ? 16 : 20); | |
| 1174 if ((context->regs[REG_DMASRC_H] & 0xC0) == 0xC0 || (context->cd & 0xF) == VRAM_WRITE) { | |
| 1175 //DMA copies take twice as long to complete since they require a read and a write | |
| 1176 //DMA Fills and transfers to VRAM also take twice as long as it requires 2 writes for a single word | |
| 1177 min_dma_complete *= 2; | |
| 1178 } | |
| 1179 min_dma_complete += context->cycles; | |
| 1180 if (target_cycles < min_dma_complete) { | |
| 1181 vdp_run_context(context, target_cycles); | |
| 1182 return; | |
| 1183 } else { | |
| 1184 vdp_run_context(context, min_dma_complete); | |
| 1185 if (!(context->flags & FLAG_DMA_RUN)) { | |
| 1186 return; | |
| 1187 } | |
| 1188 } | |
| 1189 } | |
| 1190 } | |
| 1191 | |
| 1192 int vdp_control_port_write(vdp_context * context, uint16_t value) | |
|
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1193 { |
|
58
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56
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|
1194 //printf("control port write: %X\n", value); |
|
149
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|
1195 if (context->flags & FLAG_DMA_RUN) { |
|
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|
1196 return -1; |
|
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|
1197 } |
|
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|
1198 if (context->flags & FLAG_PENDING) { |
|
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|
1199 context->address = (context->address & 0x3FFF) | (value << 14); |
|
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Get Flavio's color bar demo kind of sort of working
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43
diff
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|
1200 context->cd = (context->cd & 0x3) | ((value >> 2) & 0x3C); |
| 75 | 1201 context->flags &= ~FLAG_PENDING; |
|
87
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
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84
diff
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|
1202 //printf("New Address: %X, New CD: %X\n", context->address, context->cd); |
|
327
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Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
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323
diff
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|
1203 if (context->cd & 0x20 && (context->regs[REG_MODE_2] & BIT_DMA_ENABLE)) { |
|
1b00258b1f29
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323
diff
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|
1204 // |
| 75 | 1205 if((context->regs[REG_DMASRC_H] & 0xC0) != 0x80) { |
| 1206 //DMA copy or 68K -> VDP, transfer starts immediately | |
| 1207 context->flags |= FLAG_DMA_RUN; | |
|
131
8fc8e46be691
Fix bug that was causing DMA fills to lock up under certain circumstances
Mike Pavone <pavone@retrodev.com>
parents:
109
diff
changeset
|
1208 context->dma_cd = context->cd; |
| 75 | 1209 if (!(context->regs[REG_DMASRC_H] & 0x80)) { |
|
327
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|
1210 //printf("DMA Address: %X, New CD: %X, Source: %X, Length: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->regs[REG_DMALEN_H] << 8 | context->regs[REG_DMALEN_L]); |
| 75 | 1211 return 1; |
|
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
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323
diff
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|
1212 } else { |
|
1b00258b1f29
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323
diff
changeset
|
1213 //printf("DMA Copy Address: %X, New CD: %X, Source: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); |
| 75 | 1214 } |
|
327
1b00258b1f29
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Mike Pavone <pavone@retrodev.com>
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|
1215 } else { |
|
1b00258b1f29
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diff
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|
1216 //printf("DMA Fill Address: %X, New CD: %X\n", context->address, context->cd); |
| 75 | 1217 } |
|
63
a6dd5b7a971b
Add FPS counter to console output
Mike Pavone <pavone@retrodev.com>
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58
diff
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|
1218 } |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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diff
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|
1219 } else { |
|
3b79cbcf6846
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diff
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|
1220 if ((value & 0xC000) == 0x8000) { |
|
3b79cbcf6846
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diff
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|
1221 //Register write |
|
3b79cbcf6846
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diff
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|
1222 uint8_t reg = (value >> 8) & 0x1F; |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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43
diff
changeset
|
1223 if (reg < VDP_REGS) { |
|
87
60b5c9e2f4e0
vertical interrupts now work
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84
diff
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|
1224 //printf("register %d set to %X\n", reg, value & 0xFF); |
|
54
3b79cbcf6846
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43
diff
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|
1225 context->regs[reg] = value; |
|
151
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
changeset
|
1226 if (reg == REG_MODE_2) { |
|
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
changeset
|
1227 //printf("Display is now %s\n", (context->regs[REG_MODE_2] & DISPLAY_ENABLE) ? "enabled" : "disabled"); |
|
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
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149
diff
changeset
|
1228 } |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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43
diff
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|
1229 } |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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diff
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|
1230 } else { |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
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43
diff
changeset
|
1231 context->flags |= FLAG_PENDING; |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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43
diff
changeset
|
1232 context->address = (context->address &0xC000) | (value & 0x3FFF); |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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43
diff
changeset
|
1233 context->cd = (context->cd &0x3C) | (value >> 14); |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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43
diff
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|
1234 } |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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43
diff
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|
1235 } |
| 75 | 1236 return 0; |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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43
diff
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|
1237 } |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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43
diff
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|
1238 |
|
149
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
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143
diff
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|
1239 int vdp_data_port_write(vdp_context * context, uint16_t value) |
|
54
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Get Flavio's color bar demo kind of sort of working
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43
diff
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|
1240 { |
|
58
a6a19c45d358
Properly zero-init all VDP buffers. Comment out some debug printfs.
Mike Pavone <pavone@retrodev.com>
parents:
56
diff
changeset
|
1241 //printf("data port write: %X\n", value); |
|
149
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Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
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|
1242 if (context->flags & FLAG_DMA_RUN) { |
|
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
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143
diff
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|
1243 return -1; |
|
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
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diff
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|
1244 } |
|
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
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143
diff
changeset
|
1245 if (!(context->cd & 1)) { |
|
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
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143
diff
changeset
|
1246 //ignore writes when cd is configured for read |
|
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
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143
diff
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|
1247 return 0; |
|
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
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143
diff
changeset
|
1248 } |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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43
diff
changeset
|
1249 context->flags &= ~FLAG_PENDING; |
|
109
004dd46e0a97
COmment out fifo full debug printf
Mike Pavone <pavone@retrodev.com>
parents:
108
diff
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|
1250 /*if (context->fifo_cur == context->fifo_end) { |
|
54
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Get Flavio's color bar demo kind of sort of working
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diff
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|
1251 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles); |
|
109
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COmment out fifo full debug printf
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108
diff
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|
1252 }*/ |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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43
diff
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|
1253 while (context->fifo_cur == context->fifo_end) { |
|
3b79cbcf6846
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diff
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|
1254 vdp_run_context(context, context->cycles + ((context->latched_mode & BIT_H40) ? 16 : 20)); |
|
3b79cbcf6846
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diff
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|
1255 } |
|
3b79cbcf6846
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43
diff
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|
1256 context->fifo_cur->cycle = context->cycles; |
| 138 | 1257 context->fifo_cur->address = context->address; |
|
54
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43
diff
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|
1258 context->fifo_cur->value = value; |
| 138 | 1259 context->fifo_cur->cd = context->cd; |
|
54
3b79cbcf6846
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diff
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|
1260 context->fifo_cur->partial = 0; |
|
3b79cbcf6846
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43
diff
changeset
|
1261 context->fifo_cur++; |
| 138 | 1262 context->address += context->regs[REG_AUTOINC]; |
|
149
139e5dcd6aa3
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Mike Pavone <pavone@retrodev.com>
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143
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|
1263 return 0; |
|
54
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diff
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|
1264 } |
|
3b79cbcf6846
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diff
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|
1265 |
|
3b79cbcf6846
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43
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changeset
|
1266 uint16_t vdp_control_port_read(vdp_context * context) |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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diff
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|
1267 { |
|
3b79cbcf6846
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|
1268 context->flags &= ~FLAG_PENDING; |
|
3b79cbcf6846
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diff
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|
1269 uint16_t value = 0x3400; |
|
3b79cbcf6846
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43
diff
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|
1270 if (context->fifo_cur == (context->fifo_end - FIFO_SIZE)) { |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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43
diff
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|
1271 value |= 0x200; |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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diff
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|
1272 } |
|
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diff
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|
1273 if (context->fifo_cur == context->fifo_end) { |
|
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diff
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|
1274 value |= 0x100; |
|
3b79cbcf6846
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43
diff
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|
1275 } |
|
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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291
diff
changeset
|
1276 if (context->flags2 & FLAG2_VINT_PENDING) { |
|
e5e8b48ad157
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291
diff
changeset
|
1277 value |- 0x80; |
|
e5e8b48ad157
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diff
changeset
|
1278 } |
|
318
789f2f5f2277
Implement hblank flag in status register
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317
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changeset
|
1279 uint32_t line= context->cycles / MCLKS_LINE; |
|
789f2f5f2277
Implement hblank flag in status register
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diff
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|
1280 uint32_t linecyc = context->cycles % MCLKS_LINE; |
|
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317
diff
changeset
|
1281 if (line >= (context->latched_mode & BIT_PAL ? PAL_ACTIVE : NTSC_ACTIVE)) { |
|
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Implement hblank flag in status register
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diff
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|
1282 value |= 0x8; |
|
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diff
changeset
|
1283 } |
|
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changeset
|
1284 if (linecyc < (context->latched_mode & BIT_H40 ? (148 + 61) * 4 : ( + 46) * 5)) { |
|
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317
diff
changeset
|
1285 value |= 0x4; |
|
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diff
changeset
|
1286 } |
|
149
139e5dcd6aa3
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changeset
|
1287 if (context->flags & FLAG_DMA_RUN) { |
|
141
576f55711d8d
Fix DMA in progress flag in VDP status register
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138
diff
changeset
|
1288 value |= 0x2; |
| 75 | 1289 } |
|
317
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diff
changeset
|
1290 if (context->latched_mode & BIT_PAL) {//Not sure about this, need to verify |
|
e5e8b48ad157
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291
diff
changeset
|
1291 value |= 0x1; |
|
e5e8b48ad157
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diff
changeset
|
1292 } |
|
318
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317
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changeset
|
1293 //TODO: Sprite overflow, sprite collision, odd frame flag |
|
54
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|
1294 return value; |
|
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|
1295 } |
|
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|
1296 |
|
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changeset
|
1297 uint16_t vdp_data_port_read(vdp_context * context) |
|
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|
1298 { |
|
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changeset
|
1299 context->flags &= ~FLAG_PENDING; |
| 138 | 1300 if (context->cd & 1) { |
|
54
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|
1301 return 0; |
|
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|
1302 } |
|
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|
1303 //Not sure if the FIFO should be drained before processing a read or not, but it would make sense |
|
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|
1304 context->flags &= ~FLAG_UNUSED_SLOT; |
|
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changeset
|
1305 while (!(context->flags & FLAG_UNUSED_SLOT)) { |
|
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|
1306 vdp_run_context(context, context->cycles + ((context->latched_mode & BIT_H40) ? 16 : 20)); |
|
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|
1307 } |
|
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diff
changeset
|
1308 uint16_t value = 0; |
| 138 | 1309 switch (context->cd & 0xF) |
|
54
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|
1310 { |
|
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|
1311 case VRAM_READ: |
|
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|
1312 value = context->vdpmem[context->address] << 8; |
|
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|
1313 context->flags &= ~FLAG_UNUSED_SLOT; |
|
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|
1314 while (!(context->flags & FLAG_UNUSED_SLOT)) { |
|
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changeset
|
1315 vdp_run_context(context, context->cycles + ((context->latched_mode & BIT_H40) ? 16 : 20)); |
|
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diff
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|
1316 } |
|
3b79cbcf6846
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diff
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|
1317 value |= context->vdpmem[context->address ^ 1]; |
|
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diff
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|
1318 break; |
|
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diff
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|
1319 case CRAM_READ: |
|
3b79cbcf6846
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diff
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|
1320 value = context->cram[(context->address/2) & (CRAM_SIZE-1)]; |
|
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diff
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|
1321 break; |
|
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diff
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|
1322 case VSRAM_READ: |
|
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diff
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|
1323 if (((context->address / 2) & 63) < VSRAM_SIZE) { |
|
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43
diff
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|
1324 value = context->vsram[context->address & 63]; |
|
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diff
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|
1325 } |
|
3b79cbcf6846
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diff
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|
1326 break; |
|
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diff
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|
1327 } |
|
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diff
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|
1328 context->address += context->regs[REG_AUTOINC]; |
|
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diff
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|
1329 return value; |
|
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diff
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|
1330 } |
|
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|
1331 |
| 137 | 1332 uint16_t vdp_hv_counter_read(vdp_context * context) |
| 1333 { | |
| 1334 uint32_t line= context->cycles / MCLKS_LINE; | |
| 1335 if (!line) { | |
| 1336 line = 0xFF; | |
| 1337 } else { | |
| 1338 line--; | |
| 1339 if (line > 0xEA) { | |
| 1340 line = (line + 0xFA) & 0xFF; | |
| 1341 } | |
| 1342 } | |
| 1343 uint32_t linecyc = context->cycles % MCLKS_LINE; | |
| 1344 if (context->latched_mode & BIT_H40) { | |
| 1345 linecyc /= 8; | |
| 1346 if (linecyc >= 86) { | |
| 1347 linecyc -= 86; | |
| 1348 } else { | |
| 1349 linecyc += 334; | |
| 1350 } | |
| 1351 if (linecyc > 0x16C) { | |
| 1352 linecyc += 92; | |
| 1353 } | |
| 1354 } else { | |
| 1355 linecyc /= 10; | |
| 1356 if (linecyc >= 74) { | |
| 1357 linecyc -= 74; | |
| 1358 } else { | |
| 1359 linecyc += 268; | |
| 1360 } | |
| 1361 if (linecyc > 0x127) { | |
| 1362 linecyc += 170; | |
| 1363 } | |
| 1364 } | |
| 1365 linecyc &= 0xFF; | |
| 1366 return (line << 8) | linecyc; | |
| 1367 } | |
| 1368 | |
|
65
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diff
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|
1369 void vdp_adjust_cycles(vdp_context * context, uint32_t deduction) |
|
aef6302770c2
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|
1370 { |
|
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|
1371 context->cycles -= deduction; |
|
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diff
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|
1372 for(fifo_entry * start = (context->fifo_end - FIFO_SIZE); start < context->fifo_cur; start++) { |
|
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diff
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|
1373 if (start->cycle >= deduction) { |
|
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diff
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|
1374 start->cycle -= deduction; |
|
aef6302770c2
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diff
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|
1375 } else { |
|
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diff
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|
1376 start->cycle = 0; |
|
aef6302770c2
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diff
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|
1377 } |
|
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|
1378 } |
|
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|
1379 } |
|
aef6302770c2
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|
1380 |
|
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|
1381 uint32_t vdp_next_hint(vdp_context * context) |
|
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|
1382 { |
|
327
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|
1383 if (!(context->regs[REG_MODE_1] & BIT_HINT_EN)) { |
|
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|
1384 return 0xFFFFFFFF; |
|
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|
1385 } |
|
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|
1386 if (context->flags2 & FLAG2_HINT_PENDING) { |
|
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|
1387 return context->cycles; |
|
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|
1388 } |
|
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|
1389 uint32_t active_lines = context->latched_mode & BIT_PAL ? PAL_ACTIVE : NTSC_ACTIVE; |
|
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diff
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|
1390 uint32_t line = context->cycles / MCLKS_LINE; |
|
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|
1391 if (line >= active_lines) { |
|
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|
1392 return 0xFFFFFFFF; |
|
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|
1393 } |
|
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291
diff
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|
1394 uint32_t linecyc = context->cycles % MCLKS_LINE; |
|
e5e8b48ad157
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diff
changeset
|
1395 uint32_t hcycle = context->cycles + context->hint_counter * MCLKS_LINE + MCLKS_LINE - linecyc; |
|
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diff
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|
1396 if (!line) { |
|
e5e8b48ad157
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diff
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|
1397 hcycle += MCLKS_LINE; |
|
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291
diff
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|
1398 } |
|
e5e8b48ad157
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Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
1399 return hcycle; |
|
e5e8b48ad157
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Mike Pavone <pavone@retrodev.com>
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291
diff
changeset
|
1400 } |
|
e5e8b48ad157
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291
diff
changeset
|
1401 |
|
e5e8b48ad157
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Mike Pavone <pavone@retrodev.com>
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291
diff
changeset
|
1402 uint32_t vdp_next_vint(vdp_context * context) |
|
e5e8b48ad157
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Mike Pavone <pavone@retrodev.com>
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291
diff
changeset
|
1403 { |
|
327
1b00258b1f29
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Mike Pavone <pavone@retrodev.com>
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323
diff
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|
1404 if (!(context->regs[REG_MODE_2] & BIT_VINT_EN)) { |
|
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
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291
diff
changeset
|
1405 return 0xFFFFFFFF; |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
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291
diff
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|
1406 } |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
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291
diff
changeset
|
1407 if (context->flags2 & FLAG2_VINT_PENDING) { |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
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291
diff
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|
1408 return context->cycles; |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
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291
diff
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|
1409 } |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
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291
diff
changeset
|
1410 uint32_t active_lines = context->latched_mode & BIT_PAL ? PAL_ACTIVE : NTSC_ACTIVE; |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
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291
diff
changeset
|
1411 uint32_t vcycle = MCLKS_LINE * active_lines; |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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291
diff
changeset
|
1412 if (context->latched_mode & BIT_H40) { |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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291
diff
changeset
|
1413 vcycle += (148 + 40) * 4; |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
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291
diff
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|
1414 } else { |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
1415 vcycle += (132 + 28) * 5; |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
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291
diff
changeset
|
1416 } |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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291
diff
changeset
|
1417 if (vcycle < context->cycles) { |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
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291
diff
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|
1418 return 0xFFFFFFFF; |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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291
diff
changeset
|
1419 } |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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291
diff
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|
1420 return vcycle; |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
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291
diff
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|
1421 } |
|
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Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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291
diff
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|
1422 |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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291
diff
changeset
|
1423 void vdp_int_ack(vdp_context * context, uint16_t int_num) |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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291
diff
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|
1424 { |
|
e5e8b48ad157
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291
diff
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|
1425 if (int_num == 6) { |
|
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Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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291
diff
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|
1426 context->flags2 &= ~FLAG2_VINT_PENDING; |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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291
diff
changeset
|
1427 } else if(int_num ==4) { |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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291
diff
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|
1428 context->flags2 &= ~FLAG2_HINT_PENDING; |
|
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Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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291
diff
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|
1429 } |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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291
diff
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|
1430 } |
|
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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diff
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|
1431 |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
1432 #define GST_VDP_REGS 0xFA |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
1433 #define GST_VDP_MEM 0x12478 |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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diff
changeset
|
1434 |
|
f664eeb55cb4
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diff
changeset
|
1435 void vdp_load_savestate(vdp_context * context, FILE * state_file) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
1436 { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
1437 uint8_t tmp_buf[CRAM_SIZE*2]; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1438 fseek(state_file, GST_VDP_REGS, SEEK_SET); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
1439 fread(context->regs, 1, VDP_REGS, state_file); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1440 latch_mode(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1441 fread(tmp_buf, 1, sizeof(tmp_buf), state_file); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1442 for (int i = 0; i < CRAM_SIZE; i++) { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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diff
changeset
|
1443 context->cram[i] = (tmp_buf[i*2+1] << 8) | tmp_buf[i*2]; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
1444 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
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|
1445 fread(tmp_buf, 2, VSRAM_SIZE, state_file); |
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1446 for (int i = 0; i < VSRAM_SIZE; i++) { |
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23
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Fix endianness of VSRAM when read from Genecyst save state
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|
1447 context->vsram[i] = (tmp_buf[i*2+1] << 8) | tmp_buf[i*2]; |
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1448 } |
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|
1449 fseek(state_file, GST_VDP_MEM, SEEK_SET); |
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f664eeb55cb4
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changeset
|
1450 fread(context->vdpmem, 1, VRAM_SIZE, state_file); |
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parents:
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1451 } |
|
54
3b79cbcf6846
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|
1452 |
|
56
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diff
changeset
|
1453 void vdp_save_state(vdp_context * context, FILE * outfile) |
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diff
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|
1454 { |
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diff
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|
1455 uint8_t tmp_buf[CRAM_SIZE*2]; |
|
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Fix CRAM and possibly VSRAM writes
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diff
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1456 fseek(outfile, GST_VDP_REGS, SEEK_SET); |
|
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Fix CRAM and possibly VSRAM writes
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diff
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|
1457 fwrite(context->regs, 1, VDP_REGS, outfile); |
|
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Fix CRAM and possibly VSRAM writes
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diff
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|
1458 for (int i = 0; i < CRAM_SIZE; i++) { |
|
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diff
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|
1459 tmp_buf[i*2] = context->cram[i]; |
|
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|
1460 tmp_buf[i*2+1] = context->cram[i] >> 8; |
|
a28b1dfe1af2
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|
1461 } |
|
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|
1462 fwrite(tmp_buf, 1, sizeof(tmp_buf), outfile); |
|
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|
1463 for (int i = 0; i < VSRAM_SIZE; i++) { |
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|
1464 tmp_buf[i*2] = context->vsram[i]; |
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|
1465 tmp_buf[i*2+1] = context->vsram[i] >> 8; |
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|
1466 } |
|
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|
1467 fwrite(tmp_buf, 2, VSRAM_SIZE, outfile); |
|
a28b1dfe1af2
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|
1468 fseek(outfile, GST_VDP_MEM, SEEK_SET); |
|
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|
1469 fwrite(context->vdpmem, 1, VRAM_SIZE, outfile); |
|
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|
1470 } |
|
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|
1471 |