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comparison backend_x86.c @ 987:1f09994e92c5

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Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
author Michael Pavone <pavone@retrodev.com>
date Tue, 26 Apr 2016 23:13:37 -0700
parents a7774fc2de4b
children 6b07af1515b5
comparison
equal deleted inserted replaced
986:f680fe746a7d 987:1f09994e92c5
49 code_ptr gen_mem_fun(cpu_options * opts, memmap_chunk const * memmap, uint32_t num_chunks, ftype fun_type, code_ptr *after_inc) 49 code_ptr gen_mem_fun(cpu_options * opts, memmap_chunk const * memmap, uint32_t num_chunks, ftype fun_type, code_ptr *after_inc)
50 { 50 {
51 code_info *code = &opts->code; 51 code_info *code = &opts->code;
52 code_ptr start = code->cur; 52 code_ptr start = code->cur;
53 check_cycles(opts); 53 check_cycles(opts);
54 uint8_t is_write = fun_type == WRITE_16 || fun_type == WRITE_8;
55 uint8_t adr_reg = is_write ? opts->scratch2 : opts->scratch1;
56 uint8_t size = (fun_type == READ_16 || fun_type == WRITE_16) ? SZ_W : SZ_B;
57 if (size != SZ_B && opts->align_error_mask) {
58 test_ir(code, opts->align_error_mask, adr_reg, SZ_D);
59 jcc(code, CC_NZ, is_write ? opts->handle_align_error_write : opts->handle_align_error_read);
60 }
54 cycles(opts, opts->bus_cycles); 61 cycles(opts, opts->bus_cycles);
55 if (after_inc) { 62 if (after_inc) {
56 *after_inc = code->cur; 63 *after_inc = code->cur;
57 } 64 }
58 uint8_t is_write = fun_type == WRITE_16 || fun_type == WRITE_8; 65
59 uint8_t adr_reg = is_write ? opts->scratch2 : opts->scratch1;
60 if (opts->address_size == SZ_D && opts->address_mask != 0xFFFFFFFF) { 66 if (opts->address_size == SZ_D && opts->address_mask != 0xFFFFFFFF) {
61 and_ir(code, opts->address_mask, adr_reg, SZ_D); 67 and_ir(code, opts->address_mask, adr_reg, SZ_D);
62 } 68 }
63 code_ptr lb_jcc = NULL, ub_jcc = NULL; 69 code_ptr lb_jcc = NULL, ub_jcc = NULL;
64 uint16_t access_flag = is_write ? MMAP_WRITE : MMAP_READ; 70 uint16_t access_flag = is_write ? MMAP_WRITE : MMAP_READ;
65 uint8_t size = (fun_type == READ_16 || fun_type == WRITE_16) ? SZ_W : SZ_B;
66 uint32_t ram_flags_off = opts->ram_flags_off; 71 uint32_t ram_flags_off = opts->ram_flags_off;
67 for (uint32_t chunk = 0; chunk < num_chunks; chunk++) 72 for (uint32_t chunk = 0; chunk < num_chunks; chunk++)
68 { 73 {
69 if (memmap[chunk].start > 0) { 74 if (memmap[chunk].start > 0) {
70 cmp_ir(code, memmap[chunk].start, adr_reg, opts->address_size); 75 cmp_ir(code, memmap[chunk].start, adr_reg, opts->address_size);