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diff backend_x86.c @ 987:1f09994e92c5

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Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
author Michael Pavone <pavone@retrodev.com>
date Tue, 26 Apr 2016 23:13:37 -0700
parents a7774fc2de4b
children 6b07af1515b5
line wrap: on
line diff
--- a/backend_x86.c	Tue Apr 26 00:07:15 2016 -0700
+++ b/backend_x86.c	Tue Apr 26 23:13:37 2016 -0700
@@ -51,18 +51,23 @@
 	code_info *code = &opts->code;
 	code_ptr start = code->cur;
 	check_cycles(opts);
+	uint8_t is_write = fun_type == WRITE_16 || fun_type == WRITE_8;
+	uint8_t adr_reg = is_write ? opts->scratch2 : opts->scratch1;
+	uint8_t size =  (fun_type == READ_16 || fun_type == WRITE_16) ? SZ_W : SZ_B;
+	if (size != SZ_B && opts->align_error_mask) {
+		test_ir(code, opts->align_error_mask, adr_reg, SZ_D);
+		jcc(code, CC_NZ, is_write ? opts->handle_align_error_write : opts->handle_align_error_read);
+	}
 	cycles(opts, opts->bus_cycles);
 	if (after_inc) {
 		*after_inc = code->cur;
 	}
-	uint8_t is_write = fun_type == WRITE_16 || fun_type == WRITE_8;
-	uint8_t adr_reg = is_write ? opts->scratch2 : opts->scratch1;
+	
 	if (opts->address_size == SZ_D && opts->address_mask != 0xFFFFFFFF) {
 		and_ir(code, opts->address_mask, adr_reg, SZ_D);
 	}
 	code_ptr lb_jcc = NULL, ub_jcc = NULL;
 	uint16_t access_flag = is_write ? MMAP_WRITE : MMAP_READ;
-	uint8_t size =  (fun_type == READ_16 || fun_type == WRITE_16) ? SZ_W : SZ_B;
 	uint32_t ram_flags_off = opts->ram_flags_off;
 	for (uint32_t chunk = 0; chunk < num_chunks; chunk++)
 	{