comparison notes.txt @ 14:2bdad0f52f42

x86 code gen, initial work on translator
author Mike Pavone <pavone@retrodev.com>
date Tue, 27 Nov 2012 09:28:13 -0800
parents
children 3e7bfde7606e
comparison
equal deleted inserted replaced
13:168b1a873895 14:2bdad0f52f42
1 cmp.w <ea>, Dn 4(1/0) + <ea> time
2 cmp.l <ea>, Dn 6(1/0) + <ea> time
3 cmp.w #num, Dn 4(1/0) + 4(1/0)
4 cmp.l #num, Dn 6(1/0) + 8(2/0)
5
6 cmpi.w #num, Dn 8(2/0)
7 cmpi.l #num, Dn 14(3/0)
8
9
10 movem
11
12 subtype field (bits 9-11) = 110 or 100 depending on direction
13 bit 8 = 0
14 bit 7 = 1
15 bit 6 = size
16
17
18
19 x86-64 registers in 68K core
20
21 1. native stack pointer
22 2. current cycle count
23 3. target cycle count
24 4. cartridge address
25 5. work ram address
26 6. scratch register
27 7. context pointer (contains 68K registers and memory pointers not in registers)
28 8. status register (maybe, depends on how well I can abuse native x86 status stuff)
29 Rest of registers used for holding 68K registers
30
31 rax = cycle counter
32 bl = N flag
33 bh = V flag
34 rcx = scratch register
35 dl = Z flag
36 dh = C flag
37 rbp = target cycle count
38 rsi = context pointer
39 rdi = d0
40 r8 = d1
41 r9 = d2
42 r10 = d3
43 r11 = a0
44 r12 = a1
45 r13 = a6
46 r14 = a7
47 r15 = work ram address
48 r16 = cartridge address
49 rsp = native stack pointer
50
51 68K context:
52 uint8_t flags[5];
53 uint8_t pad??[3]
54 uint32_t dregs[8]; //8 + 4 * reg
55 uint32_t aregs[8]; //40 + 4 * reg
56 .....
57
58 x86-64 registers in Z80 core
59
60 ax = AF
61 bx = BC
62 cx = DE
63 dx = HL
64
65 1. native stack pointer
66 2. current cycle count
67 3. target cycle count