diff notes.txt @ 14:2bdad0f52f42

x86 code gen, initial work on translator
author Mike Pavone <pavone@retrodev.com>
date Tue, 27 Nov 2012 09:28:13 -0800
parents
children 3e7bfde7606e
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--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/notes.txt	Tue Nov 27 09:28:13 2012 -0800
@@ -0,0 +1,67 @@
+cmp.w <ea>, Dn 4(1/0) + <ea> time
+cmp.l <ea>, Dn 6(1/0) + <ea> time
+cmp.w #num, Dn 4(1/0) + 4(1/0)
+cmp.l #num, Dn 6(1/0) + 8(2/0)
+
+cmpi.w #num, Dn 8(2/0)
+cmpi.l #num, Dn 14(3/0)
+
+
+movem
+
+subtype field (bits 9-11) = 110 or 100 depending on direction
+bit 8 = 0
+bit 7 = 1
+bit 6 = size
+
+
+
+x86-64 registers in 68K core
+
+1. native stack pointer
+2. current cycle count
+3. target cycle count
+4. cartridge address
+5. work ram address
+6. scratch register
+7. context pointer (contains 68K registers and memory pointers not in registers)
+8. status register (maybe, depends on how well I can abuse native x86 status stuff)
+Rest of registers used for holding 68K registers
+
+rax = cycle counter
+bl = N flag
+bh = V flag
+rcx = scratch register
+dl = Z flag
+dh = C flag
+rbp = target cycle count
+rsi = context pointer
+rdi = d0
+r8 = d1
+r9 = d2
+r10 = d3
+r11 = a0
+r12 = a1
+r13 = a6
+r14 = a7
+r15 = work ram address
+r16 = cartridge address
+rsp = native stack pointer
+
+68K context:
+uint8_t flags[5];
+uint8_t pad??[3]
+uint32_t dregs[8]; //8 + 4 * reg
+uint32_t aregs[8]; //40 + 4 * reg
+.....
+
+x86-64 registers in Z80 core
+
+ax = AF
+bx = BC
+cx = DE
+dx = HL
+
+1. native stack pointer
+2. current cycle count
+3. target cycle count