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comparison m68k_to_x86.c @ 99:8491de5d6c06

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Allow use of indexed modes as move dst
author Mike Pavone <pavone@retrodev.com>
date Thu, 27 Dec 2012 22:05:22 -0800
parents 104e257fb93c
children 45cd7d3e7918
comparison
equal deleted inserted replaced
98:104e257fb93c 99:8491de5d6c06
699 native_code_map[chunk].offsets[offset] = native_addr-native_code_map[chunk].base; 699 native_code_map[chunk].offsets[offset] = native_addr-native_code_map[chunk].base;
700 } 700 }
701 701
702 uint8_t * translate_m68k_move(uint8_t * dst, m68kinst * inst, x86_68k_options * opts) 702 uint8_t * translate_m68k_move(uint8_t * dst, m68kinst * inst, x86_68k_options * opts)
703 { 703 {
704 int8_t reg, flags_reg; 704 int8_t reg, flags_reg, sec_reg;
705 uint8_t dir = 0; 705 uint8_t dir = 0;
706 int32_t offset; 706 int32_t offset;
707 int32_t inc_amount, dec_amount; 707 int32_t inc_amount, dec_amount;
708 x86_ea src; 708 x86_ea src;
709 dst = translate_m68k_src(inst, &src, dst, opts); 709 dst = translate_m68k_src(inst, &src, dst, opts);
805 } 805 }
806 } else if (src.mode == MODE_REG_DISPLACE8) { 806 } else if (src.mode == MODE_REG_DISPLACE8) {
807 dst = mov_rdisp8r(dst, src.base, src.disp, SCRATCH1, inst->extra.size); 807 dst = mov_rdisp8r(dst, src.base, src.disp, SCRATCH1, inst->extra.size);
808 } else { 808 } else {
809 dst = mov_ir(dst, src.disp, SCRATCH1, inst->extra.size); 809 dst = mov_ir(dst, src.disp, SCRATCH1, inst->extra.size);
810 }
811 dst = cmp_ir(dst, 0, flags_reg, inst->extra.size);
812 dst = setcc_r(dst, CC_Z, FLAG_Z);
813 dst = setcc_r(dst, CC_S, FLAG_N);
814 switch (inst->extra.size)
815 {
816 case OPSIZE_BYTE:
817 dst = call(dst, (char *)m68k_write_byte);
818 break;
819 case OPSIZE_WORD:
820 dst = call(dst, (char *)m68k_write_word);
821 break;
822 case OPSIZE_LONG:
823 dst = call(dst, (char *)m68k_write_long_highfirst);
824 break;
825 }
826 break;
827 case MODE_AREG_INDEX_DISP8:
828 dst = cycles(dst, 6);//TODO: Check to make sure this is correct
829 if (opts->aregs[inst->src.params.regs.pri] >= 0) {
830 dst = mov_rr(dst, opts->aregs[inst->src.params.regs.pri], SCRATCH2, SZ_D);
831 } else {
832 dst = mov_rdisp8r(dst, CONTEXT, reg_offset(&(inst->src)), SCRATCH2, SZ_D);
833 }
834 sec_reg = (inst->src.params.regs.sec >> 1) & 0x7;
835 if (inst->src.params.regs.sec & 1) {
836 if (inst->src.params.regs.sec & 0x10) {
837 if (opts->aregs[sec_reg] >= 0) {
838 dst = add_rr(dst, opts->aregs[sec_reg], SCRATCH2, SZ_D);
839 } else {
840 dst = add_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t)*sec_reg, SCRATCH2, SZ_D);
841 }
842 } else {
843 if (opts->dregs[sec_reg] >= 0) {
844 dst = add_rr(dst, opts->dregs[sec_reg], SCRATCH2, SZ_D);
845 } else {
846 dst = add_rdisp8r(dst, CONTEXT, offsetof(m68k_context, dregs) + sizeof(uint32_t)*sec_reg, SCRATCH2, SZ_D);
847 }
848 }
849 } else {
850 if (src.base == SCRATCH1) {
851 dst = push_r(dst, SCRATCH1);
852 }
853 if (inst->src.params.regs.sec & 0x10) {
854 if (opts->aregs[sec_reg] >= 0) {
855 dst = movsx_rr(dst, opts->aregs[sec_reg], SCRATCH1, SZ_W, SZ_D);
856 } else {
857 dst = movsx_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t)*sec_reg, SCRATCH1, SZ_W, SZ_D);
858 }
859 } else {
860 if (opts->dregs[sec_reg] >= 0) {
861 dst = movsx_rr(dst, opts->dregs[sec_reg], SCRATCH1, SZ_W, SZ_D);
862 } else {
863 dst = movsx_rdisp8r(dst, CONTEXT, offsetof(m68k_context, dregs) + sizeof(uint32_t)*sec_reg, SCRATCH1, SZ_W, SZ_D);
864 }
865 }
866 dst = add_rr(dst, SCRATCH1, SCRATCH2, SZ_D);
867 if (src.base == SCRATCH1) {
868 dst = pop_r(dst, SCRATCH1);
869 }
870 }
871 if (inst->src.params.regs.displacement) {
872 dst = add_ir(dst, inst->src.params.regs.displacement, SCRATCH2, SZ_D);
810 } 873 }
811 dst = cmp_ir(dst, 0, flags_reg, inst->extra.size); 874 dst = cmp_ir(dst, 0, flags_reg, inst->extra.size);
812 dst = setcc_r(dst, CC_Z, FLAG_Z); 875 dst = setcc_r(dst, CC_Z, FLAG_Z);
813 dst = setcc_r(dst, CC_S, FLAG_N); 876 dst = setcc_r(dst, CC_S, FLAG_N);
814 switch (inst->extra.size) 877 switch (inst->extra.size)