changeset 99:8491de5d6c06

Allow use of indexed modes as move dst
author Mike Pavone <pavone@retrodev.com>
date Thu, 27 Dec 2012 22:05:22 -0800
parents 104e257fb93c
children 45cd7d3e7918
files m68k_to_x86.c
diffstat 1 files changed, 64 insertions(+), 1 deletions(-) [+]
line wrap: on
line diff
--- a/m68k_to_x86.c	Thu Dec 27 21:54:54 2012 -0800
+++ b/m68k_to_x86.c	Thu Dec 27 22:05:22 2012 -0800
@@ -701,7 +701,7 @@
 
 uint8_t * translate_m68k_move(uint8_t * dst, m68kinst * inst, x86_68k_options * opts)
 {
-	int8_t reg, flags_reg;
+	int8_t reg, flags_reg, sec_reg;
 	uint8_t dir = 0;
 	int32_t offset;
 	int32_t inc_amount, dec_amount;
@@ -824,6 +824,69 @@
 			break;
 		}
 		break;
+	case MODE_AREG_INDEX_DISP8:
+		dst = cycles(dst, 6);//TODO: Check to make sure this is correct
+		if (opts->aregs[inst->src.params.regs.pri] >= 0) {
+			dst = mov_rr(dst, opts->aregs[inst->src.params.regs.pri], SCRATCH2, SZ_D);
+		} else {
+			dst = mov_rdisp8r(dst, CONTEXT,  reg_offset(&(inst->src)), SCRATCH2, SZ_D);
+		}
+		sec_reg = (inst->src.params.regs.sec >> 1) & 0x7;
+		if (inst->src.params.regs.sec & 1) {
+			if (inst->src.params.regs.sec & 0x10) {
+				if (opts->aregs[sec_reg] >= 0) {
+					dst = add_rr(dst, opts->aregs[sec_reg], SCRATCH2, SZ_D);
+				} else {
+					dst = add_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t)*sec_reg, SCRATCH2, SZ_D);
+				}
+			} else {
+				if (opts->dregs[sec_reg] >= 0) {
+					dst = add_rr(dst, opts->dregs[sec_reg], SCRATCH2, SZ_D);
+				} else {
+					dst = add_rdisp8r(dst, CONTEXT, offsetof(m68k_context, dregs) + sizeof(uint32_t)*sec_reg, SCRATCH2, SZ_D);
+				}
+			}
+		} else {
+			if (src.base == SCRATCH1) {
+				dst = push_r(dst, SCRATCH1);
+			}
+			if (inst->src.params.regs.sec & 0x10) {
+				if (opts->aregs[sec_reg] >= 0) {
+					dst = movsx_rr(dst, opts->aregs[sec_reg], SCRATCH1, SZ_W, SZ_D);
+				} else {
+					dst = movsx_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t)*sec_reg, SCRATCH1, SZ_W, SZ_D);
+				}
+			} else {
+				if (opts->dregs[sec_reg] >= 0) {
+					dst = movsx_rr(dst, opts->dregs[sec_reg], SCRATCH1, SZ_W, SZ_D);
+				} else {
+					dst = movsx_rdisp8r(dst, CONTEXT, offsetof(m68k_context, dregs) + sizeof(uint32_t)*sec_reg, SCRATCH1, SZ_W, SZ_D);
+				}
+			}
+			dst = add_rr(dst, SCRATCH1, SCRATCH2, SZ_D);
+			if (src.base == SCRATCH1) {
+				dst = pop_r(dst, SCRATCH1);
+			}
+		}
+		if (inst->src.params.regs.displacement) {
+			dst = add_ir(dst, inst->src.params.regs.displacement, SCRATCH2, SZ_D);
+		}
+		dst = cmp_ir(dst, 0, flags_reg, inst->extra.size);
+		dst = setcc_r(dst, CC_Z, FLAG_Z);
+		dst = setcc_r(dst, CC_S, FLAG_N);
+		switch (inst->extra.size)
+		{
+		case OPSIZE_BYTE:
+			dst = call(dst, (char *)m68k_write_byte);
+			break;
+		case OPSIZE_WORD:
+			dst = call(dst, (char *)m68k_write_word);
+			break;
+		case OPSIZE_LONG:
+			dst = call(dst, (char *)m68k_write_long_highfirst);
+			break;
+		}
+		break;
 	case MODE_PC_DISPLACE:
 		dst = cycles(dst, BUS);
 		dst = mov_ir(dst, inst->dst.params.regs.displacement + inst->address+2, SCRATCH2, SZ_D);