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comparison m68k_core.c @ 2224:d8b0244101c4

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Fix bad 68K instruction timings revealed by Ti_'s test ROM, except those that involve exception timing
author Michael Pavone <pavone@retrodev.com>
date Mon, 05 Sep 2022 00:49:03 -0700
parents 3247bec692a4
children e22137f0aca4
comparison
equal deleted inserted replaced
2223:1cccc57c069a 2224:d8b0244101c4
229 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1); 229 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1);
230 call(code, opts->native_addr); 230 call(code, opts->native_addr);
231 jmp_r(code, opts->gen.scratch1); 231 jmp_r(code, opts->gen.scratch1);
232 break; 232 break;
233 case MODE_AREG_DISPLACE: 233 case MODE_AREG_DISPLACE:
234 cycles(&opts->gen, BUS*2); 234 cycles(&opts->gen, BUS*2 + 2);
235 if (is_jsr) { 235 if (is_jsr) {
236 push_const(opts, inst->address+4); 236 push_const(opts, inst->address+4);
237 } 237 }
238 calc_areg_displace(opts, &inst->src, opts->gen.scratch1); 238 calc_areg_displace(opts, &inst->src, opts->gen.scratch1);
239 call(code, opts->native_addr); 239 call(code, opts->native_addr);
240 jmp_r(code, opts->gen.scratch1); 240 jmp_r(code, opts->gen.scratch1);
241 break; 241 break;
242 case MODE_AREG_INDEX_DISP8: 242 case MODE_AREG_INDEX_DISP8:
243 cycles(&opts->gen, BUS*3);//TODO: CHeck that this is correct 243 cycles(&opts->gen, BUS*3 + 2);
244 if (is_jsr) { 244 if (is_jsr) {
245 push_const(opts, inst->address+4); 245 push_const(opts, inst->address+4);
246 } 246 }
247 calc_areg_index_disp8(opts, &inst->src, opts->gen.scratch1); 247 calc_areg_index_disp8(opts, &inst->src, opts->gen.scratch1);
248 call(code, opts->native_addr); 248 call(code, opts->native_addr);
255 push_const(opts, inst->address+4); 255 push_const(opts, inst->address+4);
256 } 256 }
257 jump_m68k_abs(opts, inst->src.params.regs.displacement + inst->address + 2); 257 jump_m68k_abs(opts, inst->src.params.regs.displacement + inst->address + 2);
258 break; 258 break;
259 case MODE_PC_INDEX_DISP8: 259 case MODE_PC_INDEX_DISP8:
260 cycles(&opts->gen, BUS*3);//TODO: CHeck that this is correct 260 cycles(&opts->gen, BUS*3 + 2);
261 if (is_jsr) { 261 if (is_jsr) {
262 push_const(opts, inst->address+4); 262 push_const(opts, inst->address+4);
263 } 263 }
264 ldi_native(opts, inst->address+2, opts->gen.scratch1); 264 ldi_native(opts, inst->address+2, opts->gen.scratch1);
265 calc_index_disp8(opts, &inst->src, opts->gen.scratch1); 265 calc_index_disp8(opts, &inst->src, opts->gen.scratch1);
330 call(code, opts->set_ccr); 330 call(code, opts->set_ccr);
331 //Read saved PC 331 //Read saved PC
332 areg_to_native(opts, 7, opts->gen.scratch1); 332 areg_to_native(opts, 7, opts->gen.scratch1);
333 call(code, opts->read_32); 333 call(code, opts->read_32);
334 addi_areg(opts, 4, 7); 334 addi_areg(opts, 4, 7);
335 cycles(&opts->gen, 2*BUS);
335 //Get native address and jump to it 336 //Get native address and jump to it
336 call(code, opts->native_addr); 337 call(code, opts->native_addr);
337 jmp_r(code, opts->gen.scratch1); 338 jmp_r(code, opts->gen.scratch1);
338 } 339 }
339 340