Mercurial > repos > blastem
diff m68k_core.c @ 2224:d8b0244101c4
Fix bad 68K instruction timings revealed by Ti_'s test ROM, except those that involve exception timing
| author | Michael Pavone <pavone@retrodev.com> |
|---|---|
| date | Mon, 05 Sep 2022 00:49:03 -0700 |
| parents | 3247bec692a4 |
| children | e22137f0aca4 |
line wrap: on
line diff
--- a/m68k_core.c Sun Sep 04 23:29:37 2022 -0700 +++ b/m68k_core.c Mon Sep 05 00:49:03 2022 -0700 @@ -231,7 +231,7 @@ jmp_r(code, opts->gen.scratch1); break; case MODE_AREG_DISPLACE: - cycles(&opts->gen, BUS*2); + cycles(&opts->gen, BUS*2 + 2); if (is_jsr) { push_const(opts, inst->address+4); } @@ -240,7 +240,7 @@ jmp_r(code, opts->gen.scratch1); break; case MODE_AREG_INDEX_DISP8: - cycles(&opts->gen, BUS*3);//TODO: CHeck that this is correct + cycles(&opts->gen, BUS*3 + 2); if (is_jsr) { push_const(opts, inst->address+4); } @@ -257,7 +257,7 @@ jump_m68k_abs(opts, inst->src.params.regs.displacement + inst->address + 2); break; case MODE_PC_INDEX_DISP8: - cycles(&opts->gen, BUS*3);//TODO: CHeck that this is correct + cycles(&opts->gen, BUS*3 + 2); if (is_jsr) { push_const(opts, inst->address+4); } @@ -332,6 +332,7 @@ areg_to_native(opts, 7, opts->gen.scratch1); call(code, opts->read_32); addi_areg(opts, 4, 7); + cycles(&opts->gen, 2*BUS); //Get native address and jump to it call(code, opts->native_addr); jmp_r(code, opts->gen.scratch1);