diff cpu_dsl.py @ 1742:6290c88949bd

Fixed CPI/CPD/CPIR/CPDR in new Z80 core
author Michael Pavone <pavone@retrodev.com>
date Mon, 04 Feb 2019 23:46:35 -0800
parents 28ab56ff8cea
children 91aa789e57bd
line wrap: on
line diff
--- a/cpu_dsl.py	Mon Feb 04 22:51:56 2019 -0800
+++ b/cpu_dsl.py	Mon Feb 04 23:46:35 2019 -0800
@@ -418,7 +418,7 @@
 			raise Exception('Unknown flag calc type: ' + calc)
 	if prog.carryFlowDst:
 		if prog.lastOp.op != 'cmp':
-			output.append('\n\t{dst} = {tmpdst};'.format(dst = prog.resolveParam(prog.lastDst, None, {}), tmpdst = prog.carryFlowDst))
+			output.append('\n\t{dst} = {tmpdst};'.format(dst = prog.resolveParam(prog.lastDst, prog.currentScope, {}), tmpdst = prog.carryFlowDst))
 		prog.carryFlowDst = None
 	if parity:
 		if paritySize > 8:
@@ -1363,8 +1363,8 @@
 	def getTemp(self, size):
 		if size in self.temp:
 			return ('', self.temp[size])
-		self.temp[size] = 'tmp{sz}'.format(sz=size);
-		return ('\n\tuint{sz}_t tmp{sz};'.format(sz=size), self.temp[size])
+		self.temp[size] = 'gen_tmp{sz}__'.format(sz=size);
+		return ('\n\tuint{sz}_t gen_tmp{sz}__;'.format(sz=size), self.temp[size])
 		
 	def resolveParam(self, param, parent, fieldVals, allowConstant=True, isdst=False):
 		keepGoing = True