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Go back to resetting the refresh counter after a DMA. Probably not quite correct as it is probably reset on VDP triggered refresh, but this is close enough for now given the general limitations with my refresh code. VDP FIFO Testing seems to be passing 100% reliably again (was occassionally failing still with the last commit)
author Michael Pavone <pavone@retrodev.com>
date Tue, 23 May 2017 23:47:40 -0700
parents aee2177a1630
children 2455662378ed 360d5bab199f
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#ifndef SMS_H_
#define SMS_H_

#include "system.h"
#include "vdp.h"
#include "psg.h"
#include "z80_to_x86.h"
#include "io.h"

#define SMS_RAM_SIZE (8*1024)
#define SMS_CART_RAM_SIZE (32*1024)

typedef struct {
	system_header header;
	z80_context   *z80;
	vdp_context   *vdp;
	psg_context   *psg;
	sega_io       io;
	uint8_t       *rom;
	uint32_t      rom_size;
	uint32_t      master_clock;
	uint32_t      normal_clock;
	uint8_t       should_return;
	uint8_t       ram[SMS_RAM_SIZE];
	uint8_t       bank_regs[4];
	uint8_t       cart_ram[SMS_CART_RAM_SIZE];
} sms_context;

sms_context *alloc_configure_sms(system_media *media, uint32_t opts, uint8_t force_region, rom_info *info_out);

#endif //SMS_H_