| Wed, 10 Jun 2020 19:08:41 -0700 |
Michael Pavone |
Fix cycle timing of a number of 68K instructions
|
| Sat, 25 Apr 2020 18:10:40 -0700 |
Michael Pavone |
Fix instruction timing for addq.w #i, (ay) in dynarec
|
| Sun, 07 Apr 2019 00:06:29 -0700 |
Michael Pavone |
Get 64-bit builds working for Windows target
|
| Fri, 18 May 2018 19:00:10 -0700 |
Michael Pavone |
Fix cycle counts for BCD instructions, RESET, and MOVE from SR
|
| Thu, 17 May 2018 00:43:16 -0700 |
Michael Pavone |
Fix instruction timing for a number of instructions with only a single operand
|
| Wed, 03 Jan 2018 07:09:39 -0800 |
Michael Pavone |
Fix silly bug in STOP implementation that caused excessive CPU usage
|
| Wed, 13 Sep 2017 21:13:11 -0700 |
Michael Pavone |
Push correct PC onto stack on divide by zero for pc-relative case
|
| Wed, 13 Sep 2017 21:06:25 -0700 |
Michael Pavone |
Preserve original address when retranslating instructions instead of switching to the lowest alias
|
| Wed, 06 Sep 2017 23:10:11 -0700 |
Michael Pavone |
Properly clear trace mode on interrupt or other exception. Fix NBCD with memory destination
|
| Fri, 11 Aug 2017 18:43:48 -0700 |
Michael Pavone |
Avoid generating an instruction that would require a REX prefix when a7 is used as a byte-wide source operand in 32-bit builds. Fixes a fatal error in Dragon's Fury when entering the option menu in a 32-bit build
|
| Fri, 26 May 2017 19:18:19 -0700 |
Michael Pavone |
Avoid splitting m68k_check_cycles_int_latch code across memory chunks since it expects a byte-sized jump offset. Avoid an unnecessary m68k_check_cycles_int_latch for register to register moves
|
| Tue, 23 May 2017 21:07:56 -0700 |
Michael Pavone |
Fix interrupt latency for move.l with memory destination
|
| Fri, 19 May 2017 20:27:35 -0700 |
Michael Pavone |
Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move
|
| Wed, 26 Apr 2017 21:55:12 -0700 |
Michael Pavone |
Fix timing for branch not taken case in the M68K BCC intruction
|
| Mon, 24 Apr 2017 20:49:31 -0700 |
Michael Pavone |
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
|
| Tue, 28 Mar 2017 09:39:54 -0700 |
Michael Pavone |
Fix exit trace mode edge case. Call do_sync if trace mode bit is changed in eori sr
|
| Tue, 28 Mar 2017 00:13:35 -0700 |
Michael Pavone |
Implemented M68K trace mode. Some edge cases/SR update paths still need work
|
| Wed, 22 Mar 2017 22:16:39 -0700 |
Michael Pavone |
Fix SBCD edge cases to pass Flamewing's test ROM. Could use some cleanup to produce better code for the SBCD case, but produces correct results now
|
| Fri, 17 Mar 2017 08:05:55 -0700 |
Michael Pavone |
Minor fix to timing of "early" overflow case in divs when the dividend is negative
|
| Wed, 15 Mar 2017 19:05:27 -0700 |
Michael Pavone |
Cycle accurate implementation of divs
|
| Thu, 09 Mar 2017 23:50:46 -0800 |
Michael Pavone |
Fix undefined flags on overflow and divide by zero for divu based on hardware test. Fix saving result of divu when destination is not stored in a host register
|
| Thu, 09 Mar 2017 21:31:31 -0800 |
Michael Pavone |
Forgot to update flags in the "good" case of the new divu code
|
| Fri, 03 Mar 2017 23:51:29 -0800 |
Michael Pavone |
Cycle accurate divu and undefined flags for overflow case
|
| Thu, 23 Feb 2017 00:08:37 -0800 |
Michael Pavone |
WIP support for XBAND mapper hardware
|
| Sun, 12 Feb 2017 12:38:31 -0800 |
Michael Pavone |
Fix timing for instructions using BINARY_IMPL
|
| Sat, 04 Feb 2017 00:41:15 -0800 |
Michael Pavone |
Cycle accurate MULU/MULS emulation
|
| Tue, 24 Jan 2017 00:15:27 -0800 |
Michael Pavone |
Inefficient fix for overlapping instruction problem that was causing issues with Outrunners
|
| Wed, 28 Dec 2016 20:39:27 -0800 |
Michael Pavone |
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
|
| Mon, 19 Dec 2016 13:28:18 -0800 |
Michael Pavone |
Mostly working changes to allow support for multiple emulated system types in main blastem program
|
| Sat, 05 Nov 2016 00:23:11 -0700 |
Michael Pavone |
Get Jaguar video interrupt working
|
| Thu, 06 Oct 2016 21:11:58 -0700 |
Michael Pavone |
Remove hacky assumption about Genesis memory map in M68K core
|
| Thu, 06 Oct 2016 09:34:31 -0700 |
Michael Pavone |
Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
|
| Tue, 10 May 2016 08:59:17 -0700 |
Michael Pavone |
Fix bug in 68K movep.l when the destination is a register mapped to a host register
|
| Sat, 30 Apr 2016 09:45:53 -0700 |
Michael Pavone |
Fix 68K interrupt handling some more. Fatal Rewind is working again.
|
| Wed, 27 Apr 2016 23:11:24 -0700 |
Michael Pavone |
Implement privelege violation exceptions
|
| Wed, 27 Apr 2016 21:39:17 -0700 |
Michael Pavone |
Implemented IR and undefined bits of info word for address error exception frames
|
| Tue, 26 Apr 2016 23:13:37 -0700 |
Michael Pavone |
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
|
| Tue, 26 Apr 2016 00:07:15 -0700 |
Michael Pavone |
Implement illegal instruction trap
|
| Sun, 24 Apr 2016 21:23:28 -0700 |
Michael Pavone |
Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First
|
| Sun, 24 Apr 2016 02:19:48 -0700 |
Michael Pavone |
Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
|
| Sun, 24 Apr 2016 00:22:38 -0700 |
Michael Pavone |
Fix order of writes for move.l with a predec destination
|
| Sat, 23 Apr 2016 12:43:23 -0700 |
Michael Pavone |
Properly imlement btst with an immediate destination. Fixes a crash in NHL 95.
|
| Wed, 02 Dec 2015 07:06:03 -0800 |
Michael Pavone |
Fix problem in 68K debugger caused by stack alignment change
|
| Fri, 27 Nov 2015 13:10:02 -0800 |
Michael Pavone |
Fix a few lingering stack alignment rework bugs
|
| Wed, 25 Nov 2015 08:40:45 -0800 |
Michael Pavone |
Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted.
|
| Sat, 14 Nov 2015 13:56:41 -0800 |
Michael Pavone |
Prevent the current interrupt number from being changed while interrupt is being processed. This fixes a bug in Sonic 2 split screen that showed up when interrupt timing was adjusted
|
| Fri, 13 Nov 2015 19:15:37 -0800 |
Michael Pavone |
It is now possible to switch back and forth between the menu ROM and the game
|
| Sun, 08 Nov 2015 15:51:57 -0800 |
Michael Pavone |
Initial work for allowing loading a ROM from menu
|
| Sun, 01 Nov 2015 00:12:52 -0700 |
Michael Pavone |
Update timing and order of steps in interrupt processing to match latest measurements
|
| Sat, 31 Oct 2015 22:17:50 -0700 |
Michael Pavone |
Implement interrupt latency. Fixes Sesame Street: Counting Cafe and gives accurate results in my test ROM
|
| Thu, 29 Oct 2015 19:06:06 -0700 |
Michael Pavone |
Implement TRAPV
|
| Wed, 28 Oct 2015 19:45:24 -0700 |
Michael Pavone |
Implement TAS
|
| Wed, 21 Oct 2015 23:31:17 -0700 |
Michael Pavone |
Implemented nbcd
|
| Mon, 19 Oct 2015 19:16:57 -0700 |
Michael Pavone |
Fix for abcd/sbcd. Hopefully got it 100% right this time.
|
| Sat, 25 Jul 2015 18:22:07 -0700 |
Michael Pavone |
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
|
| Sun, 28 Jun 2015 09:53:17 -0700 |
Michael Pavone |
More clang warning cleanup
|
| Mon, 22 Jun 2015 22:00:02 -0700 |
Michael Pavone |
Fix negative offsets in calc_areg_displace
|
| Mon, 25 May 2015 15:01:38 -0700 |
Michael Pavone |
Fix crash bug in 32-bit build for certain secnarios with bcd instructions
|
| Mon, 25 May 2015 13:21:24 -0700 |
Michael Pavone |
Fix div instruction when dest is d0 in 32-bit build
|
| Sat, 23 May 2015 20:24:27 -0700 |
Michael Pavone |
Eliminate runtime.S/runtime_32.S.
|
| Fri, 22 May 2015 23:49:32 -0700 |
Michael Pavone |
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
|
| Mon, 11 May 2015 20:30:13 -0700 |
Michael Pavone |
Fixed a missed call to do_sync when updating SR in 68K core
|
| Wed, 14 Jan 2015 09:38:54 -0800 |
Michael Pavone |
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
|
| Thu, 08 Jan 2015 23:20:41 -0800 |
Michael Pavone |
A couple more indentation fixes
|
| Thu, 08 Jan 2015 21:00:21 -0800 |
Michael Pavone |
Moved m68k_save_result to m68k_core.c
|
| Thu, 08 Jan 2015 19:11:56 -0800 |
Michael Pavone |
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
|
| Thu, 08 Jan 2015 09:36:54 -0800 |
Michael Pavone |
Fix indentation that presumably got messed up in a merge
|
| Sun, 04 Jan 2015 23:35:55 -0800 |
Michael Pavone |
Merge
base
m68k_to_x86.c@28157f268d45
|
| Sat, 03 Jan 2015 16:08:23 -0800 |
Michael Pavone |
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
|
| Fri, 02 Jan 2015 13:14:09 -0800 |
Michael Pavone |
Added functions to gen_x86 for saving and restoring callee save registers to better abstract over ABI differences between x86 and x86-64
|
| Thu, 01 Jan 2015 20:07:47 -0800 |
Michael Pavone |
Use call_args and call_args_abi in Z80 core
|
| Thu, 01 Jan 2015 19:15:05 -0800 |
Michael Pavone |
Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand
|
| Thu, 01 Jan 2015 17:31:59 -0800 |
Michael Pavone |
Fix some issues with 68K instruction retranslation
|
| Thu, 01 Jan 2015 14:36:55 -0800 |
Michael Pavone |
Remove some of the hard coded assumptions about the memory map from the CPU cores
|
| Mon, 29 Dec 2014 23:08:39 -0800 |
Michael Pavone |
Fix handling of code writes for Z80 core. This seems to get things close to being back to where they were before the big refactor that broke the Z80 core. Some problems remain. Notably the sound driver in Sonic 2 is still quite broken.
|
| Sun, 28 Dec 2014 17:25:36 -0800 |
Michael Pavone |
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
|
| Sat, 27 Dec 2014 15:49:15 -0800 |
Michael Pavone |
Fix divide by zero exception return address when div instruction is bigger than 1 word
|
| Sat, 27 Dec 2014 14:51:50 -0800 |
Michael Pavone |
Decrement address register after fetching source in move with -(ax) dest to avoid bug when src is the dst addres reg
|
| Fri, 26 Dec 2014 19:38:27 -0800 |
Michael Pavone |
Fix a bug in ori to SR that was swapping USP and SSP inappropriately
|
| Fri, 26 Dec 2014 15:45:31 -0800 |
Michael Pavone |
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
|
| Fri, 26 Dec 2014 12:37:27 -0800 |
Michael Pavone |
Set the byte_swap flag in the M68K core so gen_mem_fun correctly inserts xor instructions for byte access functions
|
| Sun, 14 Dec 2014 16:45:23 -0800 |
Michael Pavone |
WIP effort to update z80 core for code gen changes
|
| Tue, 11 Mar 2014 09:44:47 -0700 |
Michael Pavone |
Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
|
| Sat, 08 Mar 2014 00:15:09 -0800 |
Michael Pavone |
Move translate_m68k_movem to m68k_core.c
|
| Fri, 07 Mar 2014 23:26:46 -0800 |
Michael Pavone |
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
|
| Fri, 07 Mar 2014 19:45:05 -0800 |
Michael Pavone |
Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication
|
| Fri, 07 Mar 2014 19:39:51 -0800 |
Michael Pavone |
Use swap_ssp_usp in translate_m68k_move_ccr_sr
|
| Fri, 07 Mar 2014 19:35:13 -0800 |
Michael Pavone |
Combine andi ccr/sr and ori ccr/sr.
|
| Fri, 07 Mar 2014 17:51:40 -0800 |
Michael Pavone |
Use update_flags instead of individual set_flag calls in a few places
|
| Fri, 07 Mar 2014 17:42:29 -0800 |
Michael Pavone |
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
|
| Wed, 05 Mar 2014 19:26:53 -0800 |
Michael Pavone |
Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
|
| Wed, 05 Mar 2014 09:33:50 -0800 |
Michael Pavone |
Refactor translate_m68k_cmp to use translate_m68k_arith
|
| Tue, 04 Mar 2014 22:35:01 -0800 |
Michael Pavone |
Combine the implementation of ABCD and SBCD in the 68K core
|
| Tue, 04 Mar 2014 22:24:08 -0800 |
Michael Pavone |
Use translate_m68k_unary for SWAP in 68K core
|
| Tue, 04 Mar 2014 22:12:43 -0800 |
Michael Pavone |
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
|
| Tue, 04 Mar 2014 00:02:20 -0800 |
Michael Pavone |
Small refactor to flag handling in 68K core
|
| Mon, 03 Mar 2014 22:17:20 -0800 |
Michael Pavone |
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
|
| Sun, 02 Mar 2014 17:53:32 -0800 |
Michael Pavone |
Refactor translat_m68k_src and translate_m68k_dst into a single function
|
| Sun, 02 Mar 2014 16:34:29 -0800 |
Michael Pavone |
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
base
m68k_to_x86.c@af023e93d6a8
|
