log segacd.h @ 2148:2da377ea932f

age author description
Sat, 26 Mar 2022 20:14:41 -0700 Michael Pavone Initial stab at CDC DMA cycle stealing and sub CPU refresh delays
Fri, 18 Mar 2022 20:49:07 -0700 Michael Pavone Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Tue, 08 Mar 2022 23:28:06 -0800 Michael Pavone More accurate RET/DMNA implementation
Sun, 06 Mar 2022 22:03:52 -0800 Michael Pavone Initial stab at subcode emulation
Fri, 11 Feb 2022 23:21:10 -0800 Michael Pavone Initial support for using debugger on sub CPU
Thu, 03 Feb 2022 23:15:42 -0800 Michael Pavone Initial stab at RF5C164 emulation
Wed, 02 Feb 2022 01:10:07 -0800 Michael Pavone Implement CD audio
Sun, 30 Jan 2022 19:55:33 -0800 Michael Pavone Initial attempt at implementing the Sega CD graphics hardware segacd
Sun, 30 Jan 2022 00:21:58 -0800 Michael Pavone Fix a bunch of CDC/CDD related mcd-verificator failures segacd
Sat, 29 Jan 2022 17:43:37 -0800 Michael Pavone Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements segacd
Thu, 27 Jan 2022 00:33:41 -0800 Michael Pavone Implemented basic TOC functionality of CDD MCU segacd
Fri, 21 Jan 2022 20:24:48 -0800 Michael Pavone Initial work on CDC emulation segacd
Tue, 18 Jan 2022 00:03:50 -0800 Michael Pavone Implement enough of Sega CD gate array and Sub CPU to pass Sik's Mode 1 test ROM segacd
Wed, 13 Dec 2017 09:44:41 -0800 Michael Pavone Added code for initializing a combined Genesis + Sega CD system when a Sega CD ISO is loaded segacd
Tue, 12 Dec 2017 09:44:33 -0800 Michael Pavone Initial skeleton of Sega CD memory handlers segacd
Thu, 14 Sep 2017 09:49:04 -0700 Michael Pavone Created branch for segacd work segacd