Thu, 27 Feb 2020 18:38:15 -0800 |
Michael Pavone |
Make VDP VSRAM capacity respect model selection
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Wed, 09 Oct 2019 22:19:04 -0700 |
Michael Pavone |
Hopefully final fix for line advancement/frame end calculation
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Sat, 21 Sep 2019 11:01:07 -0700 |
Michael Pavone |
Calculate fine scroll once per line for a small speedup
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Mon, 16 Sep 2019 00:45:48 -0700 |
Mike Pavone |
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
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Sun, 28 Jul 2019 10:35:15 -0700 |
Michael Pavone |
Forgot to commit the header changes
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Mon, 24 Jun 2019 23:47:16 -0700 |
Michael Pavone |
Fix accuracy bugs used by Novedicus to detect BlastEm/Exodus
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Thu, 20 Jun 2019 22:31:31 -0700 |
Michael Pavone |
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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Tue, 02 Apr 2019 23:55:21 -0700 |
Michael Pavone |
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
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Thu, 27 Dec 2018 09:23:51 -0800 |
Michael Pavone |
Optimized render_map_output a bit
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Tue, 18 Dec 2018 19:58:00 -0800 |
Michael Pavone |
Allow closing VDP debug windows with the close button in the window title bar
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Mon, 19 Nov 2018 19:26:57 -0800 |
Michael Pavone |
Removed old VDP debug functionality
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Mon, 19 Nov 2018 09:52:07 -0800 |
Michael Pavone |
Basic version of layer compositing debug view in a separate window
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Fri, 16 Nov 2018 19:56:24 -0800 |
Michael Pavone |
Small cleanup of vdp_context struct layout and removal of separately allocated buffers
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Wed, 14 Nov 2018 22:16:35 -0800 |
Michael Pavone |
Initial stab at CRAM debug in a detached window
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Sun, 04 Nov 2018 22:51:50 -0800 |
Michael Pavone |
WIP new VDP plane debug view and support for detached VDP debug views generally
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Thu, 01 Nov 2018 20:14:56 -0700 |
Michael Pavone |
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
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Mon, 21 Aug 2017 23:08:36 -0700 |
Michael Pavone |
Fix timing of VDP ODD flag toggle
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Wed, 09 Aug 2017 23:26:51 -0700 |
Michael Pavone |
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
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Sun, 06 Aug 2017 00:06:36 -0700 |
Michael Pavone |
WIP - New savestate format
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Thu, 15 Jun 2017 09:45:21 -0700 |
Michael Pavone |
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
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Sun, 28 May 2017 21:03:55 -0700 |
Michael Pavone |
Implemented SMS pause button
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Tue, 23 May 2017 21:09:38 -0700 |
Michael Pavone |
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
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Thu, 04 May 2017 22:47:51 -0700 |
Michael Pavone |
Fix transition from active to inactive display
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Wed, 03 May 2017 21:28:40 -0700 |
Michael Pavone |
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
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Thu, 27 Apr 2017 23:08:49 -0700 |
Michael Pavone |
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
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Wed, 26 Apr 2017 22:16:12 -0700 |
Michael Pavone |
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
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Fri, 21 Apr 2017 01:22:52 -0700 |
Michael Pavone |
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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Tue, 18 Apr 2017 19:27:10 -0700 |
Michael Pavone |
Initial stab at implementing the output disable/layer selection bits of the VDP test register
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Sun, 16 Apr 2017 16:40:04 -0700 |
Michael Pavone |
Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support
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Mon, 06 Mar 2017 00:23:35 -0800 |
Michael Pavone |
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
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Sun, 15 Jan 2017 15:07:24 -0800 |
Michael Pavone |
Initial work on emulating top and bottom border area
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Thu, 05 Jan 2017 00:36:23 -0800 |
Michael Pavone |
Implemented Mode 4 H conter latching
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Wed, 04 Jan 2017 20:43:22 -0800 |
Michael Pavone |
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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Sun, 01 Jan 2017 21:06:32 -0800 |
Michael Pavone |
Update Mode 4 rendering to match logic analyzer captures
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Tue, 27 Dec 2016 11:31:17 -0800 |
Michael Pavone |
Somewhat broken implementation of Mode 4
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Thu, 22 Dec 2016 19:51:25 -0800 |
Michael Pavone |
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
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Mon, 28 Nov 2016 22:45:46 -0800 |
Michael Pavone |
Clean up symbol visiblity and delete a ltitle bit of dead code
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Mon, 22 Aug 2016 09:46:18 -0700 |
Michael Pavone |
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
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Mon, 02 May 2016 23:08:20 -0700 |
Michael Pavone |
Fix GST savestate loading to deal with SAT cache to fix sprite corruption on savestate load. Clear out Z80 native_pc so the Z80 state does not get hosed when loading a savestate while the emulator is already running
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Sat, 30 Apr 2016 15:31:48 -0700 |
Michael Pavone |
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
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Sun, 24 Apr 2016 01:24:38 -0700 |
Michael Pavone |
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
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Tue, 12 Apr 2016 21:38:24 -0700 |
Michael Pavone |
Remove the int number argument to vdp_int_ack since it is no longer used
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Thu, 28 Jan 2016 09:10:14 -0800 |
Michael Pavone |
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
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Fri, 13 Nov 2015 22:56:59 -0800 |
Michael Pavone |
Selecting a second game from the menu now works
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Thu, 21 May 2015 00:55:46 -0700 |
Michael Pavone |
Restore the other 2 debug display modes
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Tue, 19 May 2015 23:23:53 -0700 |
Michael Pavone |
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
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Sat, 16 May 2015 23:04:57 -0700 |
Michael Pavone |
First pass at emulating a vscroll latch. Titan's Overdrive demo seems to depend on the scroll value being latched early in the line before the HINT gets a chance to change it
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Mon, 11 May 2015 00:28:47 -0700 |
Michael Pavone |
Sync fixes and logging to fix more sync issues
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Sun, 04 Jan 2015 23:05:37 -0800 |
Michael Pavone |
Some small synchronization improvements that do not seem to fix anything
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Wed, 18 Jun 2014 16:30:19 -0700 |
Michael Pavone |
Fix most of the breakage caused by the vcounter/hcounter changes
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Tue, 17 Jun 2014 19:01:01 -0700 |
Michael Pavone |
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
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Mon, 07 Oct 2013 10:02:08 -0700 |
Mike Pavone |
Initial implementation of sprite overflow and sprite collision status register flags
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Tue, 17 Sep 2013 09:45:14 -0700 |
Mike Pavone |
Implement HV counter latch
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Tue, 17 Sep 2013 00:11:45 -0700 |
Mike Pavone |
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
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Sun, 15 Sep 2013 22:20:43 -0700 |
Mike Pavone |
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
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Fri, 13 Sep 2013 19:22:46 -0700 |
Mike Pavone |
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
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Tue, 10 Sep 2013 23:31:08 -0700 |
Mike Pavone |
Added copyright notice to source files and added GPL license text in COPYING
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Tue, 10 Sep 2013 00:29:46 -0700 |
Mike Pavone |
Implement FIFO latency and improve DMA accuracy
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Fri, 26 Jul 2013 19:55:04 -0700 |
Mike Pavone |
Added support for saving savestates. Added gst savestate format test harness
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Mon, 15 Jul 2013 23:07:45 -0700 |
Mike Pavone |
Restore one of the VDP debugging modes
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