| Thu, 18 Apr 2019 19:47:50 -0700 |
Michael Pavone |
WIP new 68K core using CPU DSL
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| Wed, 20 Feb 2019 00:34:52 -0800 |
Michael Pavone |
Fix calculation for whether coalesceFlags is needed for xchg instruction in CPU DSL
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| Tue, 19 Feb 2019 22:51:33 -0800 |
Michael Pavone |
Store sync_cycle in context rather than in a local in CPU DSL. Fix the timing of a number of instructions in new Z80 core
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| Fri, 15 Feb 2019 23:58:34 -0800 |
Michael Pavone |
Basic support for string operands in CPU DSL
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| Tue, 12 Feb 2019 09:58:04 -0800 |
Michael Pavone |
Integration of new Z80 core is sort of working now
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| Sun, 10 Feb 2019 11:58:23 -0800 |
Michael Pavone |
Initial attempt at interrupts in new Z80 core and integrating it into main executable
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| Sat, 09 Feb 2019 11:34:31 -0800 |
Michael Pavone |
Optimization to memory access in new Z80 core
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| Fri, 08 Feb 2019 23:09:58 -0800 |
Michael Pavone |
Added option to CPU DSL to produce a threaded interpreter using computed goto
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| Thu, 07 Feb 2019 09:43:25 -0800 |
Michael Pavone |
Added init functions to z80_util.c so new Z80 core is closer to a drop in replacement for the old one
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| Wed, 06 Feb 2019 09:13:24 -0800 |
Michael Pavone |
Optimization of flag calculation for flags that just copy a bit from the result in CPU DSL
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| Wed, 06 Feb 2019 08:54:09 -0800 |
Michael Pavone |
Fixes to DAA, SCF and CCF to pass ZEXALL in new Z80 core
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| Tue, 05 Feb 2019 19:29:54 -0800 |
Michael Pavone |
Fixed half-carry flag calcuation for adc/sbc in new Z80 core
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| Mon, 04 Feb 2019 23:46:35 -0800 |
Michael Pavone |
Fixed CPI/CPD/CPIR/CPDR in new Z80 core
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| Mon, 04 Feb 2019 22:20:51 -0800 |
Michael Pavone |
Implement DD/FD prefixes for instructions that don't reference HL
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| Mon, 04 Feb 2019 21:43:43 -0800 |
Michael Pavone |
Fixed some issues involving conditional execution and temporaries/constant folding
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| Sun, 03 Feb 2019 11:05:40 -0800 |
Michael Pavone |
Get new Z80 core running in CPM harness
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| Sun, 03 Feb 2019 10:40:41 -0800 |
Michael Pavone |
Implemented the rest of the block move instructions in new Z80 core
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| Sat, 02 Feb 2019 23:02:19 -0800 |
Michael Pavone |
Implemented LDI in new Z80 core
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| Sat, 02 Feb 2019 15:35:15 -0800 |
Michael Pavone |
Implemented RES instruction in new Z80 core
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| Fri, 01 Feb 2019 22:16:56 -0800 |
Michael Pavone |
Miscellaneous small fixes to new Z80 core
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| Thu, 31 Jan 2019 23:33:36 -0800 |
Michael Pavone |
Implemented shift instructions in new Z80 core
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| Thu, 31 Jan 2019 23:03:51 -0800 |
Michael Pavone |
Implemented the rest of the rotate instructions in new Z80 core
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| Thu, 31 Jan 2019 22:41:37 -0800 |
Michael Pavone |
Implementation of some of the rotate instructions in new Z80 core
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| Wed, 30 Jan 2019 21:47:35 -0800 |
Michael Pavone |
Fix cp instruction in new Z80 core and implement its DD/FD prefixes
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| Wed, 30 Jan 2019 09:32:01 -0800 |
Michael Pavone |
Better error reporting when an instruction is given an insufficient number of parameters
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| Tue, 29 Jan 2019 23:56:48 -0800 |
Michael Pavone |
Implement 16-bit addition in new Z80 core along with necessary CPU DSL fixes to make them work right
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| Tue, 29 Jan 2019 22:16:57 -0800 |
Michael Pavone |
Implement parity flag calculation type
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| Tue, 29 Jan 2019 21:26:39 -0800 |
Michael Pavone |
Actually correct overflow flag calculation in CPU DSL
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| Mon, 28 Jan 2019 22:56:43 -0800 |
Michael Pavone |
Fix sbc and implement carry/overflow flags for it in CPU DSL
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| Mon, 28 Jan 2019 22:49:02 -0800 |
Michael Pavone |
Implementation of carry/overflow flags for adc instructions in CPU DSL
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| Mon, 28 Jan 2019 22:37:46 -0800 |
Michael Pavone |
Fixed flag calculation for sub instructions in CPU DSL
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| Mon, 28 Jan 2019 21:30:23 -0800 |
Michael Pavone |
Less broken flag calulcation for sub instructions in CPU DSL
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| Mon, 28 Jan 2019 21:15:27 -0800 |
Michael Pavone |
Initial stab at overflow flag implementation in CPU DSL. Probably broken for subtraction
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| Mon, 28 Jan 2019 20:54:55 -0800 |
Michael Pavone |
First stab at carry and half-carry calculation in CPU DSL
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| Mon, 28 Jan 2019 19:24:04 -0800 |
Michael Pavone |
Fix zero flag calculation in CPU DSL
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| Sun, 27 Jan 2019 14:37:37 -0800 |
Michael Pavone |
Implemented sbc instruction in CPU DSL
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| Sun, 27 Jan 2019 05:55:08 -0800 |
Michael Pavone |
Added adc instruction to CPU DSL
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| Fri, 25 Jan 2019 14:30:55 -0800 |
Michael Pavone |
Output tables in order specified by the extra_tables field so the user can deal with dependencies between tables
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| Fri, 25 Jan 2019 14:13:46 -0800 |
Michael Pavone |
Fix constant propagation to a non-ephemeral destination in CPU DSL
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| Fri, 25 Jan 2019 13:55:30 -0800 |
Michael Pavone |
Fixed missing semicolon in coalesceFlags
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| Fri, 25 Jan 2019 13:45:58 -0800 |
Michael Pavone |
Added new sext instruction for sign extension to CPU sdl
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| Sat, 06 Oct 2018 17:33:15 -0700 |
Michael Pavone |
Implement program ROM reads
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| Thu, 04 Oct 2018 19:12:56 -0700 |
Michael Pavone |
Add the ability for a CPU definition to reference arbitrary C includes and use it to add a placeholder definition of svp_read_16
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| Mon, 01 Oct 2018 19:16:54 -0700 |
Michael Pavone |
Clean up warnings from -1 case
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| Mon, 01 Oct 2018 19:11:17 -0700 |
Michael Pavone |
Getting SVP core closer to compiling
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| Tue, 25 Sep 2018 09:33:46 -0700 |
Michael Pavone |
Fix implementation cmp+condition version of if in CPU DSL
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| Mon, 24 Sep 2018 19:09:16 -0700 |
Michael Pavone |
Support immediate operands for ld and alu ops in SVP. Support double indirect and immediate address modes for alu ops. Fixed DSL issues revealed by those changes
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| Fri, 21 Sep 2018 09:26:12 -0700 |
Michael Pavone |
Did some cleanup of SVP code using the newly more powerful DSL if block and fixed some issues in the DSL implementation that cropped up as a result
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| Tue, 18 Sep 2018 09:06:42 -0700 |
Michael Pavone |
Initial commit of CPU DSL and a WIP SVP implementation written in that DSL
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