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changeset 771:0565b2c1a034

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Add ability to change start address for VRAM viewer. Fix handling of DMA enable flag when it comes to DMA fills. This fixes a bug in James Pond 3
author Michael Pavone <pavone@retrodev.com>
date Fri, 17 Jul 2015 08:49:23 -0700
parents a3b90f746dcf
children 1b82b282b829
files io.c vdp.c
diffstat 2 files changed, 6 insertions(+), 5 deletions(-) [+]
line wrap: on
line diff
--- a/io.c	Tue Jul 14 18:28:05 2015 -0700
+++ b/io.c	Fri Jul 17 08:49:23 2015 -0700
@@ -248,7 +248,7 @@
 		{
 		case UI_DEBUG_MODE_INC:
 			ui_debug_mode++;
-			if (ui_debug_mode == 4) {
+			if (ui_debug_mode == 7) {
 				ui_debug_mode = 0;
 			}
 			genesis->vdp->debug = ui_debug_mode;
--- a/vdp.c	Tue Jul 14 18:28:05 2015 -0700
+++ b/vdp.c	Fri Jul 17 08:49:23 2015 -0700
@@ -910,15 +910,16 @@
 				}
 			}
 		} else {
-			uint32_t cell = (line / 8) * (context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32) + col;
-			uint32_t address = cell * 32 + (line % 8) * 4;
+			uint32_t base = (context->debug - 3) * 0x200;
+			uint32_t cell = base + (line / 8) * (context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32) + col;
+			uint32_t address = (cell * 32 + (line % 8) * 4) & 0xFFFF;
 			for (int32_t i = 0; i < 4; i ++) {
 				*(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] >> 4)];
 				*(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] & 0xF)];
 				address++;
 			}
 			cell++;
-			address = cell * 32 + (line % 8) * 4;
+			address = (cell * 32 + (line % 8) * 4) & 0xFFFF;
 			for (int32_t i = 0; i < 4; i ++) {
 				*(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] >> 4)];
 				*(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] & 0xF)];
@@ -1739,7 +1740,7 @@
 	cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
 	cur->address = context->address;
 	cur->value = value;
-	if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & 0xC0) == 0x80) {
+	if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & 0xC0) == 0x80 && (context->regs[REG_MODE_2] & BIT_DMA_ENABLE)) {
 		context->flags |= FLAG_DMA_RUN;
 	}
 	cur->cd = context->cd;