Mercurial > repos > blastem
changeset 757:483f7e7926a6
More clang warning cleanup
| author | Michael Pavone <pavone@retrodev.com> |
|---|---|
| date | Sun, 28 Jun 2015 09:53:17 -0700 |
| parents | e1dc98f7ed9f |
| children | b52cd6854c28 |
| files | gdb_remote.c m68k_core_x86.c vdp.c |
| diffstat | 3 files changed, 4 insertions(+), 4 deletions(-) [+] |
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--- a/gdb_remote.c Sat Jun 27 13:18:55 2015 -0700 +++ b/gdb_remote.c Sun Jun 28 09:53:17 2015 -0700 @@ -283,8 +283,8 @@ char * rest; uint32_t address = strtoul(command+1, &rest, 16); uint32_t size = strtoul(rest+1, NULL, 16); - if (size > sizeof(send_buf-1)/2) { - size = sizeof(send_buf-1)/2; + if (size > (sizeof(send_buf)-1)/2) { + size = (sizeof(send_buf)-1)/2; } char *cur = send_buf; while (size)
--- a/m68k_core_x86.c Sat Jun 27 13:18:55 2015 -0700 +++ b/m68k_core_x86.c Sun Jun 28 09:53:17 2015 -0700 @@ -1940,7 +1940,7 @@ uint32_t base_flag = inst->op == M68K_ANDI_SR || inst->op == M68K_ANDI_CCR ? X0 : X1; for (int i = 0; i < 5; i++) { - if ((base_flag == X0) ^ (inst->src.params.immed & 1 << i) > 0) + if ((base_flag == X0) ^ ((inst->src.params.immed & 1 << i) > 0)) { flag_mask |= base_flag << ((4 - i) * 3); }
--- a/vdp.c Sat Jun 27 13:18:55 2015 -0700 +++ b/vdp.c Sun Jun 28 09:53:17 2015 -0700 @@ -256,7 +256,7 @@ "01: %.2X | Display %s, V-ints %s, Height: %d, Mode %d\n" "0B: %.2X | E-ints %s, V-Scroll: %s, H-Scroll: %s\n" "0C: %.2X | Width: %d, Shadow/Highlight: %s\n", - context->regs[REG_MODE_1], context->regs[REG_MODE_1] & BIT_HINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_PAL_SEL != 0, + context->regs[REG_MODE_1], context->regs[REG_MODE_1] & BIT_HINT_EN ? "enabled" : "disabled", (context->regs[REG_MODE_1] & BIT_PAL_SEL) != 0, context->regs[REG_MODE_1] & BIT_HVC_LATCH ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_DISP_DIS ? "disabled" : "enabled", context->regs[REG_MODE_2], context->regs[REG_MODE_2] & BIT_DISP_EN ? "enabled" : "disabled", context->regs[REG_MODE_2] & BIT_VINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_2] & BIT_PAL ? 30 : 28, context->regs[REG_MODE_2] & BIT_MODE_5 ? 5 : 4,