changeset 834:65f9041b5f17

Implemented nbcd
author Michael Pavone <pavone@retrodev.com>
date Wed, 21 Oct 2015 23:31:17 -0700
parents 841e44c5af83
children b4cf6573a3f8
files m68k_core.c m68k_core_x86.c
diffstat 2 files changed, 23 insertions(+), 11 deletions(-) [+]
line wrap: on
line diff
--- a/m68k_core.c	Mon Oct 19 19:16:57 2015 -0700
+++ b/m68k_core.c	Wed Oct 21 23:31:17 2015 -0700
@@ -720,6 +720,7 @@
 	BINARY_IMPL(M68K_SUBX, X|N|V|C),
 	OP_IMPL(M68K_ABCD, translate_m68k_abcd_sbcd),
 	OP_IMPL(M68K_SBCD, translate_m68k_abcd_sbcd),
+	OP_IMPL(M68K_NBCD, translate_m68k_abcd_sbcd),
 	BINARY_IMPL(M68K_AND, N|Z|V0|C0),
 	BINARY_IMPL(M68K_EOR, N|Z|V0|C0),
 	BINARY_IMPL(M68K_OR, N|Z|V0|C0),
--- a/m68k_core_x86.c	Mon Oct 19 19:16:57 2015 -0700
+++ b/m68k_core_x86.c	Wed Oct 21 23:31:17 2015 -0700
@@ -1373,18 +1373,29 @@
 void translate_m68k_abcd_sbcd(m68k_options *opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op)
 {
 	code_info *code = &opts->gen.code;
-	if (src_op->base != opts->gen.scratch2) {
-		if (src_op->mode == MODE_REG_DIRECT) {
-			mov_rr(code, src_op->base, opts->gen.scratch2, SZ_B);
-		} else {
-			mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch2, SZ_B);
+	if (inst->op == M68K_NBCD) {
+		if (dst_op->base != opts->gen.scratch2) {
+			if (dst_op->mode == MODE_REG_DIRECT) {
+				mov_rr(code, dst_op->base, opts->gen.scratch2, SZ_B);
+			} else {
+				mov_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch2, SZ_B);
+			}
 		}
-	}
-	if (dst_op->base != opts->gen.scratch1) {
-		if (dst_op->mode == MODE_REG_DIRECT) {
-			mov_rr(code, dst_op->base, opts->gen.scratch1, SZ_B);
-		} else {
-			mov_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch1, SZ_B);
+		xor_rr(code, opts->gen.scratch1, opts->gen.scratch1, SZ_B);
+	} else {
+		if (src_op->base != opts->gen.scratch2) {
+			if (src_op->mode == MODE_REG_DIRECT) {
+				mov_rr(code, src_op->base, opts->gen.scratch2, SZ_B);
+			} else {
+				mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch2, SZ_B);
+			}
+		}
+		if (dst_op->base != opts->gen.scratch1) {
+			if (dst_op->mode == MODE_REG_DIRECT) {
+				mov_rr(code, dst_op->base, opts->gen.scratch1, SZ_B);
+			} else {
+				mov_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch1, SZ_B);
+			}
 		}
 	}
 	uint8_t other_reg;