changeset 1764:6cc2fa6a1955

A couple more instruction timing fixes in new Z80 core
author Michael Pavone <pavone@retrodev.com>
date Wed, 20 Feb 2019 00:16:27 -0800
parents 7e97d820b491
children 7b6831305a6a
files z80.cpu
diffstat 1 files changed, 6 insertions(+), 0 deletions(-) [+]
line wrap: on
line diff
--- a/z80.cpu	Tue Feb 19 23:14:38 2019 -0800
+++ b/z80.cpu	Wed Feb 20 00:16:27 2019 -0800
@@ -383,12 +383,14 @@
 	z80_calc_index ix
 	mov wz scratch2
 	mov main.R scratch1
+	cycles 5
 	ocall write_8
 
 fd 01110RRR ld_to_iy
 	z80_calc_index iy
 	mov wz scratch2
 	mov main.R scratch1
+	cycles 5
 	ocall write_8
 
 00110110 ld_to_hl_immed
@@ -987,6 +989,7 @@
 	update_flags SZYHVXN0C
 	mov hlt l
 	lsr hlt 8 h
+	cycles 7
 	
 ed 01001010 adc_hl_bc
 	local hlw 16
@@ -1113,6 +1116,7 @@
 	update_flags SZYHVXN1C
 	mov hlt l
 	lsr hlt 8 h
+	cycles 7
 	
 ed 01000010 sbc_hl_bc
 	local hlw 16
@@ -1369,6 +1373,7 @@
 	add 1 tmp tmp
 	update_flags SZYHVXN0
 	mov tmp scratch1
+	cycles 1
 	z80_store_hl
 	
 dd 00110100 inc_ixd
@@ -1461,6 +1466,7 @@
 	sub 1 tmp tmp
 	update_flags SZYHVXN1
 	mov tmp scratch1
+	cycles 1
 	z80_store_hl
 	
 dd 00110101 dec_ixd