Mercurial > repos > blastem
changeset 479:863e868752cf
Implement funny behavior for DMA fill to CRAM and VSRAM. Return VSRAM address 0 for reads to VSRAM at >= 40
| author | Mike Pavone <pavone@retrodev.com> |
|---|---|
| date | Tue, 17 Sep 2013 00:42:49 -0700 |
| parents | 2e4a4188cfb0 |
| children | 0737953132ad |
| files | vdp.c |
| diffstat | 1 files changed, 9 insertions(+), 6 deletions(-) [+] |
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--- a/vdp.c Tue Sep 17 00:11:45 2013 -0700 +++ b/vdp.c Tue Sep 17 00:42:49 2013 -0700 @@ -421,13 +421,13 @@ break; case CRAM_WRITE: { //printf("CRAM Write | %X to %X\n", start->value, (start->address/2) & (CRAM_SIZE-1)); - write_cram(context, start->address, start->value); + write_cram(context, start->address, start->partial == 2 ? context->fifo[context->fifo_write].value : start->value); break; } case VSRAM_WRITE: if (((start->address/2) & 63) < VSRAM_SIZE) { //printf("VSRAM Write: %X to %X\n", start->value, context->address); - context->vsram[(start->address/2) & 63] = start->value; + context->vsram[(start->address/2) & 63] = start->partial == 2 ? context->fifo[context->fifo_write].value : start->value; } break; @@ -1597,12 +1597,15 @@ value = context->cram[(context->address/2) & (CRAM_SIZE-1)] & CRAM_BITS; value |= context->fifo[context->fifo_write].value & ~CRAM_BITS; break; - case VSRAM_READ: - if (((context->address / 2) & 63) < VSRAM_SIZE) { - value = context->vsram[(context->address / 2) & 63] & VSRAM_BITS; - value |= context->fifo[context->fifo_write].value & VSRAM_DIRTY_BITS; + case VSRAM_READ: { + uint16_t address = (context->address /2) & 63; + if (address >= VSRAM_SIZE) { + address = 0; } + value = context->vsram[address] & VSRAM_BITS; + value |= context->fifo[context->fifo_write].value & VSRAM_DIRTY_BITS; break; + } } context->address += context->regs[REG_AUTOINC]; return value;