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changeset 1095:920d796ea6a2

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Correct disassembly of r14/r15 relative loads and stores
author Michael Pavone <pavone@retrodev.com>
date Mon, 31 Oct 2016 18:36:17 -0700
parents 1dba006bad47
children 1ab30d427db8
files jagcpu.c
diffstat 1 files changed, 36 insertions(+), 0 deletions(-) [+]
line wrap: on
line diff
--- a/jagcpu.c	Mon Oct 31 09:23:25 2016 -0700
+++ b/jagcpu.c	Mon Oct 31 18:36:17 2016 -0700
@@ -219,6 +219,42 @@
 		);
 	case JAG_JUMP:
 		return sprintf(dst, "%s %s, (r%d)", mnemonics[opcode], jag_cc(inst), jag_reg1(inst));
+	case JAG_LOAD_R14_REL:
+	case JAG_LOAD_R15_REL:
+		return sprintf(dst, "%s (r%d+%d), r%d",  
+			mnemonics[opcode],
+			opcode == JAG_LOAD_R14_REL ? 14 : 15,
+			jag_quick(inst),
+			jag_reg2(inst)
+		);
+		break;
+	case JAG_STORE_R14_REL:
+	case JAG_STORE_R15_REL:
+		return sprintf(dst, "%s r%d, (r%d+%d)",  
+			mnemonics[opcode],
+			jag_reg2(inst),
+			opcode == JAG_STORE_R14_REL ? 14 : 15,
+			jag_quick(inst)
+		);
+		break;
+	case JAG_LOAD_R14_INDEXED:
+	case JAG_LOAD_R15_INDEXED:
+		return sprintf(dst, "%s (r%d+r%d), r%d",  
+			mnemonics[opcode],
+			opcode == JAG_LOAD_R14_INDEXED ? 14 : 15,
+			jag_reg1(inst),
+			jag_reg2(inst)
+		);
+		break;
+	case JAG_STORE_R14_INDEXED:
+	case JAG_STORE_R15_INDEXED:
+		return sprintf(dst, "%s r%d, (r%d+r%d)",  
+			mnemonics[opcode],
+			jag_reg2(inst),
+			opcode == JAG_STORE_R14_INDEXED ? 14 : 15,
+			jag_reg1(inst)
+		);
+		break;
 	default:
 		if (is_quick_1_32_opcode(opcode, is_gpu)) {
 			return sprintf(dst, "%s %d, r%d", mnemonics[opcode], jag_quick(inst), jag_reg2(inst));