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annotate m68k_core.c @ 1461:aa945f1bdd71

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Properly clear trace mode on interrupt or other exception. Fix NBCD with memory destination
author Michael Pavone <pavone@retrodev.com>
date Wed, 06 Sep 2017 23:10:11 -0700
parents 4e5797b3935a
children ffe45c5b8390
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1 /*
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2 Copyright 2014 Michael Pavone
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3 This file is part of BlastEm.
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
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5 */
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6 #include "m68k_core.h"
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7 #include "m68k_internal.h"
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8 #include "68kinst.h"
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9 #include "backend.h"
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10 #include "gen.h"
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11 #include "util.h"
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12 #include "serialize.h"
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13 #include <stdio.h>
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14 #include <stddef.h>
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15 #include <stdlib.h>
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16 #include <string.h>
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17
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18 char disasm_buf[1024];
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19
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20 int8_t native_reg(m68k_op_info * op, m68k_options * opts)
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21 {
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22 if (op->addr_mode == MODE_REG) {
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23 return opts->dregs[op->params.regs.pri];
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24 }
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25 if (op->addr_mode == MODE_AREG) {
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26 return opts->aregs[op->params.regs.pri];
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27 }
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28 return -1;
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29 }
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31 size_t dreg_offset(uint8_t reg)
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32 {
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33 return offsetof(m68k_context, dregs) + sizeof(uint32_t) * reg;
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34 }
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35
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36 size_t areg_offset(uint8_t reg)
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37 {
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38 return offsetof(m68k_context, aregs) + sizeof(uint32_t) * reg;
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39 }
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41 //must be called with an m68k_op_info that uses a register
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42 size_t reg_offset(m68k_op_info *op)
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43 {
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44 return op->addr_mode == MODE_REG ? dreg_offset(op->params.regs.pri) : areg_offset(op->params.regs.pri);
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45 }
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46
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47 void m68k_print_regs(m68k_context * context)
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48 {
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49 printf("XNZVC\n%d%d%d%d%d\n", context->flags[0], context->flags[1], context->flags[2], context->flags[3], context->flags[4]);
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50 for (int i = 0; i < 8; i++) {
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51 printf("d%d: %X\n", i, context->dregs[i]);
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52 }
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53 for (int i = 0; i < 8; i++) {
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54 printf("a%d: %X\n", i, context->aregs[i]);
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55 }
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56 }
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57
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58 void m68k_read_size(m68k_options *opts, uint8_t size)
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59 {
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60 switch (size)
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61 {
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62 case OPSIZE_BYTE:
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63 call(&opts->gen.code, opts->read_8);
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64 break;
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65 case OPSIZE_WORD:
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66 call(&opts->gen.code, opts->read_16);
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67 break;
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68 case OPSIZE_LONG:
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69 call(&opts->gen.code, opts->read_32);
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70 break;
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71 }
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72 }
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73
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74 void m68k_write_size(m68k_options *opts, uint8_t size, uint8_t lowfirst)
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75 {
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76 switch (size)
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77 {
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78 case OPSIZE_BYTE:
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79 call(&opts->gen.code, opts->write_8);
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80 break;
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81 case OPSIZE_WORD:
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82 call(&opts->gen.code, opts->write_16);
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83 break;
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84 case OPSIZE_LONG:
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85 if (lowfirst) {
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86 call(&opts->gen.code, opts->write_32_lowfirst);
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87 } else {
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88 call(&opts->gen.code, opts->write_32_highfirst);
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89 }
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90 break;
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91 }
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92 }
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93
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94 void m68k_save_result(m68kinst * inst, m68k_options * opts)
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95 {
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96 if (inst->dst.addr_mode != MODE_REG && inst->dst.addr_mode != MODE_AREG && inst->dst.addr_mode != MODE_UNUSED) {
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97 if (inst->dst.addr_mode == MODE_AREG_PREDEC &&
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98 ((inst->src.addr_mode == MODE_AREG_PREDEC && inst->op != M68K_MOVE) || (inst->op == M68K_NBCD))
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99 ) {
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100 areg_to_native(opts, inst->dst.params.regs.pri, opts->gen.scratch2);
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101 }
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102 m68k_write_size(opts, inst->extra.size, 1);
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103 }
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104 }
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105
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106 static void translate_m68k_lea_pea(m68k_options * opts, m68kinst * inst)
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107 {
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108 code_info *code = &opts->gen.code;
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109 int8_t dst_reg = inst->op == M68K_PEA ? opts->gen.scratch1 : native_reg(&(inst->dst), opts);
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110 switch(inst->src.addr_mode)
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111 {
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112 case MODE_AREG_INDIRECT:
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113 cycles(&opts->gen, BUS);
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114 if (dst_reg >= 0) {
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115 areg_to_native(opts, inst->src.params.regs.pri, dst_reg);
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116 } else {
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117 if (opts->aregs[inst->src.params.regs.pri] >= 0) {
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parents: 570
diff changeset
118 native_to_areg(opts, opts->aregs[inst->src.params.regs.pri], inst->dst.params.regs.pri);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
119 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
120 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
121 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
122 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
123 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
124 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
125 case MODE_AREG_DISPLACE:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
126 cycles(&opts->gen, 8);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
127 calc_areg_displace(opts, &inst->src, dst_reg >= 0 ? dst_reg : opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
128 if (dst_reg < 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
129 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
130 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
131 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
132 case MODE_AREG_INDEX_DISP8:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
133 cycles(&opts->gen, 12);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
134 if (dst_reg < 0 || inst->dst.params.regs.pri == inst->src.params.regs.pri || inst->dst.params.regs.pri == (inst->src.params.regs.sec >> 1 & 0x7)) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
135 dst_reg = opts->gen.scratch1;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
136 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
137 calc_areg_index_disp8(opts, &inst->src, dst_reg);
581
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents: 574
diff changeset
138 if (dst_reg == opts->gen.scratch1 && inst->op != M68K_PEA) {
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
139 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
140 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
141 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
142 case MODE_PC_DISPLACE:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
143 cycles(&opts->gen, 8);
581
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents: 574
diff changeset
144 if (inst->op == M68K_PEA) {
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents: 574
diff changeset
145 ldi_native(opts, inst->src.params.regs.displacement + inst->address+2, dst_reg);
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents: 574
diff changeset
146 } else {
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents: 574
diff changeset
147 ldi_areg(opts, inst->src.params.regs.displacement + inst->address+2, inst->dst.params.regs.pri);
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents: 574
diff changeset
148 }
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
149 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
150 case MODE_PC_INDEX_DISP8:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
151 cycles(&opts->gen, BUS*3);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
152 if (dst_reg < 0 || inst->dst.params.regs.pri == (inst->src.params.regs.sec >> 1 & 0x7)) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
153 dst_reg = opts->gen.scratch1;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
154 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
155 ldi_native(opts, inst->address+2, dst_reg);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
156 calc_index_disp8(opts, &inst->src, dst_reg);
581
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents: 574
diff changeset
157 if (dst_reg == opts->gen.scratch1 && inst->op != M68K_PEA) {
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
158 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
159 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
160 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
161 case MODE_ABSOLUTE:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
162 case MODE_ABSOLUTE_SHORT:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
163 cycles(&opts->gen, (inst->src.addr_mode == MODE_ABSOLUTE) ? BUS * 3 : BUS * 2);
581
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents: 574
diff changeset
164 if (inst->op == M68K_PEA) {
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents: 574
diff changeset
165 ldi_native(opts, inst->src.params.immed, dst_reg);
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents: 574
diff changeset
166 } else {
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents: 574
diff changeset
167 ldi_areg(opts, inst->src.params.immed, inst->dst.params.regs.pri);
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents: 574
diff changeset
168 }
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
169 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
170 default:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
171 m68k_disasm(inst, disasm_buf);
792
724bbec47f86 Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents: 726
diff changeset
172 fatal_error("%X: %s\naddress mode %d not implemented (lea src)\n", inst->address, disasm_buf, inst->src.addr_mode);
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
173 }
581
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents: 574
diff changeset
174 if (inst->op == M68K_PEA) {
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents: 574
diff changeset
175 subi_areg(opts, 4, 7);
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents: 574
diff changeset
176 areg_to_native(opts, 7, opts->gen.scratch2);
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents: 574
diff changeset
177 call(code, opts->write_32_lowfirst);
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
178 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
179 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
180
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
181 static void push_const(m68k_options *opts, int32_t value)
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
182 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
183 ldi_native(opts, value, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
184 subi_areg(opts, 4, 7);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
185 areg_to_native(opts, 7, opts->gen.scratch2);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
186 call(&opts->gen.code, opts->write_32_highfirst);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
187 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
188
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
189 void jump_m68k_abs(m68k_options * opts, uint32_t address)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
190 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
191 code_info *code = &opts->gen.code;
726
7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents: 725
diff changeset
192 code_ptr dest_addr = get_native_address(opts, address);
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
193 if (!dest_addr) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
194 opts->gen.deferred = defer_address(opts->gen.deferred, address, code->cur + 1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
195 //dummy address to be replaced later, make sure it generates a 4-byte displacement
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
196 dest_addr = code->cur + 256;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
197 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
198 jmp(code, dest_addr);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
199 //this used to call opts->native_addr for destinations in RAM, but that shouldn't be needed
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
200 //since instruction retranslation patches the original native instruction location
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
201 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
202
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
203 static void translate_m68k_bsr(m68k_options * opts, m68kinst * inst)
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
204 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
205 code_info *code = &opts->gen.code;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
206 int32_t disp = inst->src.params.immed;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
207 uint32_t after = inst->address + (inst->variant == VAR_BYTE ? 2 : 4);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
208 //TODO: Add cycles in the right place relative to pushing the return address on the stack
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
209 cycles(&opts->gen, 10);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
210 push_const(opts, after);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
211 jump_m68k_abs(opts, inst->address + 2 + disp);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
212 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
213
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
214 static void translate_m68k_jmp_jsr(m68k_options * opts, m68kinst * inst)
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
215 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
216 uint8_t is_jsr = inst->op == M68K_JSR;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
217 code_info *code = &opts->gen.code;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
218 code_ptr dest_addr;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
219 uint8_t sec_reg;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
220 uint32_t after;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
221 uint32_t m68k_addr;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
222 switch(inst->src.addr_mode)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
223 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
224 case MODE_AREG_INDIRECT:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
225 cycles(&opts->gen, BUS*2);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
226 if (is_jsr) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
227 push_const(opts, inst->address+2);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
228 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
229 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
230 call(code, opts->native_addr);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
231 jmp_r(code, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
232 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
233 case MODE_AREG_DISPLACE:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
234 cycles(&opts->gen, BUS*2);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
235 if (is_jsr) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
236 push_const(opts, inst->address+4);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
237 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
238 calc_areg_displace(opts, &inst->src, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
239 call(code, opts->native_addr);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
240 jmp_r(code, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
241 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
242 case MODE_AREG_INDEX_DISP8:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
243 cycles(&opts->gen, BUS*3);//TODO: CHeck that this is correct
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
244 if (is_jsr) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
245 push_const(opts, inst->address+4);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
246 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
247 calc_areg_index_disp8(opts, &inst->src, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
248 call(code, opts->native_addr);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
249 jmp_r(code, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
250 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
251 case MODE_PC_DISPLACE:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
252 //TODO: Add cycles in the right place relative to pushing the return address on the stack
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
253 cycles(&opts->gen, 10);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
254 if (is_jsr) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
255 push_const(opts, inst->address+4);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
256 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
257 jump_m68k_abs(opts, inst->src.params.regs.displacement + inst->address + 2);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
258 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
259 case MODE_PC_INDEX_DISP8:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
260 cycles(&opts->gen, BUS*3);//TODO: CHeck that this is correct
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
261 if (is_jsr) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
262 push_const(opts, inst->address+4);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
263 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
264 ldi_native(opts, inst->address+2, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
265 calc_index_disp8(opts, &inst->src, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
266 call(code, opts->native_addr);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
267 jmp_r(code, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
268 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
269 case MODE_ABSOLUTE:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
270 case MODE_ABSOLUTE_SHORT:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
271 //TODO: Add cycles in the right place relative to pushing the return address on the stack
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
272 cycles(&opts->gen, inst->src.addr_mode == MODE_ABSOLUTE ? 12 : 10);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
273 if (is_jsr) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
274 push_const(opts, inst->address + (inst->src.addr_mode == MODE_ABSOLUTE ? 6 : 4));
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
275 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
276 jump_m68k_abs(opts, inst->src.params.immed);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
277 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
278 default:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
279 m68k_disasm(inst, disasm_buf);
792
724bbec47f86 Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents: 726
diff changeset
280 fatal_error("%s\naddress mode %d not yet supported (%s)\n", disasm_buf, inst->src.addr_mode, is_jsr ? "jsr" : "jmp");
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
281 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
282 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
283
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
284 static void translate_m68k_unlk(m68k_options * opts, m68kinst * inst)
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
285 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
286 cycles(&opts->gen, BUS);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
287 areg_to_native(opts, inst->dst.params.regs.pri, opts->aregs[7]);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
288 areg_to_native(opts, 7, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
289 call(&opts->gen.code, opts->read_32);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
290 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
291 addi_areg(opts, 4, 7);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
292 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
293
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
294 static void translate_m68k_link(m68k_options * opts, m68kinst * inst)
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
295 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
296 //compensate for displacement word
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
297 cycles(&opts->gen, BUS);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
298 subi_areg(opts, 4, 7);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
299 areg_to_native(opts, 7, opts->gen.scratch2);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
300 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
301 call(&opts->gen.code, opts->write_32_highfirst);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
302 native_to_areg(opts, opts->aregs[7], inst->src.params.regs.pri);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
303 addi_areg(opts, inst->dst.params.immed, 7);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
304 //prefetch
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
305 cycles(&opts->gen, BUS);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
306 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
307
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
308 static void translate_m68k_rts(m68k_options * opts, m68kinst * inst)
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
309 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
310 code_info *code = &opts->gen.code;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
311 areg_to_native(opts, 7, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
312 addi_areg(opts, 4, 7);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
313 call(code, opts->read_32);
1323
c9dc2603b087 Fixed timing for RTS and RTE
Michael Pavone <pavone@retrodev.com>
parents: 1298
diff changeset
314 cycles(&opts->gen, 2*BUS);
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
315 call(code, opts->native_addr);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
316 jmp_r(code, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
317 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
318
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
319 static void translate_m68k_rtr(m68k_options *opts, m68kinst * inst)
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
320 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
321 code_info *code = &opts->gen.code;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
322 //Read saved CCR
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
323 areg_to_native(opts, 7, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
324 call(code, opts->read_16);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
325 addi_areg(opts, 2, 7);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
326 call(code, opts->set_ccr);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
327 //Read saved PC
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
328 areg_to_native(opts, 7, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
329 call(code, opts->read_32);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
330 addi_areg(opts, 4, 7);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
331 //Get native address and jump to it
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
332 call(code, opts->native_addr);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
333 jmp_r(code, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
334 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
335
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
336 static void translate_m68k_trap(m68k_options *opts, m68kinst *inst)
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
337 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
338 code_info *code = &opts->gen.code;
1027
276cd582b728 Fix PC value pushed to stack for A and F line traps
Michael Pavone <pavone@retrodev.com>
parents: 992
diff changeset
339 uint32_t vector, pc = inst->address;
992
261995d06897 Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents: 990
diff changeset
340 switch (inst->op)
261995d06897 Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents: 990
diff changeset
341 {
261995d06897 Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents: 990
diff changeset
342 case M68K_TRAP:
261995d06897 Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents: 990
diff changeset
343 vector = inst->src.params.immed + VECTOR_TRAP_0;
1027
276cd582b728 Fix PC value pushed to stack for A and F line traps
Michael Pavone <pavone@retrodev.com>
parents: 992
diff changeset
344 pc += 2;
992
261995d06897 Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents: 990
diff changeset
345 break;
261995d06897 Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents: 990
diff changeset
346 case M68K_A_LINE_TRAP:
261995d06897 Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents: 990
diff changeset
347 vector = VECTOR_LINE_1010;
261995d06897 Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents: 990
diff changeset
348 break;
261995d06897 Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents: 990
diff changeset
349 case M68K_F_LINE_TRAP:
261995d06897 Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents: 990
diff changeset
350 vector = VECTOR_LINE_1111;
261995d06897 Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents: 990
diff changeset
351 break;
261995d06897 Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents: 990
diff changeset
352 }
261995d06897 Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents: 990
diff changeset
353 ldi_native(opts, vector, opts->gen.scratch2);
1027
276cd582b728 Fix PC value pushed to stack for A and F line traps
Michael Pavone <pavone@retrodev.com>
parents: 992
diff changeset
354 ldi_native(opts, pc, opts->gen.scratch1);
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
355 jmp(code, opts->trap);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
356 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
357
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
358 static void translate_m68k_illegal(m68k_options *opts, m68kinst *inst)
986
f680fe746a7d Implement illegal instruction trap
Michael Pavone <pavone@retrodev.com>
parents: 985
diff changeset
359 {
f680fe746a7d Implement illegal instruction trap
Michael Pavone <pavone@retrodev.com>
parents: 985
diff changeset
360 code_info *code = &opts->gen.code;
f680fe746a7d Implement illegal instruction trap
Michael Pavone <pavone@retrodev.com>
parents: 985
diff changeset
361 cycles(&opts->gen, BUS);
f680fe746a7d Implement illegal instruction trap
Michael Pavone <pavone@retrodev.com>
parents: 985
diff changeset
362 ldi_native(opts, VECTOR_ILLEGAL_INST, opts->gen.scratch2);
f680fe746a7d Implement illegal instruction trap
Michael Pavone <pavone@retrodev.com>
parents: 985
diff changeset
363 ldi_native(opts, inst->address, opts->gen.scratch1);
f680fe746a7d Implement illegal instruction trap
Michael Pavone <pavone@retrodev.com>
parents: 985
diff changeset
364 jmp(code, opts->trap);
f680fe746a7d Implement illegal instruction trap
Michael Pavone <pavone@retrodev.com>
parents: 985
diff changeset
365 }
f680fe746a7d Implement illegal instruction trap
Michael Pavone <pavone@retrodev.com>
parents: 985
diff changeset
366
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
367 static void translate_m68k_move_usp(m68k_options *opts, m68kinst *inst)
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
368 {
990
33a46d35b913 Implement privelege violation exceptions
Michael Pavone <pavone@retrodev.com>
parents: 989
diff changeset
369 m68k_trap_if_not_supervisor(opts, inst);
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
370 cycles(&opts->gen, BUS);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
371 int8_t reg;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
372 if (inst->src.addr_mode == MODE_UNUSED) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
373 reg = native_reg(&inst->dst, opts);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
374 if (reg < 0) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
375 reg = opts->gen.scratch1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
376 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
377 areg_to_native(opts, 8, reg);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
378 if (reg == opts->gen.scratch1) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
379 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
380 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
381 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
382 reg = native_reg(&inst->src, opts);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
383 if (reg < 0) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
384 reg = opts->gen.scratch1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
385 areg_to_native(opts, inst->src.params.regs.pri, reg);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
386 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
387 native_to_areg(opts, reg, 8);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
388 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
389 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
390
1298
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
391 static void translate_movem_regtomem_reglist(m68k_options * opts, m68kinst *inst)
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
392 {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
393 code_info *code = &opts->gen.code;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
394 int8_t bit,reg,dir;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
395 if (inst->dst.addr_mode == MODE_AREG_PREDEC) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
396 reg = 15;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
397 dir = -1;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
398 } else {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
399 reg = 0;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
400 dir = 1;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
401 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
402 for(bit=0; reg < 16 && reg >= 0; reg += dir, bit++) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
403 if (inst->src.params.immed & (1 << bit)) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
404 if (inst->dst.addr_mode == MODE_AREG_PREDEC) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
405 subi_native(opts, (inst->extra.size == OPSIZE_LONG) ? 4 : 2, opts->gen.scratch2);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
406 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
407 push_native(opts, opts->gen.scratch2);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
408 if (reg > 7) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
409 areg_to_native(opts, reg-8, opts->gen.scratch1);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
410 } else {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
411 dreg_to_native(opts, reg, opts->gen.scratch1);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
412 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
413 if (inst->extra.size == OPSIZE_LONG) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
414 call(code, opts->write_32_lowfirst);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
415 } else {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
416 call(code, opts->write_16);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
417 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
418 pop_native(opts, opts->gen.scratch2);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
419 if (inst->dst.addr_mode != MODE_AREG_PREDEC) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
420 addi_native(opts, (inst->extra.size == OPSIZE_LONG) ? 4 : 2, opts->gen.scratch2);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
421 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
422 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
423 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
424 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
425
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
426 static void translate_movem_memtoreg_reglist(m68k_options * opts, m68kinst *inst)
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
427 {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
428 code_info *code = &opts->gen.code;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
429 for(uint8_t reg = 0; reg < 16; reg ++) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
430 if (inst->dst.params.immed & (1 << reg)) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
431 push_native(opts, opts->gen.scratch1);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
432 if (inst->extra.size == OPSIZE_LONG) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
433 call(code, opts->read_32);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
434 } else {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
435 call(code, opts->read_16);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
436 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
437 if (inst->extra.size == OPSIZE_WORD) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
438 sign_extend16_native(opts, opts->gen.scratch1);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
439 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
440 if (reg > 7) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
441 native_to_areg(opts, opts->gen.scratch1, reg-8);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
442 } else {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
443 native_to_dreg(opts, opts->gen.scratch1, reg);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
444 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
445 pop_native(opts, opts->gen.scratch1);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
446 addi_native(opts, (inst->extra.size == OPSIZE_LONG) ? 4 : 2, opts->gen.scratch1);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
447 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
448 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
449 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
450
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
451 static code_ptr get_movem_impl(m68k_options *opts, m68kinst *inst)
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
452 {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
453 uint8_t reg_to_mem = inst->src.addr_mode == MODE_REG;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
454 uint8_t size = inst->extra.size;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
455 int8_t dir = reg_to_mem && inst->dst.addr_mode == MODE_AREG_PREDEC ? -1 : 1;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
456 uint16_t reglist = reg_to_mem ? inst->src.params.immed : inst->dst.params.immed;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
457 for (uint32_t i = 0; i < opts->num_movem; i++)
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
458 {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
459 if (
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
460 opts->big_movem[i].reglist == reglist && opts->big_movem[i].reg_to_mem == reg_to_mem
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
461 && opts->big_movem[i].size == size && opts->big_movem[i].dir == dir
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
462 ) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
463 return opts->big_movem[i].impl;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
464 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
465 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
466 if (opts->num_movem == opts->movem_storage) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
467 opts->movem_storage *= 2;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
468 opts->big_movem = realloc(opts->big_movem, sizeof(movem_fun) * opts->movem_storage);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
469 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
470 if (!opts->extra_code.cur) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
471 init_code_info(&opts->extra_code);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
472 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
473 check_alloc_code(&opts->extra_code, 512);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
474 code_ptr impl = opts->extra_code.cur;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
475 code_info tmp = opts->gen.code;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
476 opts->gen.code = opts->extra_code;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
477 if (reg_to_mem) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
478 translate_movem_regtomem_reglist(opts, inst);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
479 } else {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
480 translate_movem_memtoreg_reglist(opts, inst);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
481 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
482 opts->extra_code = opts->gen.code;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
483 opts->gen.code = tmp;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
484
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
485 rts(&opts->extra_code);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
486 return impl;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
487 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
488
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
489 static void translate_m68k_movem(m68k_options * opts, m68kinst * inst)
588
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
490 {
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
491 code_info *code = &opts->gen.code;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
492 uint8_t early_cycles;
1298
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
493 uint16_t num_regs = inst->src.addr_mode == MODE_REG ? inst->src.params.immed : inst->dst.params.immed;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
494 {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
495 //TODO: Move this popcount alg to a utility function
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
496 uint16_t a = (num_regs & 0b1010101010101010) >> 1;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
497 uint16_t b = num_regs & 0b0101010101010101;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
498 num_regs = a + b;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
499 a = (num_regs & 0b1100110011001100) >> 2;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
500 b = num_regs & 0b0011001100110011;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
501 num_regs = a + b;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
502 a = (num_regs & 0b1111000011110000) >> 4;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
503 b = num_regs & 0b0000111100001111;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
504 num_regs = a + b;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
505 a = (num_regs & 0b1111111100000000) >> 8;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
506 b = num_regs & 0b0000000011111111;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
507 num_regs = a + b;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
508 }
588
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
509 if(inst->src.addr_mode == MODE_REG) {
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
510 //reg to mem
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
511 early_cycles = 8;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
512 switch (inst->dst.addr_mode)
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
513 {
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
514 case MODE_AREG_INDIRECT:
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
515 case MODE_AREG_PREDEC:
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
516 areg_to_native(opts, inst->dst.params.regs.pri, opts->gen.scratch2);
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
517 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
518 case MODE_AREG_DISPLACE:
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
519 early_cycles += BUS;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
520 calc_areg_displace(opts, &inst->dst, opts->gen.scratch2);
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
521 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
522 case MODE_AREG_INDEX_DISP8:
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
523 early_cycles += 6;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
524 calc_areg_index_disp8(opts, &inst->dst, opts->gen.scratch2);
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
525 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
526 case MODE_PC_DISPLACE:
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
527 early_cycles += BUS;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
528 ldi_native(opts, inst->dst.params.regs.displacement + inst->address+2, opts->gen.scratch2);
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
529 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
530 case MODE_PC_INDEX_DISP8:
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
531 early_cycles += 6;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
532 ldi_native(opts, inst->address+2, opts->gen.scratch2);
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
533 calc_index_disp8(opts, &inst->dst, opts->gen.scratch2);
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
534 case MODE_ABSOLUTE:
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
535 early_cycles += 4;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
536 case MODE_ABSOLUTE_SHORT:
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
537 early_cycles += 4;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
538 ldi_native(opts, inst->dst.params.immed, opts->gen.scratch2);
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
539 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
540 default:
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
541 m68k_disasm(inst, disasm_buf);
792
724bbec47f86 Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents: 726
diff changeset
542 fatal_error("%X: %s\naddress mode %d not implemented (movem dst)\n", inst->address, disasm_buf, inst->dst.addr_mode);
588
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
543 }
1298
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
544
588
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
545 cycles(&opts->gen, early_cycles);
1298
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
546 if (num_regs <= 9) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
547 translate_movem_regtomem_reglist(opts, inst);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
548 } else {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
549 call(code, get_movem_impl(opts, inst));
588
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
550 }
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
551 if (inst->dst.addr_mode == MODE_AREG_PREDEC) {
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
552 native_to_areg(opts, opts->gen.scratch2, inst->dst.params.regs.pri);
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
553 }
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
554 } else {
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
555 //mem to reg
1212
191ac490fb3d Implement extra read and fix movem timing generally
Michael Pavone <pavone@retrodev.com>
parents: 1130
diff changeset
556 early_cycles = 8; //includes prefetch
588
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
557 switch (inst->src.addr_mode)
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
558 {
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
559 case MODE_AREG_INDIRECT:
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
560 case MODE_AREG_POSTINC:
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
561 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1);
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
562 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
563 case MODE_AREG_DISPLACE:
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
564 early_cycles += BUS;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
565 calc_areg_displace(opts, &inst->src, opts->gen.scratch1);
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
566 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
567 case MODE_AREG_INDEX_DISP8:
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
568 early_cycles += 6;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
569 calc_areg_index_disp8(opts, &inst->src, opts->gen.scratch1);
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
570 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
571 case MODE_PC_DISPLACE:
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
572 early_cycles += BUS;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
573 ldi_native(opts, inst->src.params.regs.displacement + inst->address+2, opts->gen.scratch1);
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
574 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
575 case MODE_PC_INDEX_DISP8:
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
576 early_cycles += 6;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
577 ldi_native(opts, inst->address+2, opts->gen.scratch1);
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
578 calc_index_disp8(opts, &inst->src, opts->gen.scratch1);
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
579 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
580 case MODE_ABSOLUTE:
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
581 early_cycles += 4;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
582 case MODE_ABSOLUTE_SHORT:
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
583 early_cycles += 4;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
584 ldi_native(opts, inst->src.params.immed, opts->gen.scratch1);
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
585 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
586 default:
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
587 m68k_disasm(inst, disasm_buf);
792
724bbec47f86 Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents: 726
diff changeset
588 fatal_error("%X: %s\naddress mode %d not implemented (movem src)\n", inst->address, disasm_buf, inst->src.addr_mode);
588
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
589 }
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
590 cycles(&opts->gen, early_cycles);
1298
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
591
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
592 if (num_regs <= 9) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
593 translate_movem_memtoreg_reglist(opts, inst);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
594 } else {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1282
diff changeset
595 call(code, get_movem_impl(opts, inst));
588
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
596 }
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
597 if (inst->src.addr_mode == MODE_AREG_POSTINC) {
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
598 native_to_areg(opts, opts->gen.scratch1, inst->src.params.regs.pri);
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
599 }
1212
191ac490fb3d Implement extra read and fix movem timing generally
Michael Pavone <pavone@retrodev.com>
parents: 1130
diff changeset
600 //Extra read
191ac490fb3d Implement extra read and fix movem timing generally
Michael Pavone <pavone@retrodev.com>
parents: 1130
diff changeset
601 call(code, opts->read_16);
588
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
602 }
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
603 }
963d5901f583 Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 587
diff changeset
604
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
605 static void translate_m68k_nop(m68k_options *opts, m68kinst *inst)
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
606 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
607 cycles(&opts->gen, BUS);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
608 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
609
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
610 void swap_ssp_usp(m68k_options * opts)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
611 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
612 areg_to_native(opts, 7, opts->gen.scratch2);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
613 areg_to_native(opts, 8, opts->aregs[7]);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
614 native_to_areg(opts, opts->gen.scratch2, 8);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
615 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
616
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
617 static void translate_m68k_rte(m68k_options *opts, m68kinst *inst)
687
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 681
diff changeset
618 {
990
33a46d35b913 Implement privelege violation exceptions
Michael Pavone <pavone@retrodev.com>
parents: 989
diff changeset
619 m68k_trap_if_not_supervisor(opts, inst);
33a46d35b913 Implement privelege violation exceptions
Michael Pavone <pavone@retrodev.com>
parents: 989
diff changeset
620
687
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 681
diff changeset
621 code_info *code = &opts->gen.code;
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 681
diff changeset
622 //Read saved SR
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 681
diff changeset
623 areg_to_native(opts, 7, opts->gen.scratch1);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 681
diff changeset
624 call(code, opts->read_16);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 681
diff changeset
625 addi_areg(opts, 2, 7);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 681
diff changeset
626 call(code, opts->set_sr);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 681
diff changeset
627 //Read saved PC
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 681
diff changeset
628 areg_to_native(opts, 7, opts->gen.scratch1);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 681
diff changeset
629 call(code, opts->read_32);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 681
diff changeset
630 addi_areg(opts, 4, 7);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 681
diff changeset
631 check_user_mode_swap_ssp_usp(opts);
1323
c9dc2603b087 Fixed timing for RTS and RTE
Michael Pavone <pavone@retrodev.com>
parents: 1298
diff changeset
632 cycles(&opts->gen, 2*BUS);
687
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 681
diff changeset
633 //Get native address, sync components, recalculate integer points and jump to returned address
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 681
diff changeset
634 call(code, opts->native_addr_and_sync);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 681
diff changeset
635 jmp_r(code, opts->gen.scratch1);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 681
diff changeset
636 }
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 681
diff changeset
637
726
7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents: 725
diff changeset
638 code_ptr get_native_address(m68k_options *opts, uint32_t address)
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
639 {
726
7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents: 725
diff changeset
640 native_map_slot * native_code_map = opts->gen.native_code_map;
987
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents: 986
diff changeset
641
1130
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
642 memmap_chunk const *mem_chunk = find_map_chunk(address, &opts->gen, 0, NULL);
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
643 if (mem_chunk) {
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
644 //calculate the lowest alias for this address
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
645 address = mem_chunk->start + ((address - mem_chunk->start) & mem_chunk->mask);
1214
afa3d0a227ae Fix regression in handling of unmapped memory addresses
Michael Pavone <pavone@retrodev.com>
parents: 1212
diff changeset
646 } else {
afa3d0a227ae Fix regression in handling of unmapped memory addresses
Michael Pavone <pavone@retrodev.com>
parents: 1212
diff changeset
647 address &= opts->gen.address_mask;
985
751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First
Michael Pavone <pavone@retrodev.com>
parents: 981
diff changeset
648 }
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
649 uint32_t chunk = address / NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
650 if (!native_code_map[chunk].base) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
651 return NULL;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
652 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
653 uint32_t offset = address % NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
654 if (native_code_map[chunk].offsets[offset] == INVALID_OFFSET || native_code_map[chunk].offsets[offset] == EXTENSION_WORD) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
655 return NULL;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
656 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
657 return native_code_map[chunk].base + native_code_map[chunk].offsets[offset];
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
658 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
659
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
660 code_ptr get_native_from_context(m68k_context * context, uint32_t address)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
661 {
726
7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents: 725
diff changeset
662 return get_native_address(context->options, address);
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
663 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
664
1130
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
665 uint32_t get_instruction_start(m68k_options *opts, uint32_t address)
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
666 {
1130
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
667 native_map_slot * native_code_map = opts->gen.native_code_map;
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
668 memmap_chunk const *mem_chunk = find_map_chunk(address, &opts->gen, 0, NULL);
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
669 if (mem_chunk) {
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
670 //calculate the lowest alias for this address
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
671 address = mem_chunk->start + ((address - mem_chunk->start) & mem_chunk->mask);
1214
afa3d0a227ae Fix regression in handling of unmapped memory addresses
Michael Pavone <pavone@retrodev.com>
parents: 1212
diff changeset
672 } else {
afa3d0a227ae Fix regression in handling of unmapped memory addresses
Michael Pavone <pavone@retrodev.com>
parents: 1212
diff changeset
673 address &= opts->gen.address_mask;
985
751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First
Michael Pavone <pavone@retrodev.com>
parents: 981
diff changeset
674 }
751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First
Michael Pavone <pavone@retrodev.com>
parents: 981
diff changeset
675
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
676 uint32_t chunk = address / NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
677 if (!native_code_map[chunk].base) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
678 return 0;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
679 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
680 uint32_t offset = address % NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
681 if (native_code_map[chunk].offsets[offset] == INVALID_OFFSET) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
682 return 0;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
683 }
1130
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
684 while (native_code_map[chunk].offsets[offset] == EXTENSION_WORD)
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
685 {
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
686 --address;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
687 chunk = address / NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
688 offset = address % NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
689 }
988
ce9df7a5fdf2 Fix changes made to get_instruction_start and map_native_address to cope with being able to translate at odd addresses.
Michael Pavone <pavone@retrodev.com>
parents: 987
diff changeset
690 return address;
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
691 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
692
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
693 static void map_native_address(m68k_context * context, uint32_t address, code_ptr native_addr, uint8_t size, uint8_t native_size)
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
694 {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
695 m68k_options * opts = context->options;
1130
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
696 native_map_slot * native_code_map = opts->gen.native_code_map;
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
697 uint32_t meta_off;
1228
2e6dcb5c11a2 WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents: 1214
diff changeset
698 memmap_chunk const *mem_chunk = find_map_chunk(address, &opts->gen, MMAP_CODE, &meta_off);
1130
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
699 if (mem_chunk) {
1228
2e6dcb5c11a2 WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents: 1214
diff changeset
700 if (mem_chunk->flags & MMAP_CODE) {
2e6dcb5c11a2 WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents: 1214
diff changeset
701 uint32_t masked = (address - mem_chunk->start) & mem_chunk->mask;
1130
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
702 uint32_t final_off = masked + meta_off;
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
703 uint32_t ram_flags_off = final_off >> (opts->gen.ram_flags_shift + 3);
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
704 context->ram_code_flags[ram_flags_off] |= 1 << ((final_off >> opts->gen.ram_flags_shift) & 7);
690
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 688
diff changeset
705
1130
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
706 uint32_t slot = final_off / 1024;
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
707 if (!opts->gen.ram_inst_sizes[slot]) {
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
708 opts->gen.ram_inst_sizes[slot] = malloc(sizeof(uint8_t) * 512);
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
709 }
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
710 opts->gen.ram_inst_sizes[slot][(final_off/2) & 511] = native_size;
690
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 688
diff changeset
711
1130
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
712 //TODO: Deal with case in which end of instruction is in a different memory chunk
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
713 masked = (address + size - 1) & mem_chunk->mask;
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
714 final_off = masked + meta_off;
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
715 ram_flags_off = final_off >> (opts->gen.ram_flags_shift + 3);
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
716 context->ram_code_flags[ram_flags_off] |= 1 << ((final_off >> opts->gen.ram_flags_shift) & 7);
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
717 }
1130
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
718 //calculate the lowest alias for this address
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
719 address = mem_chunk->start + ((address - mem_chunk->start) & mem_chunk->mask);
1214
afa3d0a227ae Fix regression in handling of unmapped memory addresses
Michael Pavone <pavone@retrodev.com>
parents: 1212
diff changeset
720 } else {
afa3d0a227ae Fix regression in handling of unmapped memory addresses
Michael Pavone <pavone@retrodev.com>
parents: 1212
diff changeset
721 address &= opts->gen.address_mask;
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
722 }
987
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents: 986
diff changeset
723
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
724 uint32_t chunk = address / NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
725 if (!native_code_map[chunk].base) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
726 native_code_map[chunk].base = native_addr;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
727 native_code_map[chunk].offsets = malloc(sizeof(int32_t) * NATIVE_CHUNK_SIZE);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
728 memset(native_code_map[chunk].offsets, 0xFF, sizeof(int32_t) * NATIVE_CHUNK_SIZE);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
729 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
730 uint32_t offset = address % NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
731 native_code_map[chunk].offsets[offset] = native_addr-native_code_map[chunk].base;
988
ce9df7a5fdf2 Fix changes made to get_instruction_start and map_native_address to cope with being able to translate at odd addresses.
Michael Pavone <pavone@retrodev.com>
parents: 987
diff changeset
732 for(address++,size-=1; size; address++,size-=1) {
ce9df7a5fdf2 Fix changes made to get_instruction_start and map_native_address to cope with being able to translate at odd addresses.
Michael Pavone <pavone@retrodev.com>
parents: 987
diff changeset
733 address &= opts->gen.address_mask;
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
734 chunk = address / NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
735 offset = address % NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
736 if (!native_code_map[chunk].base) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
737 native_code_map[chunk].base = native_addr;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
738 native_code_map[chunk].offsets = malloc(sizeof(int32_t) * NATIVE_CHUNK_SIZE);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
739 memset(native_code_map[chunk].offsets, 0xFF, sizeof(int32_t) * NATIVE_CHUNK_SIZE);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
740 }
713
f9b80a78d9a6 Don't overwrite an instruction offset mapping with an extension word value. I really need the ability for a word to be mapped to more than one instruction, but this will be more correct for now
Michael Pavone <pavone@retrodev.com>
parents: 706
diff changeset
741 if (native_code_map[chunk].offsets[offset] == INVALID_OFFSET) {
f9b80a78d9a6 Don't overwrite an instruction offset mapping with an extension word value. I really need the ability for a word to be mapped to more than one instruction, but this will be more correct for now
Michael Pavone <pavone@retrodev.com>
parents: 706
diff changeset
742 //TODO: Better handling of overlapping instructions
f9b80a78d9a6 Don't overwrite an instruction offset mapping with an extension word value. I really need the ability for a word to be mapped to more than one instruction, but this will be more correct for now
Michael Pavone <pavone@retrodev.com>
parents: 706
diff changeset
743 native_code_map[chunk].offsets[offset] = EXTENSION_WORD;
f9b80a78d9a6 Don't overwrite an instruction offset mapping with an extension word value. I really need the ability for a word to be mapped to more than one instruction, but this will be more correct for now
Michael Pavone <pavone@retrodev.com>
parents: 706
diff changeset
744 }
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
745 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
746 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
747
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
748 static uint8_t get_native_inst_size(m68k_options * opts, uint32_t address)
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
749 {
1130
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
750 uint32_t meta_off;
1228
2e6dcb5c11a2 WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents: 1214
diff changeset
751 memmap_chunk const *chunk = find_map_chunk(address, &opts->gen, MMAP_CODE, &meta_off);
1130
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
752 if (chunk) {
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
753 meta_off += (address - chunk->start) & chunk->mask;
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
754 }
690
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 688
diff changeset
755 uint32_t slot = meta_off/1024;
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 688
diff changeset
756 return opts->gen.ram_inst_sizes[slot][(meta_off/2)%512];
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
757 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
758
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
759 uint8_t m68k_is_terminal(m68kinst * inst)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
760 {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
761 return inst->op == M68K_RTS || inst->op == M68K_RTE || inst->op == M68K_RTR || inst->op == M68K_JMP
1279
996eb76d6da1 RESET is not a terminal instruction on the 68K. Fixes a crash bug in Chavez II and possibly other games
Michael Pavone <pavone@retrodev.com>
parents: 1275
diff changeset
762 || inst->op == M68K_TRAP || inst->op == M68K_ILLEGAL || inst->op == M68K_INVALID
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
763 || (inst->op == M68K_BCC && inst->extra.cond == COND_TRUE);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
764 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
765
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
766 static void m68k_handle_deferred(m68k_context * context)
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
767 {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
768 m68k_options * opts = context->options;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
769 process_deferred(&opts->gen.deferred, context, (native_addr_func)get_native_from_context);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
770 if (opts->gen.deferred) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
771 translate_m68k_stream(opts->gen.deferred->address, context);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
772 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
773 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
774
989
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents: 988
diff changeset
775 uint16_t m68k_get_ir(m68k_context *context)
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents: 988
diff changeset
776 {
1130
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
777 uint32_t inst_addr = get_instruction_start(context->options, context->last_prefetch_address-2);
989
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents: 988
diff changeset
778 uint16_t *native_addr = get_native_pointer(inst_addr, (void **)context->mem_pointers, &context->options->gen);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents: 988
diff changeset
779 if (native_addr) {
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents: 988
diff changeset
780 return *native_addr;
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents: 988
diff changeset
781 }
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents: 988
diff changeset
782 fprintf(stderr, "M68K: Failed to calculate value of IR. Last prefetch address: %X\n", context->last_prefetch_address);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents: 988
diff changeset
783 return 0xFFFF;
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents: 988
diff changeset
784 }
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents: 988
diff changeset
785
1329
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
786 static m68k_debug_handler find_breakpoint(m68k_context *context, uint32_t address)
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
787 {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
788 for (uint32_t i = 0; i < context->num_breakpoints; i++)
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
789 {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
790 if (context->breakpoints[i].address == address) {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
791 return context->breakpoints[i].handler;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
792 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
793 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
794 return NULL;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
795 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
796
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
797 void insert_breakpoint(m68k_context * context, uint32_t address, m68k_debug_handler bp_handler)
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
798 {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
799 if (!find_breakpoint(context, address)) {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
800 if (context->bp_storage == context->num_breakpoints) {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
801 context->bp_storage *= 2;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
802 if (context->bp_storage < 4) {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
803 context->bp_storage = 4;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
804 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
805 context->breakpoints = realloc(context->breakpoints, context->bp_storage * sizeof(m68k_breakpoint));
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
806 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
807 context->breakpoints[context->num_breakpoints++] = (m68k_breakpoint){
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
808 .handler = bp_handler,
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
809 .address = address
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
810 };
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
811 m68k_breakpoint_patch(context, address, bp_handler, NULL);
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
812 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
813 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
814
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
815 m68k_context *m68k_bp_dispatcher(m68k_context *context, uint32_t address)
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
816 {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
817 m68k_debug_handler handler = find_breakpoint(context, address);
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
818 if (handler) {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
819 handler(context, address);
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
820 } else {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
821 //spurious breakoint?
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
822 warning("Spurious breakpoing at %X\n", address);
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
823 remove_breakpoint(context, address);
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
824 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
825
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
826 return context;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
827 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
828
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
829 typedef enum {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
830 RAW_FUNC = 1,
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
831 BINARY_ARITH,
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
832 UNARY_ARITH,
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
833 OP_FUNC
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
834 } impl_type;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
835
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
836 typedef void (*raw_fun)(m68k_options * opts, m68kinst *inst);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
837 typedef void (*op_fun)(m68k_options * opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
838
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
839 typedef struct {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
840 union {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
841 raw_fun raw;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
842 uint32_t flag_mask;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
843 op_fun op;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
844 } impl;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
845 impl_type itype;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
846 } impl_info;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
847
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
848 #define RAW_IMPL(inst, fun) [inst] = { .impl = { .raw = fun }, .itype = RAW_FUNC }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
849 #define OP_IMPL(inst, fun) [inst] = { .impl = { .op = fun }, .itype = OP_FUNC }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
850 #define UNARY_IMPL(inst, mask) [inst] = { .impl = { .flag_mask = mask }, .itype = UNARY_ARITH }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
851 #define BINARY_IMPL(inst, mask) [inst] = { .impl = { .flag_mask = mask}, .itype = BINARY_ARITH }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
852
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
853 static impl_info m68k_impls[] = {
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
854 //math
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
855 BINARY_IMPL(M68K_ADD, X|N|Z|V|C),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
856 BINARY_IMPL(M68K_SUB, X|N|Z|V|C),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
857 //z flag is special cased for ADDX/SUBX
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
858 BINARY_IMPL(M68K_ADDX, X|N|V|C),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
859 BINARY_IMPL(M68K_SUBX, X|N|V|C),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
860 OP_IMPL(M68K_ABCD, translate_m68k_abcd_sbcd),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
861 OP_IMPL(M68K_SBCD, translate_m68k_abcd_sbcd),
834
65f9041b5f17 Implemented nbcd
Michael Pavone <pavone@retrodev.com>
parents: 799
diff changeset
862 OP_IMPL(M68K_NBCD, translate_m68k_abcd_sbcd),
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
863 BINARY_IMPL(M68K_AND, N|Z|V0|C0),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
864 BINARY_IMPL(M68K_EOR, N|Z|V0|C0),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
865 BINARY_IMPL(M68K_OR, N|Z|V0|C0),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
866 RAW_IMPL(M68K_CMP, translate_m68k_cmp),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
867 OP_IMPL(M68K_DIVS, translate_m68k_div),
1282
c5821f9de325 Cycle accurate implementation of divs
Michael Pavone <pavone@retrodev.com>
parents: 1279
diff changeset
868 OP_IMPL(M68K_DIVU, translate_m68k_div),
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
869 OP_IMPL(M68K_MULS, translate_m68k_mul),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
870 OP_IMPL(M68K_MULU, translate_m68k_mul),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
871 RAW_IMPL(M68K_EXT, translate_m68k_ext),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
872 UNARY_IMPL(M68K_NEG, X|N|Z|V|C),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
873 OP_IMPL(M68K_NEGX, translate_m68k_negx),
614
60a06c025103 Fix flag mask for m68k not
Michael Pavone <pavone@retrodev.com>
parents: 588
diff changeset
874 UNARY_IMPL(M68K_NOT, N|Z|V|C),
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
875 UNARY_IMPL(M68K_TST, N|Z|V0|C0),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
876
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
877 //shift/rotate
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
878 OP_IMPL(M68K_ASL, translate_m68k_sl),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
879 OP_IMPL(M68K_LSL, translate_m68k_sl),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
880 OP_IMPL(M68K_ASR, translate_m68k_asr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
881 OP_IMPL(M68K_LSR, translate_m68k_lsr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
882 OP_IMPL(M68K_ROL, translate_m68k_rot),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
883 OP_IMPL(M68K_ROR, translate_m68k_rot),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
884 OP_IMPL(M68K_ROXL, translate_m68k_rot),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
885 OP_IMPL(M68K_ROXR, translate_m68k_rot),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
886 UNARY_IMPL(M68K_SWAP, N|Z|V0|C0),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
887
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
888 //bit
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
889 OP_IMPL(M68K_BCHG, translate_m68k_bit),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
890 OP_IMPL(M68K_BCLR, translate_m68k_bit),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
891 OP_IMPL(M68K_BSET, translate_m68k_bit),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
892 OP_IMPL(M68K_BTST, translate_m68k_bit),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
893
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
894 //data movement
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
895 RAW_IMPL(M68K_MOVE, translate_m68k_move),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
896 RAW_IMPL(M68K_MOVEM, translate_m68k_movem),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
897 RAW_IMPL(M68K_MOVEP, translate_m68k_movep),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
898 RAW_IMPL(M68K_MOVE_USP, translate_m68k_move_usp),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
899 RAW_IMPL(M68K_LEA, translate_m68k_lea_pea),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
900 RAW_IMPL(M68K_PEA, translate_m68k_lea_pea),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
901 RAW_IMPL(M68K_CLR, translate_m68k_clr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
902 OP_IMPL(M68K_EXG, translate_m68k_exg),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
903 RAW_IMPL(M68K_SCC, translate_m68k_scc),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
904
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
905 //function calls and branches
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
906 RAW_IMPL(M68K_BCC, translate_m68k_bcc),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
907 RAW_IMPL(M68K_BSR, translate_m68k_bsr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
908 RAW_IMPL(M68K_DBCC, translate_m68k_dbcc),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
909 RAW_IMPL(M68K_JMP, translate_m68k_jmp_jsr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
910 RAW_IMPL(M68K_JSR, translate_m68k_jmp_jsr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
911 RAW_IMPL(M68K_RTS, translate_m68k_rts),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
912 RAW_IMPL(M68K_RTE, translate_m68k_rte),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
913 RAW_IMPL(M68K_RTR, translate_m68k_rtr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
914 RAW_IMPL(M68K_LINK, translate_m68k_link),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
915 RAW_IMPL(M68K_UNLK, translate_m68k_unlk),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
916
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
917 //SR/CCR stuff
584
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents: 582
diff changeset
918 RAW_IMPL(M68K_ANDI_CCR, translate_m68k_andi_ori_ccr_sr),
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents: 582
diff changeset
919 RAW_IMPL(M68K_ANDI_SR, translate_m68k_andi_ori_ccr_sr),
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
920 RAW_IMPL(M68K_EORI_CCR, translate_m68k_eori_ccr_sr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
921 RAW_IMPL(M68K_EORI_SR, translate_m68k_eori_ccr_sr),
584
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents: 582
diff changeset
922 RAW_IMPL(M68K_ORI_CCR, translate_m68k_andi_ori_ccr_sr),
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents: 582
diff changeset
923 RAW_IMPL(M68K_ORI_SR, translate_m68k_andi_ori_ccr_sr),
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
924 OP_IMPL(M68K_MOVE_CCR, translate_m68k_move_ccr_sr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
925 OP_IMPL(M68K_MOVE_SR, translate_m68k_move_ccr_sr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
926 OP_IMPL(M68K_MOVE_FROM_SR, translate_m68k_move_from_sr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
927 RAW_IMPL(M68K_STOP, translate_m68k_stop),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
928
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
929 //traps
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
930 OP_IMPL(M68K_CHK, translate_m68k_chk),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
931 RAW_IMPL(M68K_TRAP, translate_m68k_trap),
992
261995d06897 Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents: 990
diff changeset
932 RAW_IMPL(M68K_A_LINE_TRAP, translate_m68k_trap),
261995d06897 Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents: 990
diff changeset
933 RAW_IMPL(M68K_F_LINE_TRAP, translate_m68k_trap),
839
4556818b6847 Implement TRAPV
Michael Pavone <pavone@retrodev.com>
parents: 837
diff changeset
934 RAW_IMPL(M68K_TRAPV, translate_m68k_trapv),
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
935 RAW_IMPL(M68K_ILLEGAL, translate_m68k_illegal),
986
f680fe746a7d Implement illegal instruction trap
Michael Pavone <pavone@retrodev.com>
parents: 985
diff changeset
936 RAW_IMPL(M68K_INVALID, translate_m68k_illegal),
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
937
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
938 //misc
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
939 RAW_IMPL(M68K_NOP, translate_m68k_nop),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
940 RAW_IMPL(M68K_RESET, translate_m68k_reset),
837
f2cd380adebe Implement TAS
Michael Pavone <pavone@retrodev.com>
parents: 834
diff changeset
941 RAW_IMPL(M68K_TAS, translate_m68k_tas),
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
942 };
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
943
1329
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
944 static void translate_m68k(m68k_context *context, m68kinst * inst)
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
945 {
1329
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
946 m68k_options * opts = context->options;
987
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents: 986
diff changeset
947 if (inst->address & 1) {
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents: 986
diff changeset
948 translate_m68k_odd(opts, inst);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents: 986
diff changeset
949 return;
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents: 986
diff changeset
950 }
1329
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
951 code_ptr start = opts->gen.code.cur;
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
952 check_cycles_int(&opts->gen, inst->address);
1329
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
953
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
954 m68k_debug_handler bp;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
955 if ((bp = find_breakpoint(context, inst->address))) {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
956 m68k_breakpoint_patch(context, inst->address, bp, start);
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
957 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
958
701
200ee73c7210 Remove/comment verbose logging added for tracking down sync bug
Michael Pavone <pavone@retrodev.com>
parents: 697
diff changeset
959 //log_address(&opts->gen, inst->address, "M68K: %X @ %d\n");
981
902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 979
diff changeset
960 if (
902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 979
diff changeset
961 (inst->src.addr_mode > MODE_AREG && inst->src.addr_mode < MODE_IMMEDIATE)
902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 979
diff changeset
962 || (inst->dst.addr_mode > MODE_AREG && inst->dst.addr_mode < MODE_IMMEDIATE)
989
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents: 988
diff changeset
963 || (inst->op == M68K_BCC && (inst->src.params.immed & 1))
981
902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 979
diff changeset
964 ) {
902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 979
diff changeset
965 //Not accurate for all cases, but probably good enough for now
902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 979
diff changeset
966 m68k_set_last_prefetch(opts, inst->address + inst->bytes);
902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 979
diff changeset
967 }
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
968 impl_info * info = m68k_impls + inst->op;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
969 if (info->itype == RAW_FUNC) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
970 info->impl.raw(opts, inst);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
971 return;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
972 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
973
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
974 host_ea src_op, dst_op;
1363
df6af7187b36 Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move
Michael Pavone <pavone@retrodev.com>
parents: 1341
diff changeset
975 uint8_t needs_int_latch = 0;
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
976 if (inst->src.addr_mode != MODE_UNUSED) {
1363
df6af7187b36 Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move
Michael Pavone <pavone@retrodev.com>
parents: 1341
diff changeset
977 needs_int_latch |= translate_m68k_op(inst, &src_op, opts, 0);
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
978 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
979 if (inst->dst.addr_mode != MODE_UNUSED) {
1363
df6af7187b36 Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move
Michael Pavone <pavone@retrodev.com>
parents: 1341
diff changeset
980 needs_int_latch |= translate_m68k_op(inst, &dst_op, opts, 1);
df6af7187b36 Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move
Michael Pavone <pavone@retrodev.com>
parents: 1341
diff changeset
981 }
df6af7187b36 Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move
Michael Pavone <pavone@retrodev.com>
parents: 1341
diff changeset
982 if (needs_int_latch) {
df6af7187b36 Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move
Michael Pavone <pavone@retrodev.com>
parents: 1341
diff changeset
983 m68k_check_cycles_int_latch(opts);
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
984 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
985 if (info->itype == OP_FUNC) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
986 info->impl.op(opts, inst, &src_op, &dst_op);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
987 } else if (info->itype == BINARY_ARITH) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
988 translate_m68k_arith(opts, inst, info->impl.flag_mask, &src_op, &dst_op);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
989 } else if (info->itype == UNARY_ARITH) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
990 translate_m68k_unary(opts, inst, info->impl.flag_mask, inst->dst.addr_mode != MODE_UNUSED ? &dst_op : &src_op);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
991 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
992 m68k_disasm(inst, disasm_buf);
792
724bbec47f86 Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents: 726
diff changeset
993 fatal_error("%X: %s\ninstruction %d not yet implemented\n", inst->address, disasm_buf, inst->op);
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
994 }
894
a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted.
Michael Pavone <pavone@retrodev.com>
parents: 884
diff changeset
995 if (opts->gen.code.stack_off) {
a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted.
Michael Pavone <pavone@retrodev.com>
parents: 884
diff changeset
996 m68k_disasm(inst, disasm_buf);
a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted.
Michael Pavone <pavone@retrodev.com>
parents: 884
diff changeset
997 fatal_error("Stack offset is %X after %X: %s\n", opts->gen.code.stack_off, inst->address, disasm_buf);
a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted.
Michael Pavone <pavone@retrodev.com>
parents: 884
diff changeset
998 }
582
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
999 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 581
diff changeset
1000
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1001 void translate_m68k_stream(uint32_t address, m68k_context * context)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1002 {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1003 m68kinst instbuf;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1004 m68k_options * opts = context->options;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1005 code_info *code = &opts->gen.code;
726
7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents: 725
diff changeset
1006 if(get_native_address(opts, address)) {
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1007 return;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1008 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1009 uint16_t *encoded, *next;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1010 do {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1011 if (opts->address_log) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1012 fprintf(opts->address_log, "%X\n", address);
654
98927f1b005b Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents: 653
diff changeset
1013 fflush(opts->address_log);
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1014 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1015 do {
653
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 614
diff changeset
1016 encoded = get_native_pointer(address, (void **)context->mem_pointers, &opts->gen);
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 614
diff changeset
1017 if (!encoded) {
1228
2e6dcb5c11a2 WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents: 1214
diff changeset
1018 code_ptr start = code->cur;
1082
2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents: 1027
diff changeset
1019 translate_out_of_bounds(opts, address);
1228
2e6dcb5c11a2 WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents: 1214
diff changeset
1020 code_ptr after = code->cur;
1275
f36ef4847ef2 Fix bug in handling of translating unmapped addresses
Michael Pavone <pavone@retrodev.com>
parents: 1262
diff changeset
1021 map_native_address(context, address, start, 2, after-start);
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1022 break;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1023 }
726
7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents: 725
diff changeset
1024 code_ptr existing = get_native_address(opts, address);
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1025 if (existing) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1026 jmp(code, existing);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1027 break;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1028 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1029 next = m68k_decode(encoded, &instbuf, address);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1030 if (instbuf.op == M68K_INVALID) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1031 instbuf.src.params.immed = *encoded;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1032 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1033 uint16_t m68k_size = (next-encoded)*2;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1034 address += m68k_size;
653
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 614
diff changeset
1035 //char disbuf[1024];
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1036 //m68k_disasm(&instbuf, disbuf);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1037 //printf("%X: %s\n", instbuf.address, disbuf);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1038
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1039 //make sure the beginning of the code for an instruction is contiguous
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1040 check_code_prologue(code);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1041 code_ptr start = code->cur;
1329
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
1042 translate_m68k(context, &instbuf);
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1043 code_ptr after = code->cur;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1044 map_native_address(context, instbuf.address, start, m68k_size, after-start);
987
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents: 986
diff changeset
1045 } while(!m68k_is_terminal(&instbuf) && !(address & 1));
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1046 process_deferred(&opts->gen.deferred, context, (native_addr_func)get_native_from_context);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1047 if (opts->gen.deferred) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1048 address = opts->gen.deferred->address;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1049 }
653
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 614
diff changeset
1050 } while(opts->gen.deferred);
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1051 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1052
587
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1053 void * m68k_retranslate_inst(uint32_t address, m68k_context * context)
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1054 {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1055 m68k_options * opts = context->options;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1056 code_info *code = &opts->gen.code;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1057 uint8_t orig_size = get_native_inst_size(opts, address);
726
7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents: 725
diff changeset
1058 code_ptr orig_start = get_native_address(context->options, address);
587
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1059 uint32_t orig = address;
902
6011409ded0d Fix a few lingering stack alignment rework bugs
Michael Pavone <pavone@retrodev.com>
parents: 894
diff changeset
1060 code_info orig_code = {orig_start, orig_start + orig_size + 5, 0};
653
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 614
diff changeset
1061 uint16_t *after, *inst = get_native_pointer(address, (void **)context->mem_pointers, &opts->gen);
587
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1062 m68kinst instbuf;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1063 after = m68k_decode(inst, &instbuf, orig);
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1064 if (orig_size != MAX_NATIVE_SIZE) {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1065 deferred_addr * orig_deferred = opts->gen.deferred;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1066
654
98927f1b005b Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents: 653
diff changeset
1067 //make sure we have enough code space for the max size instruction
98927f1b005b Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents: 653
diff changeset
1068 check_alloc_code(code, MAX_NATIVE_SIZE);
587
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1069 code_ptr native_start = code->cur;
1329
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
1070 translate_m68k(context, &instbuf);
587
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1071 code_ptr native_end = code->cur;
654
98927f1b005b Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents: 653
diff changeset
1072 /*uint8_t is_terminal = m68k_is_terminal(&instbuf);
587
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1073 if ((native_end - native_start) <= orig_size) {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1074 code_ptr native_next;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1075 if (!is_terminal) {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1076 native_next = get_native_address(context->native_code_map, orig + (after-inst)*2);
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1077 }
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1078 if (is_terminal || (native_next && ((native_next == orig_start + orig_size) || (orig_size - (native_end - native_start)) > 5))) {
654
98927f1b005b Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents: 653
diff changeset
1079 printf("Using original location: %p\n", orig_code.cur);
587
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1080 remove_deferred_until(&opts->gen.deferred, orig_deferred);
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1081 code_info tmp;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1082 tmp.cur = code->cur;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1083 tmp.last = code->last;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1084 code->cur = orig_code.cur;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1085 code->last = orig_code.last;
1329
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
1086 translate_m68k(context, &instbuf);
587
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1087 native_end = orig_code.cur = code->cur;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1088 code->cur = tmp.cur;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1089 code->last = tmp.last;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1090 if (!is_terminal) {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1091 nop_fill_or_jmp_next(&orig_code, orig_start + orig_size, native_next);
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1092 }
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1093 m68k_handle_deferred(context);
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1094 return orig_start;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1095 }
654
98927f1b005b Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents: 653
diff changeset
1096 }*/
587
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1097
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1098 map_native_address(context, instbuf.address, native_start, (after-inst)*2, MAX_NATIVE_SIZE);
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1099
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1100 jmp(&orig_code, native_start);
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1101 if (!m68k_is_terminal(&instbuf)) {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1102 code_ptr native_end = code->cur;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1103 code->cur = native_start + MAX_NATIVE_SIZE;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1104 code_ptr rest = get_native_address_trans(context, orig + (after-inst)*2);
1341
f1607874dbee Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents: 1329
diff changeset
1105 code_info tmp_code = {
f1607874dbee Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents: 1329
diff changeset
1106 .cur = native_end,
f1607874dbee Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents: 1329
diff changeset
1107 .last = native_start + MAX_NATIVE_SIZE,
f1607874dbee Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents: 1329
diff changeset
1108 .stack_off = code->stack_off
f1607874dbee Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents: 1329
diff changeset
1109 };
f1607874dbee Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents: 1329
diff changeset
1110 jmp(&tmp_code, rest);
587
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1111 } else {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1112 code->cur = native_start + MAX_NATIVE_SIZE;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1113 }
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1114 m68k_handle_deferred(context);
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1115 return native_start;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1116 } else {
654
98927f1b005b Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents: 653
diff changeset
1117 code_info tmp = *code;
98927f1b005b Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents: 653
diff changeset
1118 *code = orig_code;
1329
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
1119 translate_m68k(context, &instbuf);
654
98927f1b005b Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents: 653
diff changeset
1120 orig_code = *code;
98927f1b005b Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents: 653
diff changeset
1121 *code = tmp;
587
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1122 if (!m68k_is_terminal(&instbuf)) {
654
98927f1b005b Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents: 653
diff changeset
1123 jmp(&orig_code, get_native_address_trans(context, orig + (after-inst)*2));
587
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1124 }
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1125 m68k_handle_deferred(context);
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1126 return orig_start;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1127 }
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1128 }
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents: 584
diff changeset
1129
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1130 code_ptr get_native_address_trans(m68k_context * context, uint32_t address)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1131 {
726
7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents: 725
diff changeset
1132 code_ptr ret = get_native_address(context->options, address);
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1133 if (!ret) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1134 translate_m68k_stream(address, context);
726
7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents: 725
diff changeset
1135 ret = get_native_address(context->options, address);
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1136 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1137 return ret;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1138 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1139
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1140 void remove_breakpoint(m68k_context * context, uint32_t address)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1141 {
1329
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
1142 for (uint32_t i = 0; i < context->num_breakpoints; i++)
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
1143 {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
1144 if (context->breakpoints[i].address == address) {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
1145 if (i != (context->num_breakpoints-1)) {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
1146 context->breakpoints[i] = context->breakpoints[context->num_breakpoints-1];
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
1147 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
1148 context->num_breakpoints--;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
1149 break;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
1150 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
1151 }
726
7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents: 725
diff changeset
1152 code_ptr native = get_native_address(context->options, address);
1329
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
1153 if (!native) {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
1154 return;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1323
diff changeset
1155 }
673
7f1b5570b2a1 Fix 68K remove_breakpoint
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
1156 code_info tmp = context->options->gen.code;
7f1b5570b2a1 Fix 68K remove_breakpoint
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
1157 context->options->gen.code.cur = native;
706
0a6dea8c8083 Fix problem with removing breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 701
diff changeset
1158 context->options->gen.code.last = native + MAX_NATIVE_SIZE;
653
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 614
diff changeset
1159 check_cycles_int(&context->options->gen, address);
673
7f1b5570b2a1 Fix 68K remove_breakpoint
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
1160 context->options->gen.code = tmp;
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1161 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1162
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1163 void start_68k_context(m68k_context * context, uint32_t address)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1164 {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1165 code_ptr addr = get_native_address_trans(context, address);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1166 m68k_options * options = context->options;
883
9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents: 839
diff changeset
1167 context->should_return = 0;
9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents: 839
diff changeset
1168 options->start_context(addr, context);
9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents: 839
diff changeset
1169 }
9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents: 839
diff changeset
1170
9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents: 839
diff changeset
1171 void resume_68k(m68k_context *context)
9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents: 839
diff changeset
1172 {
9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents: 839
diff changeset
1173 code_ptr addr = context->resume_pc;
9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents: 839
diff changeset
1174 context->resume_pc = NULL;
9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents: 839
diff changeset
1175 m68k_options * options = context->options;
9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents: 839
diff changeset
1176 context->should_return = 0;
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1177 options->start_context(addr, context);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1178 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1179
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1180 void m68k_reset(m68k_context * context)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1181 {
653
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 614
diff changeset
1182 //TODO: Actually execute the M68K reset vector rather than simulating some of its behavior
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 614
diff changeset
1183 uint16_t *reset_vec = get_native_pointer(0, (void **)context->mem_pointers, &context->options->gen);
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 614
diff changeset
1184 context->aregs[7] = reset_vec[0] << 16 | reset_vec[1];
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 614
diff changeset
1185 uint32_t address = reset_vec[2] << 16 | reset_vec[3];
570
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1186 start_68k_context(context, address);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1187 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1188
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 883
diff changeset
1189 void m68k_options_free(m68k_options *opts)
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 883
diff changeset
1190 {
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 883
diff changeset
1191 free(opts->gen.native_code_map);
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 883
diff changeset
1192 free(opts->gen.ram_inst_sizes);
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 883
diff changeset
1193 free(opts);
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 883
diff changeset
1194 }
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 883
diff changeset
1195
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
1196
1082
2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents: 1027
diff changeset
1197 m68k_context * init_68k_context(m68k_options * opts, m68k_reset_handler reset_handler)
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
1198 {
796
41f73c76b978 Fix some memory issues
=?UTF-8?q?Higor=20Eur=C3=ADpedes?= <heuripedes@gmail.com>
parents: 726
diff changeset
1199 size_t ctx_size = sizeof(m68k_context) + ram_size(&opts->gen) / (1 << opts->gen.ram_flags_shift) / 8;
41f73c76b978 Fix some memory issues
=?UTF-8?q?Higor=20Eur=C3=ADpedes?= <heuripedes@gmail.com>
parents: 726
diff changeset
1200 m68k_context * context = malloc(ctx_size);
41f73c76b978 Fix some memory issues
=?UTF-8?q?Higor=20Eur=C3=ADpedes?= <heuripedes@gmail.com>
parents: 726
diff changeset
1201 memset(context, 0, ctx_size);
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
1202 context->options = opts;
690
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 688
diff changeset
1203 context->int_cycle = CYCLE_NEVER;
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
1204 context->status = 0x27;
1082
2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents: 1027
diff changeset
1205 context->reset_handler = (code_ptr)reset_handler;
690
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 688
diff changeset
1206 return context;
574
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
1207 }
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1208
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1209 void m68k_serialize(m68k_context *context, uint32_t pc, serialize_buffer *buf)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1210 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1211 for (int i = 0; i < 8; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1212 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1213 save_int32(buf, context->dregs[i]);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1214 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1215 for (int i = 0; i < 9; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1216 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1217 save_int32(buf, context->aregs[i]);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1218 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1219 save_int32(buf, pc);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1220 uint16_t sr = context->status << 3;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1221 for (int flag = 4; flag >= 0; flag--) {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1222 sr <<= 1;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1223 sr |= context->flags[flag] != 0;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1224 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1225 save_int16(buf, sr);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1226 save_int32(buf, context->current_cycle);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1227 save_int32(buf, context->int_cycle);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1228 save_int8(buf, context->int_num);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1229 save_int8(buf, context->int_pending);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1230 save_int8(buf, context->trace_pending);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1231 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1232
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1233 void m68k_deserialize(deserialize_buffer *buf, void *vcontext)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1234 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1235 m68k_context *context = vcontext;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1236 for (int i = 0; i < 8; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1237 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1238 context->dregs[i] = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1239 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1240 for (int i = 0; i < 9; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1241 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1242 context->aregs[i] = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1243 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1244 //hack until both PC and IR registers are represented properly
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1245 context->last_prefetch_address = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1246 uint16_t sr = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1247 context->status = sr >> 8;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1248 for (int flag = 0; flag < 5; flag++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1249 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1250 context->flags[flag] = sr & 1;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1251 sr >>= 1;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1252 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1253 context->current_cycle = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1254 context->int_cycle = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1255 context->int_num = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1256 context->int_pending = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1257 context->trace_pending = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
1258 }