Mercurial > repos > blastem
annotate m68k_core.h @ 664:bca748422bf0
Use SZ_PTR instead of SZ_Q in Z80 core for 32-bit compat
author | Michael Pavone <pavone@retrodev.com> |
---|---|
date | Fri, 02 Jan 2015 12:04:58 -0800 |
parents | a18e3923481e |
children | 30ccf56842d6 |
rev | line source |
---|---|
467
140af5509ce7
Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents:
348
diff
changeset
|
1 /* |
140af5509ce7
Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents:
348
diff
changeset
|
2 Copyright 2013 Michael Pavone |
539
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3 This file is part of BlastEm. |
467
140af5509ce7
Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents:
348
diff
changeset
|
4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
140af5509ce7
Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents:
348
diff
changeset
|
5 */ |
569
9b7fcf748be0
Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
6 #ifndef M68K_CORE_H_ |
9b7fcf748be0
Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
7 #define M68K_CORE_H_ |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
8 #include <stdint.h> |
197
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
9 #include <stdio.h> |
557
acec5464fa1e
Rename x86_backend.h and x86_backend.c to backend.h and backend.c respectively
Mike Pavone <pavone@retrodev.com>
parents:
547
diff
changeset
|
10 #include "backend.h" |
208
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
198
diff
changeset
|
11 //#include "68kinst.h" |
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
198
diff
changeset
|
12 struct m68kinst; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
13 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
14 #define NUM_MEM_AREAS 4 |
86
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
15 #define NATIVE_MAP_CHUNKS (64*1024) |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
16 #define NATIVE_CHUNK_SIZE ((16 * 1024 * 1024 / NATIVE_MAP_CHUNKS)/2) |
193
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
192
diff
changeset
|
17 #define MAX_NATIVE_SIZE 255 |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
18 |
540
4ca826862174
Generate m68k_start_context at runtime so it can use the generated load_context and save_context
Michael Pavone <pavone@retrodev.com>
parents:
539
diff
changeset
|
19 typedef void (*start_fun)(uint8_t * addr, void * context); |
4ca826862174
Generate m68k_start_context at runtime so it can use the generated load_context and save_context
Michael Pavone <pavone@retrodev.com>
parents:
539
diff
changeset
|
20 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
21 typedef struct { |
558
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
22 cpu_options gen; |
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
23 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
24 int8_t dregs[8]; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
25 int8_t aregs[8]; |
539
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
26 int8_t flag_regs[5]; |
197
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
27 FILE *address_log; |
558
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
28 code_ptr read_16; |
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
29 code_ptr write_16; |
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
30 code_ptr read_8; |
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
31 code_ptr write_8; |
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
32 code_ptr read_32; |
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
33 code_ptr write_32_lowfirst; |
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
34 code_ptr write_32_highfirst; |
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
35 code_ptr do_sync; |
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
36 code_ptr trap; |
540
4ca826862174
Generate m68k_start_context at runtime so it can use the generated load_context and save_context
Michael Pavone <pavone@retrodev.com>
parents:
539
diff
changeset
|
37 start_fun start_context; |
558
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
38 code_ptr retrans_stub; |
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
39 code_ptr native_addr; |
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
40 code_ptr native_addr_and_sync; |
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
41 code_ptr get_sr; |
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
42 code_ptr set_sr; |
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
43 code_ptr set_ccr; |
569
9b7fcf748be0
Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
44 } m68k_options; |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
45 |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
46 typedef struct { |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
47 uint8_t flags[5]; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
48 uint8_t status; |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
49 uint16_t int_ack; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
50 uint32_t dregs[8]; |
73
8da611e69b32
Implement a couple of supervisor instructions
Mike Pavone <pavone@retrodev.com>
parents:
54
diff
changeset
|
51 uint32_t aregs[9]; |
8da611e69b32
Implement a couple of supervisor instructions
Mike Pavone <pavone@retrodev.com>
parents:
54
diff
changeset
|
52 uint32_t target_cycle; //cycle at which the next synchronization or interrupt occurs |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
53 uint32_t current_cycle; |
73
8da611e69b32
Implement a couple of supervisor instructions
Mike Pavone <pavone@retrodev.com>
parents:
54
diff
changeset
|
54 uint32_t sync_cycle; |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
73
diff
changeset
|
55 uint32_t int_cycle; |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
73
diff
changeset
|
56 uint32_t int_num; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
57 uint16_t *mem_pointers[NUM_MEM_AREAS]; |
263
2989ed7b8608
Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K.
Mike Pavone <pavone@retrodev.com>
parents:
252
diff
changeset
|
58 void *video_context; |
343
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
317
diff
changeset
|
59 uint16_t reserved; |
539
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
60 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
61 native_map_slot *native_code_map; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
62 m68k_options *options; |
192
1db07e112bf7
Prep work for handling games that modify code in RAM
Mike Pavone <pavone@retrodev.com>
parents:
184
diff
changeset
|
63 uint8_t ram_code_flags[32/8]; |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
263
diff
changeset
|
64 void *system; |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
65 } m68k_context; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
66 |
569
9b7fcf748be0
Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
67 void translate_m68k(m68k_options * opts, struct m68kinst * inst); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
566
diff
changeset
|
68 void translate_m68k_stream(uint32_t address, m68k_context * context); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
69 void start_68k_context(m68k_context * context, uint32_t address); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
569
diff
changeset
|
70 void init_m68k_opts(m68k_options * opts, memmap_chunk * memmap, uint32_t num_chunks); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
71 void init_68k_context(m68k_context * context, native_map_slot * native_code_map, void * opts); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
18
diff
changeset
|
72 void m68k_reset(m68k_context * context); |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
155
diff
changeset
|
73 void insert_breakpoint(m68k_context * context, uint32_t address, uint8_t * bp_handler); |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
155
diff
changeset
|
74 void remove_breakpoint(m68k_context * context, uint32_t address); |
208
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
198
diff
changeset
|
75 m68k_context * m68k_handle_code_write(uint32_t address, m68k_context * context); |
566
624dd5106060
Add backtrace (bt) command to 68K debugger
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
76 uint32_t get_instruction_start(native_map_slot * native_code_map, uint32_t address); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
18
diff
changeset
|
77 |
569
9b7fcf748be0
Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
78 #endif //M68K_CORE_H_ |
198
209a37eed3e7
Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents:
197
diff
changeset
|
79 |