Mercurial > repos > blastem
annotate lc8951.c @ 2274:bf1bb893f104
Properly ignore low bits of SP start address in disassembler
author | Michael Pavone <pavone@retrodev.com> |
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date | Thu, 29 Dec 2022 22:44:35 -0800 |
parents | 5c28534e6e09 |
children | 9ead0fe69d9b |
rev | line source |
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1 #include "lc8951.h" |
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2 #include "backend.h" |
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3 |
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4 enum { |
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5 COMIN, |
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6 IFSTAT, |
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7 DBCL, |
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8 DBCH, |
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9 HEAD0, |
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10 HEAD1, |
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11 HEAD2, |
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12 HEAD3, |
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13 PTL, |
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14 PTH, |
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15 WAL, |
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16 WAH, |
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17 STAT0, |
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18 STAT1, |
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19 STAT2, |
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20 STAT3, |
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21 |
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22 SBOUT = COMIN, |
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23 IFCTRL = IFSTAT, |
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24 DACL = HEAD0, |
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25 DACH = HEAD1, |
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26 DTTRG = HEAD2, |
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27 DTACK = HEAD3, |
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28 WAL_WRITE = PTL, |
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29 WAH_WRITE = PTH, |
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30 CTRL0 = WAL, |
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31 CTRL1 = WAH, |
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32 PTL_WRITE = STAT0, |
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33 PTH_WRITE = STAT1, |
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34 RESET = STAT3 |
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35 }; |
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36 |
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37 //IFCTRL |
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38 #define BIT_CMDIEN 0x80 |
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39 #define BIT_DTEIEN 0x40 |
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40 #define BIT_DECIEN 0x20 |
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41 #define BIT_CMDBK 0x10 |
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42 #define BIT_DTWAI 0x08 |
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43 #define BIT_STWAI 0x04 |
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44 #define BIT_DOUTEN 0x02 |
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45 #define BIT_SOUTEN 0x01 |
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46 |
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47 //IFSTAT |
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48 #define BIT_CMDI 0x80 |
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49 #define BIT_DTEI 0x40 |
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50 #define BIT_DECI 0x20 |
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51 #define BIT_DTBSY 0x08 |
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52 #define BIT_STBSY 0x04 |
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53 #define BIT_DTEN 0x02 |
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54 #define BIT_STEN 0x01 |
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55 |
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56 //CTRL0 |
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57 #define BIT_DECEN 0x80 |
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58 #define BIT_WRRQ 0x04 |
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59 #define BIT_ORQ 0x02 |
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60 #define BIT_PRQ 0x01 |
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61 |
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62 //CTRL1 |
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63 #define BIT_SYIEN 0x80 |
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64 #define BIT_SYDEN 0x40 |
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65 |
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66 //STAT0 |
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67 #define BIT_CRCOK 0x80 |
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68 #define BIT_ILSYNC 0x40 |
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69 #define BIT_NOSYNC 0x20 |
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70 #define BIT_LBLK 0x10 |
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71 #define BIT_SBLK 0x04 |
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72 #define BIT_UCEBLK 0x01 |
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73 |
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74 //STAT3 |
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75 #define BIT_VALST 0x80 |
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76 #define BIT_WLONG 0x40 |
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77 |
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78 //datasheet timing info |
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79 //3 cycles for memory operation |
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80 //6 cycles min for DMA-mode host transfer |
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81 |
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82 void lc8951_init(lc8951 *context, lcd8951_byte_recv_fun byte_handler, void *handler_data) |
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83 { |
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84 //This seems to vary somewhat between Sega CD models |
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85 //unclear if the difference is in the lc8951 or gate array |
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86 context->regs[IFSTAT] = 0xFF; |
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87 context->ar_mask = 0x1F; |
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88 context->clock_step = (2 + 2); // external divider, internal divider |
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89 context->cycles_per_byte = context->clock_step * 6; |
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90 context->byte_handler = byte_handler; |
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91 context->handler_data = handler_data; |
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92 context->decode_end = CYCLE_NEVER; |
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93 context->transfer_end = CYCLE_NEVER; |
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94 context->next_byte_cycle = CYCLE_NEVER; |
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95 } |
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96 |
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97 void lc8951_set_dma_multiple(lc8951 *context, uint32_t multiple) |
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98 { |
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99 context->cycles_per_byte = context->clock_step * multiple; |
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100 if (context->transfer_end != CYCLE_NEVER) { |
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101 uint16_t transfer_size = context->regs[DBCL] | (context->regs[DBCH] << 8); |
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102 context->transfer_end = context->next_byte_cycle + transfer_size * context->cycles_per_byte; |
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103 } |
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104 } |
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105 |
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106 void lc8951_reg_write(lc8951 *context, uint8_t value) |
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107 { |
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108 switch (context->ar) |
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109 { |
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110 case SBOUT: |
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111 context->regs[context->ar] = value; |
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112 if (context->ifctrl & BIT_SOUTEN) { |
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113 context->regs[IFSTAT] &= ~BIT_STBSY; |
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114 } |
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115 break; |
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116 case IFCTRL: |
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117 context->ifctrl = value; |
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118 if (!(value & BIT_SOUTEN)) { |
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119 context->regs[IFSTAT] |= BIT_STBSY; |
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120 } |
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121 if (!(value & BIT_DOUTEN)) { |
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122 context->regs[IFSTAT] |= BIT_DTBSY|BIT_DTEI; |
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123 context->transfer_end = CYCLE_NEVER; |
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124 } |
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125 break; |
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126 case DBCL: |
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127 context->regs[context->ar] = value; |
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parents:
diff
changeset
|
128 break; |
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Initial work on CDC emulation
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parents:
diff
changeset
|
129 case DBCH: |
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Initial work on CDC emulation
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parents:
diff
changeset
|
130 context->regs[context->ar] = value & 0xF; |
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Initial work on CDC emulation
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parents:
diff
changeset
|
131 break; |
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Initial work on CDC emulation
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parents:
diff
changeset
|
132 case DACL: |
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Initial work on CDC emulation
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parents:
diff
changeset
|
133 context->dac &= 0xFF00; |
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Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
134 context->dac |= value; |
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Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
135 break; |
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Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
136 case DACH: |
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Initial work on CDC emulation
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parents:
diff
changeset
|
137 context->dac &= 0xFF; |
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Initial work on CDC emulation
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parents:
diff
changeset
|
138 context->dac |= value << 8; |
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Initial work on CDC emulation
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parents:
diff
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|
139 break; |
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Initial work on CDC emulation
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parents:
diff
changeset
|
140 case DTTRG: |
2065
02a9846668d1
Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
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parents:
2062
diff
changeset
|
141 if (context->ifctrl & BIT_DOUTEN) { |
2058
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Initial work on CDC emulation
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parents:
diff
changeset
|
142 context->regs[IFSTAT] &= ~BIT_DTBSY; |
2062
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
143 uint16_t transfer_size = context->regs[DBCL] | (context->regs[DBCH] << 8); |
2144
10e4439d8f13
Fix speed of CDC to PCM RAM DMA
Michael Pavone <pavone@retrodev.com>
parents:
2142
diff
changeset
|
144 context->transfer_end = context->cycle + transfer_size * context->cycles_per_byte; |
10e4439d8f13
Fix speed of CDC to PCM RAM DMA
Michael Pavone <pavone@retrodev.com>
parents:
2142
diff
changeset
|
145 context->next_byte_cycle = context->cycle; |
2231
8e6fb2c06024
Fix CDC transfer regression
Michael Pavone <pavone@retrodev.com>
parents:
2153
diff
changeset
|
146 context->triggered = 1; |
2065
02a9846668d1
Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
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parents:
2062
diff
changeset
|
147 printf("DTTRG: size %u, cycle %u, end %u\n", transfer_size, context->cycle, context->transfer_end); |
2058
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parents:
diff
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|
148 } |
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Initial work on CDC emulation
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parents:
diff
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|
149 break; |
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Initial work on CDC emulation
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parents:
diff
changeset
|
150 case DTACK: |
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parents:
diff
changeset
|
151 context->regs[IFSTAT] |= BIT_DTEI; |
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Initial work on CDC emulation
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parents:
diff
changeset
|
152 break; |
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Initial work on CDC emulation
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parents:
diff
changeset
|
153 case WAL_WRITE: |
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Initial work on CDC emulation
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parents:
diff
changeset
|
154 context->regs[WAL] = value; |
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Initial work on CDC emulation
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parents:
diff
changeset
|
155 break; |
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Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
156 case WAH_WRITE: |
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Initial work on CDC emulation
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parents:
diff
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|
157 context->regs[WAH] = value; |
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Initial work on CDC emulation
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parents:
diff
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|
158 break; |
2062
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
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parents:
2058
diff
changeset
|
159 case CTRL0: |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
160 context->ctrl0 = value; |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
161 break; |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
162 case CTRL1: |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
163 context->ctrl1 = value; |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
164 break; |
2058
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
165 case PTL_WRITE: |
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Initial work on CDC emulation
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parents:
diff
changeset
|
166 context->regs[PTL] = value; |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
167 break; |
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Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
168 case PTH_WRITE: |
70260f6051dd
Initial work on CDC emulation
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parents:
diff
changeset
|
169 context->regs[PTH] = value; |
2067
f22e04b69272
More CDC/CDD improvements
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parents:
2066
diff
changeset
|
170 //TODO: Datasheet says any write to PT triggers a decode, but initial tests suggest that's not the case |
f22e04b69272
More CDC/CDD improvements
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parents:
2066
diff
changeset
|
171 //Need to do more tests with other CTRL0/CTRL1 settings |
f22e04b69272
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parents:
2066
diff
changeset
|
172 //context->decode_end = context->cycle + 2352 * context->clock_step * 4; |
2058
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
173 break; |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
174 case RESET: |
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Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
175 context->comin_count = 0; |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
176 context->regs[IFSTAT] = 0xFF; |
2080 | 177 context->ifctrl = 0; |
178 context->ctrl0 = 0; | |
179 context->ctrl1 = 0; | |
2058
70260f6051dd
Initial work on CDC emulation
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parents:
diff
changeset
|
180 break; |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
181 default: |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
182 break; |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
183 } |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
184 if (context->ar != SBOUT) { |
70260f6051dd
Initial work on CDC emulation
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parents:
diff
changeset
|
185 context->ar++; |
70260f6051dd
Initial work on CDC emulation
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parents:
diff
changeset
|
186 context->ar &= context->ar_mask; |
70260f6051dd
Initial work on CDC emulation
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parents:
diff
changeset
|
187 } |
70260f6051dd
Initial work on CDC emulation
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parents:
diff
changeset
|
188 } |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
189 |
70260f6051dd
Initial work on CDC emulation
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parents:
diff
changeset
|
190 uint8_t lc8951_reg_read(lc8951 *context) |
70260f6051dd
Initial work on CDC emulation
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parents:
diff
changeset
|
191 { |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
192 uint8_t value; |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
193 if (context->ar == COMIN) { |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
194 if (!context->comin_count) { |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
195 return 0xFF; |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
196 } |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
197 value = context->comin[(context->comin_write - context->comin_count)&sizeof(context->comin)]; |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
198 context->comin_count--; |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
199 if (!context->comin_count) { |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
200 context->regs[IFSTAT] |= BIT_CMDI; |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
201 } |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
202 return value; |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
203 } |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
204 if (context->ar == STAT3) { |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
205 context->regs[IFSTAT] |= BIT_DECI; |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
206 } |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
207 if (context->ar >= sizeof(context->regs)) { |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
208 value = 0xFF; |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
209 } else { |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
210 value = context->regs[context->ar]; |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
211 } |
2062
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
212 printf("CDC read %X: %X\n", context->ar, value); |
2058
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
213 context->ar++; |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
214 context->ar &= context->ar_mask; |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
215 return value; |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
216 } |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
217 |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
218 void lc8951_ar_write(lc8951 *context, uint8_t value) |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
219 { |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
220 context->ar = value & context->ar_mask; |
70260f6051dd
Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
221 } |
2062
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
222 |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
223 //25 MHz clock input (1/2 SCD MCLK) |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
224 //internal /2 divider |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
225 //3 cycles for each SRAM access (though might be crystal frequency rather than internal frequency) |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
226 //6 cycle period for DMA transfer out |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
227 // |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
228 |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
229 void lc8951_run(lc8951 *context, uint32_t cycle) |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
230 { |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
231 for(; context->cycle < cycle; context->cycle += context->clock_step) |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
232 { |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
233 if (context->cycle >= context->decode_end) { |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
234 context->decode_end = CYCLE_NEVER; |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
235 context->regs[IFSTAT] &= ~BIT_DECI; |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
236 context->regs[STAT3] &= ~BIT_VALST; |
2067
f22e04b69272
More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents:
2066
diff
changeset
|
237 if (context->ctrl0 & BIT_WRRQ) { |
f22e04b69272
More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents:
2066
diff
changeset
|
238 uint16_t block_start = (context->regs[PTL] | (context->regs[PTH] << 8)) & (sizeof(context->buffer)-1); |
f22e04b69272
More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents:
2066
diff
changeset
|
239 for (int reg = HEAD0; reg < PTL; reg++) |
f22e04b69272
More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents:
2066
diff
changeset
|
240 { |
f22e04b69272
More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents:
2066
diff
changeset
|
241 context->regs[reg] =context->buffer[block_start++]; |
f22e04b69272
More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents:
2066
diff
changeset
|
242 block_start &= (sizeof(context->buffer)-1); |
f22e04b69272
More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents:
2066
diff
changeset
|
243 } |
2062
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
244 } |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
245 printf("Decode done %X:%X:%X mode %X\n", context->regs[HEAD0], context->regs[HEAD1], context->regs[HEAD2], context->regs[HEAD3]); |
2142
d9151d0894c7
Fix some CD-ROM emulation issues
Michael Pavone <pavone@retrodev.com>
parents:
2131
diff
changeset
|
246 // This check is a hack until I properly implement error detection |
d9151d0894c7
Fix some CD-ROM emulation issues
Michael Pavone <pavone@retrodev.com>
parents:
2131
diff
changeset
|
247 if (context->regs[HEAD0] < 0x74 && (context->regs[HEAD0] & 0xF) < 0xA |
d9151d0894c7
Fix some CD-ROM emulation issues
Michael Pavone <pavone@retrodev.com>
parents:
2131
diff
changeset
|
248 && context->regs[HEAD1] < 0x60 && (context->regs[HEAD1] & 0xF) < 0xA |
d9151d0894c7
Fix some CD-ROM emulation issues
Michael Pavone <pavone@retrodev.com>
parents:
2131
diff
changeset
|
249 && context->regs[HEAD2] < 0x75 && (context->regs[HEAD2] & 0xF) < 0xA |
d9151d0894c7
Fix some CD-ROM emulation issues
Michael Pavone <pavone@retrodev.com>
parents:
2131
diff
changeset
|
250 && context->regs[HEAD3] < 3 && !(context->regs[STAT0] & (BIT_NOSYNC|BIT_ILSYNC)) |
d9151d0894c7
Fix some CD-ROM emulation issues
Michael Pavone <pavone@retrodev.com>
parents:
2131
diff
changeset
|
251 ) { |
d9151d0894c7
Fix some CD-ROM emulation issues
Michael Pavone <pavone@retrodev.com>
parents:
2131
diff
changeset
|
252 |
2153 | 253 if (context->ctrl0 & (BIT_WRRQ|BIT_ORQ|BIT_PRQ)) { |
2142
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254 context->regs[STAT0] |= BIT_CRCOK; |
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255 } |
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256 context->regs[STAT1] = 0; |
2153 | 257 context->regs[STAT2] = 0x10; |
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258 } else { |
2153 | 259 if (context->ctrl0 & (BIT_WRRQ|BIT_ORQ|BIT_PRQ)) { |
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260 context->regs[STAT0] |= BIT_UCEBLK; |
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261 } |
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262 context->regs[STAT1] = 0xFF; |
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263 context->regs[STAT2] = 0xF2; |
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264 } |
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265 context->regs[STAT3] |= BIT_WLONG; |
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266 } |
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267 if (context->cycle >= context->next_byte_cycle) { |
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268 if (context->byte_handler(context->handler_data, context->buffer[context->dac & (sizeof(context->buffer)-1)])) { |
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269 context->next_byte_cycle += context->cycles_per_byte; |
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270 context->dac++; |
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271 context->regs[DBCL]--; |
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272 if (context->regs[DBCL] == 0xFF) { |
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273 context->regs[DBCH]--; |
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274 if (context->regs[DBCH] == 0xFF) { |
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275 context->regs[IFSTAT] &= ~BIT_DTEI; |
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276 context->regs[IFSTAT] |= BIT_DTBSY; |
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277 if (context->cycle != context->transfer_end) { |
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278 printf("Expected transfer end at %u but ended at %u\n", context->transfer_end, context->cycle); |
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279 } |
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280 context->transfer_end = CYCLE_NEVER; |
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281 context->next_byte_cycle = CYCLE_NEVER; |
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282 context->triggered = 0; |
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283 } |
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284 } |
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285 } else { |
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286 // pause transfer |
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287 context->next_byte_cycle = CYCLE_NEVER; |
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288 context->transfer_end = CYCLE_NEVER; |
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289 } |
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290 } |
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291 } |
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292 } |
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293 |
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294 void lc8951_resume_transfer(lc8951 *context, uint32_t cycle) |
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295 { |
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296 if (context->triggered && context->transfer_end == CYCLE_NEVER && (context->ifctrl & BIT_DOUTEN)) { |
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297 uint16_t transfer_size = context->regs[DBCL] | (context->regs[DBCH] << 8); |
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298 //HACK!!! Work around Sub CPU running longer than we would like and dragging other components with it |
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299 uint32_t step_diff = (context->cycle - cycle) / context->clock_step; |
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300 if (step_diff) { |
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301 context->cycle -= step_diff * context->clock_step; |
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302 } |
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303 context->transfer_end = context->cycle + transfer_size * context->cycles_per_byte; |
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304 context->next_byte_cycle = context->cycle; |
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305 if (step_diff) { |
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306 lc8951_run(context, cycle); |
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307 } |
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308 } |
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309 } |
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310 |
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311 void lc8951_write_byte(lc8951 *context, uint32_t cycle, int sector_offset, uint8_t byte) |
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312 { |
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313 lc8951_run(context, cycle); |
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314 uint16_t current_write_addr = context->regs[WAL] | (context->regs[WAH] << 8); |
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315 |
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316 uint8_t sync_detected = 0, sync_ignored = 0; |
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317 if (byte == 0) { |
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318 // HACK!: The (sector_offset < 0x10) check is not correct, but without it Thunderhawk gets stuck |
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319 // It has a sector that contains the sync pattern in the main data area |
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320 // From the LC8951 datasheet, I would expect tohis to trigger a short block, but either |
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321 // it's sync detection is fancier than I thought or I have a bug that is confusing the BIOS |
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322 if (context->sync_counter == 11 && ((sector_offset & 3) == 3) && (sector_offset < 0x10)) { |
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323 if (context->ctrl1 & BIT_SYDEN) { |
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324 sync_detected = 1; |
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325 } else { |
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326 sync_ignored = 1; |
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327 } |
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328 context->sync_counter = 0; |
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329 } else { |
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330 context->sync_counter = 1; |
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331 } |
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332 } else if (byte == 0xFF && context->sync_counter) { |
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333 context->sync_counter++; |
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334 } else { |
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335 context->sync_counter = 0; |
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336 } |
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337 |
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338 uint8_t sync_inserted = 0; |
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339 if (context->ctrl1 & BIT_SYIEN && context->sector_counter == 2351) { |
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340 sync_inserted = 1; |
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341 } |
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342 |
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343 |
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344 if (context->sector_counter < 4) { |
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345 //TODO: Handle SHDREN = 1 |
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346 if ((context->ctrl0 & (BIT_DECEN|BIT_WRRQ)) == (BIT_DECEN)) { |
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347 //monitor only mode |
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348 context->regs[HEAD0 + context->sector_counter] = byte; |
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349 } |
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350 } |
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351 |
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352 if (sync_detected || sync_inserted) { |
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353 //we've recevied the sync pattern for the next block |
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354 context->regs[STAT0] &= ~(BIT_ILSYNC | BIT_NOSYNC | BIT_LBLK | BIT_SBLK); |
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355 if (sync_inserted && !(sync_detected || sync_ignored)) { |
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356 context->regs[STAT0] |= BIT_NOSYNC; |
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357 } |
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358 if (sync_detected && context->sector_counter != 2351) { |
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359 context->regs[STAT0] |= BIT_ILSYNC; |
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360 } |
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361 context->sector_counter = 0; |
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07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
362 |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
363 //header/status regs no longer considered "valid" |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
364 context->regs[STAT3] |= BIT_VALST; |
2067
f22e04b69272
More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents:
2066
diff
changeset
|
365 //!DECI is set inactive at the same time as !VALST |
f22e04b69272
More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents:
2066
diff
changeset
|
366 context->regs[IFSTAT] |= BIT_DECI; |
2142
d9151d0894c7
Fix some CD-ROM emulation issues
Michael Pavone <pavone@retrodev.com>
parents:
2131
diff
changeset
|
367 //clear error detection status bits |
d9151d0894c7
Fix some CD-ROM emulation issues
Michael Pavone <pavone@retrodev.com>
parents:
2131
diff
changeset
|
368 context->regs[STAT0] &= ~(BIT_CRCOK|BIT_UCEBLK); |
d9151d0894c7
Fix some CD-ROM emulation issues
Michael Pavone <pavone@retrodev.com>
parents:
2131
diff
changeset
|
369 context->regs[STAT3] &= ~BIT_WLONG; |
2067
f22e04b69272
More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents:
2066
diff
changeset
|
370 if (context->ctrl0 & BIT_DECEN) { |
f22e04b69272
More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents:
2066
diff
changeset
|
371 if (context->ctrl0 & BIT_WRRQ) { |
2130
28b6453cf7e3
Emulate CDC sync detection and sync insertion rather than relying on external knowledge about sector offset
Michael Pavone <pavone@retrodev.com>
parents:
2122
diff
changeset
|
372 uint16_t block_start = current_write_addr + 1 - 2352; |
2067
f22e04b69272
More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents:
2066
diff
changeset
|
373 context->regs[PTL] = block_start; |
f22e04b69272
More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents:
2066
diff
changeset
|
374 context->regs[PTH] = block_start >> 8; |
f22e04b69272
More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents:
2066
diff
changeset
|
375 } |
2080 | 376 printf("Decoding block starting at %X (WRRQ: %d)\n", context->regs[PTL] | (context->regs[PTH] << 8), !!(context->ctrl0 & BIT_WRRQ)); |
2131
d90d92ce5cab
Improve CDC decode timing accuracy
Michael Pavone <pavone@retrodev.com>
parents:
2130
diff
changeset
|
377 //Based on measurements of a Wondermega M1 (LC8951) with SYDEN, SYIEN and DECEN only |
d90d92ce5cab
Improve CDC decode timing accuracy
Michael Pavone <pavone@retrodev.com>
parents:
2130
diff
changeset
|
378 context->decode_end = context->cycle + 22030 * context->clock_step; |
2062
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
379 } |
2130
28b6453cf7e3
Emulate CDC sync detection and sync insertion rather than relying on external knowledge about sector offset
Michael Pavone <pavone@retrodev.com>
parents:
2122
diff
changeset
|
380 } else { |
2142
d9151d0894c7
Fix some CD-ROM emulation issues
Michael Pavone <pavone@retrodev.com>
parents:
2131
diff
changeset
|
381 context->sector_counter++; |
d9151d0894c7
Fix some CD-ROM emulation issues
Michael Pavone <pavone@retrodev.com>
parents:
2131
diff
changeset
|
382 context->sector_counter &= 0xFFF; |
2130
28b6453cf7e3
Emulate CDC sync detection and sync insertion rather than relying on external knowledge about sector offset
Michael Pavone <pavone@retrodev.com>
parents:
2122
diff
changeset
|
383 if (sync_ignored) { |
28b6453cf7e3
Emulate CDC sync detection and sync insertion rather than relying on external knowledge about sector offset
Michael Pavone <pavone@retrodev.com>
parents:
2122
diff
changeset
|
384 context->regs[STAT0] |= BIT_SBLK; |
28b6453cf7e3
Emulate CDC sync detection and sync insertion rather than relying on external knowledge about sector offset
Michael Pavone <pavone@retrodev.com>
parents:
2122
diff
changeset
|
385 } |
28b6453cf7e3
Emulate CDC sync detection and sync insertion rather than relying on external knowledge about sector offset
Michael Pavone <pavone@retrodev.com>
parents:
2122
diff
changeset
|
386 if (context->sector_counter == 2352) { |
28b6453cf7e3
Emulate CDC sync detection and sync insertion rather than relying on external knowledge about sector offset
Michael Pavone <pavone@retrodev.com>
parents:
2122
diff
changeset
|
387 context->regs[STAT0] |= BIT_LBLK; |
28b6453cf7e3
Emulate CDC sync detection and sync insertion rather than relying on external knowledge about sector offset
Michael Pavone <pavone@retrodev.com>
parents:
2122
diff
changeset
|
388 } |
2062
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
389 } |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
390 if ((context->ctrl0 & (BIT_DECEN|BIT_WRRQ)) == (BIT_DECEN|BIT_WRRQ)) { |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
391 context->buffer[current_write_addr & (sizeof(context->buffer)-1)] = byte; |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
392 context->regs[WAL]++; |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
393 if (!context->regs[WAL]) { |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
394 context->regs[WAH]++; |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
395 } |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
396 } |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
397 } |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
398 |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
399 uint32_t lc8951_next_interrupt(lc8951 *context) |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
400 { |
2065
02a9846668d1
Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents:
2062
diff
changeset
|
401 if ((~context->regs[IFSTAT]) & context->ifctrl & (BIT_CMDI|BIT_DTEI|BIT_DECI)) { |
2062
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
402 //interrupt already pending |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
403 return context->cycle; |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
404 } |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
405 uint32_t deci_cycle = CYCLE_NEVER; |
2131
d90d92ce5cab
Improve CDC decode timing accuracy
Michael Pavone <pavone@retrodev.com>
parents:
2130
diff
changeset
|
406 if (context->ifctrl & BIT_DECIEN) { |
2062
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
407 deci_cycle = context->decode_end; |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
408 } |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
409 uint32_t dtei_cycle = CYCLE_NEVER; |
2131
d90d92ce5cab
Improve CDC decode timing accuracy
Michael Pavone <pavone@retrodev.com>
parents:
2130
diff
changeset
|
410 if (context->ifctrl & BIT_DTEIEN) { |
2062
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
411 dtei_cycle = context->transfer_end; |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
412 } |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
413 return deci_cycle < dtei_cycle ? deci_cycle : dtei_cycle; |
07ed42bd7b4c
Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents:
2058
diff
changeset
|
414 } |
2066
a61a8a87410c
Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents:
2065
diff
changeset
|
415 |
a61a8a87410c
Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents:
2065
diff
changeset
|
416 void lc8951_adjust_cycles(lc8951 *context, uint32_t deduction) |
a61a8a87410c
Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents:
2065
diff
changeset
|
417 { |
2073
c69e42444f96
Fix some cycle adjustment stuff and an off-by one on hte TOCT response
Michael Pavone <pavone@retrodev.com>
parents:
2067
diff
changeset
|
418 printf("CDC deduction of %u cycles @ %u, ", deduction, context->cycle); |
c69e42444f96
Fix some cycle adjustment stuff and an off-by one on hte TOCT response
Michael Pavone <pavone@retrodev.com>
parents:
2067
diff
changeset
|
419 context->cycle -= deduction; |
2066
a61a8a87410c
Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents:
2065
diff
changeset
|
420 if (context->decode_end != CYCLE_NEVER) { |
a61a8a87410c
Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents:
2065
diff
changeset
|
421 context->decode_end -= deduction; |
a61a8a87410c
Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents:
2065
diff
changeset
|
422 } |
a61a8a87410c
Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents:
2065
diff
changeset
|
423 if (context->transfer_end != CYCLE_NEVER) { |
a61a8a87410c
Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents:
2065
diff
changeset
|
424 context->transfer_end -= deduction; |
a61a8a87410c
Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents:
2065
diff
changeset
|
425 } |
2147
4cd60eecb0b1
Fix LC8951 cycle adjustment for data transfer next byte tracking
Michael Pavone <pavone@retrodev.com>
parents:
2144
diff
changeset
|
426 if (context->next_byte_cycle != CYCLE_NEVER) { |
4cd60eecb0b1
Fix LC8951 cycle adjustment for data transfer next byte tracking
Michael Pavone <pavone@retrodev.com>
parents:
2144
diff
changeset
|
427 context->next_byte_cycle -= deduction; |
4cd60eecb0b1
Fix LC8951 cycle adjustment for data transfer next byte tracking
Michael Pavone <pavone@retrodev.com>
parents:
2144
diff
changeset
|
428 } |
2073
c69e42444f96
Fix some cycle adjustment stuff and an off-by one on hte TOCT response
Michael Pavone <pavone@retrodev.com>
parents:
2067
diff
changeset
|
429 printf("cycle is now %u, decode_end %u, transfer_end %u\n", context->cycle, context->decode_end, context->transfer_end); |
2066
a61a8a87410c
Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents:
2065
diff
changeset
|
430 } |