Mercurial > repos > blastem

annotate blastem.c @ 193:c66e4636f991

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Implement support for self-modifying code
author Mike Pavone <pavone@retrodev.com>
date Tue, 15 Jan 2013 00:14:36 -0800
parents 02e25abe2dcd
children c615061f7914
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1 #include "68kinst.h"
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2 #include "m68k_to_x86.h"
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3 #include "mem.h"
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
4 #include "vdp.h"
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
5 #include "render.h"
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
6 #include "blastem.h"
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
7 #include <stdio.h>
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
8 #include <stdlib.h>
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
9 #include <string.h>
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
10
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
11 #define CARTRIDGE_WORDS 0x200000
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
12 #define RAM_WORDS 32 * 1024
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
13 #define Z80_RAM_BYTES 8 * 1024
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
14 #define MCLKS_PER_68K 7
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
15 //TODO: Figure out the exact value for this
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
16 #define MCLKS_PER_FRAME (MCLKS_LINE*262)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
17 #define CYCLE_NEVER 0xFFFFFFFF
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
18
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
19 uint16_t cart[CARTRIDGE_WORDS];
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
20 uint16_t ram[RAM_WORDS];
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
21 uint8_t z80_ram[Z80_RAM_BYTES];
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
22
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
23 io_port gamepad_1;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
24 io_port gamepad_2;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
25
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
26 #ifndef MIN
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
27 #define MIN(a,b) ((a) < (b) ? (a) : (b))
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
28 #endif
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
29
166
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
30 #define SMD_HEADER_SIZE 512
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
31 #define SMD_MAGIC1 0x03
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
32 #define SMD_MAGIC2 0xAA
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
33 #define SMD_MAGIC3 0xBB
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
34 #define SMD_BLOCK_SIZE 0x4000
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
35
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
36 int load_smd_rom(long filesize, FILE * f)
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
37 {
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
38 uint8_t block[SMD_BLOCK_SIZE];
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
39 filesize -= SMD_HEADER_SIZE;
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
40 fseek(f, SMD_HEADER_SIZE, SEEK_SET);
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
41
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
42 uint16_t * dst = cart;
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
43 while (filesize > 0) {
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
44 fread(block, 1, SMD_BLOCK_SIZE, f);
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
45 for (uint8_t *low = block, *high = (block+SMD_BLOCK_SIZE/2), *end = block+SMD_BLOCK_SIZE; high < end; high++, low++) {
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
46 *(dst++) = *high << 8 | *low;
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
47 }
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
48 filesize -= SMD_BLOCK_SIZE;
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
49 }
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
50 return 1;
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
51 }
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
52
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
53 int load_rom(char * filename)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
54 {
166
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
55 uint8_t header[10];
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
56 FILE * f = fopen(filename, "rb");
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
57 if (!f) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
58 return 0;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
59 }
166
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
60 fread(header, 1, sizeof(header), f);
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
61 fseek(f, 0, SEEK_END);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
62 long filesize = ftell(f);
158
a2ab895d9708 Fix predec address mode when used as source
Mike Pavone <pavone@retrodev.com>
parents: 153
diff changeset
63 if (filesize/2 > CARTRIDGE_WORDS) {
a2ab895d9708 Fix predec address mode when used as source
Mike Pavone <pavone@retrodev.com>
parents: 153
diff changeset
64 //carts bigger than 4MB not currently supported
a2ab895d9708 Fix predec address mode when used as source
Mike Pavone <pavone@retrodev.com>
parents: 153
diff changeset
65 filesize = CARTRIDGE_WORDS*2;
a2ab895d9708 Fix predec address mode when used as source
Mike Pavone <pavone@retrodev.com>
parents: 153
diff changeset
66 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
67 fseek(f, 0, SEEK_SET);
166
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
68 if (header[1] == SMD_MAGIC1 && header[8] == SMD_MAGIC2 && header[9] == SMD_MAGIC3) {
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
69 int i;
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
70 for (i = 3; i < 8; i++) {
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
71 if (header[i] != 0) {
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
72 break;
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
73 }
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
74 }
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
75 if (i == 8) {
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
76 if (header[2]) {
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
77 fprintf(stderr, "%s is a split SMD ROM which is not currently supported", filename);
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
78 exit(1);
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
79 }
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
80 return load_smd_rom(filesize, f);
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
81 }
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
82 }
97aa449706c2 Added SMD ROM support
Mike Pavone <pavone@retrodev.com>
parents: 158
diff changeset
83 fread(cart, 2, filesize/2, f);
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
84 fclose(f);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
85 for(unsigned short * cur = cart; cur - cart < (filesize/2); ++cur)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
86 {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
87 *cur = (*cur >> 8) | (*cur << 8);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
88 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
89 //TODO: Mirror ROM
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
90 return 1;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
91 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
92
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
93 uint16_t read_dma_value(uint32_t address)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
94 {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
95 //addresses here are word addresses (i.e. bit 0 corresponds to A1), so no need to do div by 2
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
96 if (address < 0x200000) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
97 return cart[address];
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
98 } else if(address >= 0x700000) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
99 return ram[address & 0x7FFF];
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
100 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
101 //TODO: Figure out what happens when you try to DMA from weird adresses like IO or banked Z80 area
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
102 return 0;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
103 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
104
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
105 #define VINT_CYCLE ((MCLKS_LINE * 226)/MCLKS_PER_68K)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
106
186
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
107 void adjust_int_cycle(m68k_context * context, vdp_context * v_context)
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
108 {
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
109 if (!(v_context->regs[REG_MODE_2] & 0x20 && ((context->status & 0x7) < 6)) || context->current_cycle >= VINT_CYCLE) {
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
110 context->int_cycle = CYCLE_NEVER;
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
111 context->target_cycle = context->sync_cycle;
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
112 } else if (context->int_cycle > VINT_CYCLE) {
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
113 context->int_cycle = VINT_CYCLE;
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
114 context->int_num = 6;
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
115 if (context->int_cycle < context->sync_cycle) {
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
116 context->target_cycle = context->int_cycle;
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
117 }
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
118 }
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
119 }
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
120
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
121 m68k_context * sync_components(m68k_context * context)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
122 {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
123 //TODO: Handle sync targets smaller than a single frame
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
124 vdp_context * v_context = context->next_context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
125 uint32_t mclks = context->current_cycle * MCLKS_PER_68K;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
126 if (mclks >= MCLKS_PER_FRAME) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
127 //printf("reached frame end | 68K Cycles: %d, MCLK Cycles: %d\n", context->current_cycle, mclks);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
128 vdp_run_context(v_context, MCLKS_PER_FRAME);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
129 wait_render_frame(v_context);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
130 mclks -= MCLKS_PER_FRAME;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
131 vdp_adjust_cycles(v_context, MCLKS_PER_FRAME);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
132 io_adjust_cycles(&gamepad_1, context->current_cycle, MCLKS_PER_FRAME/MCLKS_PER_68K);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
133 io_adjust_cycles(&gamepad_2, context->current_cycle, MCLKS_PER_FRAME/MCLKS_PER_68K);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
134 context->current_cycle -= MCLKS_PER_FRAME/MCLKS_PER_68K;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
135 if (mclks) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
136 vdp_run_context(v_context, mclks);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
137 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
138 } else {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
139 //printf("running VDP for %d cycles\n", mclks - v_context->cycles);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
140 vdp_run_context(v_context, mclks);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
141 }
186
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
142 adjust_int_cycle(context, v_context);
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
143 return context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
144 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
145
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
146 m68k_context * vdp_port_write(uint32_t vdp_port, m68k_context * context, uint16_t value)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
147 {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
148 //printf("vdp_port write: %X, value: %X, cycle: %d\n", vdp_port, value, context->current_cycle);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
149 sync_components(context);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
150 vdp_context * v_context = context->next_context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
151 if (vdp_port < 0x10) {
149
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
152 int blocked;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
153 if (vdp_port < 4) {
149
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
154 while (vdp_data_port_write(v_context, value) < 0) {
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
155 while(v_context->flags & FLAG_DMA_RUN) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
156 vdp_run_dma_done(v_context, MCLKS_PER_FRAME);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
157 if (v_context->cycles >= MCLKS_PER_FRAME) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
158 wait_render_frame(v_context);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
159 vdp_adjust_cycles(v_context, MCLKS_PER_FRAME);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
160 io_adjust_cycles(&gamepad_1, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
161 io_adjust_cycles(&gamepad_2, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
162 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
163 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
164 context->current_cycle = v_context->cycles / MCLKS_PER_68K;
149
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
165 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
166 } else if(vdp_port < 8) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
167 blocked = vdp_control_port_write(v_context, value);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
168 if (blocked) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
169 while (blocked) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
170 while(v_context->flags & FLAG_DMA_RUN) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
171 vdp_run_dma_done(v_context, MCLKS_PER_FRAME);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
172 if (v_context->cycles >= MCLKS_PER_FRAME) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
173 wait_render_frame(v_context);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
174 vdp_adjust_cycles(v_context, MCLKS_PER_FRAME);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
175 io_adjust_cycles(&gamepad_1, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
176 io_adjust_cycles(&gamepad_2, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
177 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
178 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
179 if (blocked < 0) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
180 blocked = vdp_control_port_write(v_context, value);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
181 } else {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
182 blocked = 0;
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
183 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
184 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
185 context->current_cycle = v_context->cycles / MCLKS_PER_68K;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
186 } else {
186
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
187 adjust_int_cycle(context, v_context);
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
188 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
189 } else {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
190 printf("Illegal write to HV Counter port %X\n", vdp_port);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
191 exit(1);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
192 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
193 context->current_cycle = v_context->cycles/MCLKS_PER_68K;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
194 } else if (vdp_port < 0x18) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
195 //TODO: Implement PSG
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
196 } else {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
197 //TODO: Implement undocumented test register(s)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
198 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
199 return context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
200 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
201
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
202 m68k_context * vdp_port_read(uint32_t vdp_port, m68k_context * context)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
203 {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
204 sync_components(context);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
205 vdp_context * v_context = context->next_context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
206 if (vdp_port < 0x10) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
207 if (vdp_port < 4) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
208 context->value = vdp_data_port_read(v_context);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
209 } else if(vdp_port < 8) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
210 context->value = vdp_control_port_read(v_context);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
211 } else {
137
0e7e1ccc0a81 Implemented HV counter
Mike Pavone <pavone@retrodev.com>
parents: 130
diff changeset
212 context->value = vdp_hv_counter_read(v_context);
0e7e1ccc0a81 Implemented HV counter
Mike Pavone <pavone@retrodev.com>
parents: 130
diff changeset
213 //printf("HV Counter: %X at cycle %d\n", context->value, v_context->cycles);
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
214 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
215 context->current_cycle = v_context->cycles/MCLKS_PER_68K;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
216 } else {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
217 printf("Illegal read from PSG or test register port %X\n", vdp_port);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
218 exit(1);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
219 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
220 return context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
221 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
222
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
223 #define TH 0x40
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
224 #define TH_TIMEOUT 8000
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
225 #define Z80_ACK_DELAY 3 //TODO: Calculate this on the fly based on how synced up the Z80 and 68K clocks are
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
226
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
227 uint8_t reset = 1;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
228 uint8_t busreq = 0;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
229 uint8_t busack = 0;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
230 uint32_t busack_cycle = CYCLE_NEVER;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
231 uint8_t new_busack = 0;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
232
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
233 void io_adjust_cycles(io_port * pad, uint32_t current_cycle, uint32_t deduction)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
234 {
89
9757b4c6c33f Minor joypad fix and commeount out some debug printfs
Mike Pavone <pavone@retrodev.com>
parents: 88
diff changeset
235 /*uint8_t control = pad->control | 0x80;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
236 uint8_t th = control & pad->output;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
237 if (pad->input[GAMEPAD_TH0] || pad->input[GAMEPAD_TH1]) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
238 printf("adjust_cycles | control: %X, TH: %X, GAMEPAD_TH0: %X, GAMEPAD_TH1: %X, TH Counter: %d, Timeout: %d, Cycle: %d\n", control, th, pad->input[GAMEPAD_TH0], pad->input[GAMEPAD_TH1], pad->th_counter,pad->timeout_cycle, current_cycle);
89
9757b4c6c33f Minor joypad fix and commeount out some debug printfs
Mike Pavone <pavone@retrodev.com>
parents: 88
diff changeset
239 }*/
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
240 if (current_cycle >= pad->timeout_cycle) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
241 pad->th_counter = 0;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
242 } else {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
243 pad->timeout_cycle -= deduction;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
244 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
245 if (busack_cycle < CYCLE_NEVER && current_cycle < busack_cycle) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
246 busack_cycle -= deduction;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
247 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
248 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
249
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
250 void io_data_write(io_port * pad, m68k_context * context, uint8_t value)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
251 {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
252 if (pad->control & TH) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
253 //check if TH has changed
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
254 if ((pad->output & TH) ^ (value & TH)) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
255 if (context->current_cycle >= pad->timeout_cycle) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
256 pad->th_counter = 0;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
257 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
258 if (!(value & TH)) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
259 pad->th_counter++;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
260 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
261 pad->timeout_cycle = context->current_cycle + TH_TIMEOUT;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
262 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
263 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
264 pad->output = value;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
265 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
266
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
267 void io_data_read(io_port * pad, m68k_context * context)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
268 {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
269 uint8_t control = pad->control | 0x80;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
270 uint8_t th = control & pad->output;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
271 uint8_t input;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
272 if (context->current_cycle >= pad->timeout_cycle) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
273 pad->th_counter = 0;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
274 }
89
9757b4c6c33f Minor joypad fix and commeount out some debug printfs
Mike Pavone <pavone@retrodev.com>
parents: 88
diff changeset
275 /*if (pad->input[GAMEPAD_TH0] || pad->input[GAMEPAD_TH1]) {
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
276 printf("io_data_read | control: %X, TH: %X, GAMEPAD_TH0: %X, GAMEPAD_TH1: %X, TH Counter: %d, Timeout: %d, Cycle: %d\n", control, th, pad->input[GAMEPAD_TH0], pad->input[GAMEPAD_TH1], pad->th_counter,pad->timeout_cycle, context->current_cycle);
89
9757b4c6c33f Minor joypad fix and commeount out some debug printfs
Mike Pavone <pavone@retrodev.com>
parents: 88
diff changeset
277 }*/
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
278 if (th) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
279 if (pad->th_counter == 2) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
280 input = pad->input[GAMEPAD_EXTRA];
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
281 } else {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
282 input = pad->input[GAMEPAD_TH1];
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
283 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
284 } else {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
285 if (pad->th_counter == 2) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
286 input = pad->input[GAMEPAD_TH0] | 0xF;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
287 } else if(pad->th_counter == 3) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
288 input = pad->input[GAMEPAD_TH0] & 0x30;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
289 } else {
89
9757b4c6c33f Minor joypad fix and commeount out some debug printfs
Mike Pavone <pavone@retrodev.com>
parents: 88
diff changeset
290 input = pad->input[GAMEPAD_TH0] | 0xC;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
291 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
292 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
293 context->value = ((~input) & (~control)) | (pad->output & control);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
294 /*if (pad->input[GAMEPAD_TH0] || pad->input[GAMEPAD_TH1]) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
295 printf ("value: %X\n", context->value);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
296 }*/
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
297 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
298
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
299 m68k_context * io_write(uint32_t location, m68k_context * context, uint8_t value)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
300 {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
301 if (location < 0x10000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
302 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
303 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
304 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
305 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
306 if (!(busack || reset)) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
307 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
308 if (location < 0x4000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
309 z80_ram[location & 0x1FFF] = value;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
310 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
311 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
312 } else {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
313 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
314 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
315 switch(location/2)
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
316 {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
317 case 0x1:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
318 io_data_write(&gamepad_1, context, value);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
319 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
320 case 0x2:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
321 io_data_write(&gamepad_2, context, value);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
322 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
323 case 0x3://PORT C Data
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
324 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
325 case 0x4:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
326 gamepad_1.control = value;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
327 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
328 case 0x5:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
329 gamepad_2.control = value;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
330 break;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
331 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
332 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
333 if (location == 0x1100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
334 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
335 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
336 busack_cycle = CYCLE_NEVER;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
337 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
338 if (value & 1) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
339 busreq = 1;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
340 if(!reset) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
341 busack_cycle = context->current_cycle + Z80_ACK_DELAY;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
342 new_busack = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
343 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
344 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
345 busreq = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
346 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
347 busack = 1;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
348 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
349 } else if (location == 0x1200) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
350 if (value & 1) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
351 if (reset && busreq) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
352 new_busack = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
353 busack_cycle = context->current_cycle + Z80_ACK_DELAY;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
354 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
355 reset = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
356 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
357 reset = 1;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
358 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
359 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
360 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
361 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
362 return context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
363 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
364
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
365 m68k_context * io_write_w(uint32_t location, m68k_context * context, uint16_t value)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
366 {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
367 if (location < 0x10000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
368 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
369 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
370 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
371 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
372 if (!(busack || reset)) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
373 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
374 if (location < 0x4000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
375 z80_ram[location & 0x1FFE] = value >> 8;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
376 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
377 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
378 } else {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
379 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
380 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
381 switch(location/2)
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
382 {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
383 case 0x1:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
384 io_data_write(&gamepad_1, context, value);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
385 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
386 case 0x2:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
387 io_data_write(&gamepad_2, context, value);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
388 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
389 case 0x3://PORT C Data
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
390 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
391 case 0x4:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
392 gamepad_1.control = value;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
393 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
394 case 0x5:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
395 gamepad_2.control = value;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
396 break;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
397 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
398 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
399 //printf("IO Write of %X to %X @ %d\n", value, location, context->current_cycle);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
400 if (location == 0x1100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
401 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
402 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
403 busack_cycle = CYCLE_NEVER;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
404 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
405 if (value & 0x100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
406 busreq = 1;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
407 if(!reset) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
408 busack_cycle = context->current_cycle + Z80_ACK_DELAY;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
409 new_busack = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
410 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
411 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
412 busreq = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
413 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
414 busack = 1;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
415 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
416 } else if (location == 0x1200) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
417 if (value & 0x100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
418 if (reset && busreq) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
419 new_busack = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
420 busack_cycle = context->current_cycle + Z80_ACK_DELAY;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
421 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
422 reset = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
423 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
424 reset = 1;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
425 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
426 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
427 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
428 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
429 return context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
430 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
431
130
0bdbffa9fe90 Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents: 115
diff changeset
432 #define USA 0x80
0bdbffa9fe90 Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents: 115
diff changeset
433 #define JAP 0x00
0bdbffa9fe90 Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents: 115
diff changeset
434 #define EUR 0xC0
0bdbffa9fe90 Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents: 115
diff changeset
435 #define NO_DISK 0x20
0bdbffa9fe90 Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents: 115
diff changeset
436 uint8_t version_reg = NO_DISK | USA;
0bdbffa9fe90 Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents: 115
diff changeset
437
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
438 m68k_context * io_read(uint32_t location, m68k_context * context)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
439 {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
440 if (location < 0x10000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
441 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
442 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
443 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
444 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
445 if (!(busack || reset)) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
446 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
447 if (location < 0x4000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
448 context->value = z80_ram[location & 0x1FFF];
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
449 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
450 context->value = 0xFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
451 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
452 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
453 context->value = 0xFF;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
454 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
455 } else {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
456 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
457 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
458 switch(location/2)
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
459 {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
460 case 0x0:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
461 //version bits should be 0 for now since we're not emulating TMSS
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
462 //Not sure about the other bits
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
463 context->value = version_reg;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
464 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
465 case 0x1:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
466 io_data_read(&gamepad_1, context);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
467 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
468 case 0x2:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
469 io_data_read(&gamepad_2, context);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
470 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
471 case 0x3://PORT C Data
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
472 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
473 case 0x4:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
474 context->value = gamepad_1.control;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
475 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
476 case 0x5:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
477 context->value = gamepad_2.control;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
478 break;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
479 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
480 } else {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
481 if (location == 0x1100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
482 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
483 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
484 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
485 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
486 context->value = reset || busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
487 //printf("Byte read of BUSREQ returned %d @ %d (reset: %d, busack: %d)\n", context->value, context->current_cycle, reset, busack);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
488 } else if (location == 0x1200) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
489 context->value = !reset;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
490 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
491 printf("Byte read of unknown IO location: %X\n", location);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
492 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
493 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
494 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
495 return context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
496 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
497
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
498 m68k_context * io_read_w(uint32_t location, m68k_context * context)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
499 {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
500 if (location < 0x10000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
501 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
502 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
503 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
504 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
505 if (!(busack || reset)) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
506 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
507 if (location < 0x4000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
508 context->value = z80_ram[location & 0x1FFE];
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
509 context->value |= context->value << 8;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
510 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
511 context->value = 0xFFFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
512 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
513 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
514 context->value = 0xFFFF;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
515 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
516 } else {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
517 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
518 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
519 switch(location/2)
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
520 {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
521 case 0x0:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
522 //version bits should be 0 for now since we're not emulating TMSS
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
523 //Not sure about the other bits
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
524 context->value = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
525 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
526 case 0x1:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
527 io_data_read(&gamepad_1, context);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
528 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
529 case 0x2:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
530 io_data_read(&gamepad_2, context);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
531 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
532 case 0x3://PORT C Data
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
533 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
534 case 0x4:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
535 context->value = gamepad_1.control;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
536 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
537 case 0x5:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
538 context->value = gamepad_2.control;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
539 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
540 case 0x6:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
541 //PORT C Control
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
542 context->value = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
543 break;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
544 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
545 context->value = context->value | (context->value << 8);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
546 //printf("Word read to %X returned %d\n", location, context->value);
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
547 } else {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
548 if (location == 0x1100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
549 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
550 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
551 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
552 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
553 context->value = (reset || busack) << 8;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
554 //printf("Word read of BUSREQ returned %d\n", context->value);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
555 } else if (location == 0x1200) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
556 context->value = (!reset) << 8;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
557 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
558 printf("Word read of unknown IO location: %X\n", location);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
559 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
560 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
561 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
562 return context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
563 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
564
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
565 typedef struct bp_def {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
566 struct bp_def * next;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
567 uint32_t address;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
568 uint32_t index;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
569 } bp_def;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
570
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
571 bp_def * breakpoints = NULL;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
572 uint32_t bp_index = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
573
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
574 bp_def ** find_breakpoint(bp_def ** cur, uint32_t address)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
575 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
576 while (*cur) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
577 if ((*cur)->address == address) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
578 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
579 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
580 cur = &((*cur)->next);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
581 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
582 return cur;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
583 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
584
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
585 bp_def ** find_breakpoint_idx(bp_def ** cur, uint32_t index)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
586 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
587 while (*cur) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
588 if ((*cur)->index == index) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
589 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
590 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
591 cur = &((*cur)->next);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
592 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
593 return cur;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
594 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
595
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
596 char * find_param(char * buf)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
597 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
598 for (; *buf; buf++) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
599 if (*buf == ' ') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
600 if (*(buf+1)) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
601 return buf+1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
602 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
603 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
604 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
605 return NULL;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
606 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
607
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
608 void strip_nl(char * buf)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
609 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
610 for(; *buf; buf++) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
611 if (*buf == '\n') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
612 *buf = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
613 return;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
614 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
615 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
616 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
617
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
618 m68k_context * debugger(m68k_context * context, uint32_t address)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
619 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
620 static char last_cmd[1024];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
621 char input_buf[1024];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
622 static uint32_t branch_t;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
623 static uint32_t branch_f;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
624 m68kinst inst;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
625 //probably not necessary, but let's play it safe
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
626 address &= 0xFFFFFF;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
627 if (address == branch_t) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
628 bp_def ** f_bp = find_breakpoint(&breakpoints, branch_f);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
629 if (!*f_bp) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
630 remove_breakpoint(context, branch_f);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
631 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
632 branch_t = branch_f = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
633 } else if(address == branch_f) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
634 bp_def ** t_bp = find_breakpoint(&breakpoints, branch_t);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
635 if (!*t_bp) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
636 remove_breakpoint(context, branch_t);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
637 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
638 branch_t = branch_f = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
639 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
640 //Check if this is a user set breakpoint, or just a temporary one
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
641 bp_def ** this_bp = find_breakpoint(&breakpoints, address);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
642 if (*this_bp) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
643 printf("Breakpoint %d hit\n", (*this_bp)->index);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
644 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
645 remove_breakpoint(context, address);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
646 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
647 uint16_t * pc;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
648 if (address < 0x400000) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
649 pc = cart + address/2;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
650 } else if(address > 0xE00000) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
651 pc = ram + (address & 0xFFFF)/2;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
652 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
653 fprintf(stderr, "Entered debugger at address %X\n", address);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
654 exit(1);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
655 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
656 uint16_t * after_pc = m68k_decode(pc, &inst, address);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
657 m68k_disasm(&inst, input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
658 printf("%X: %s\n", address, input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
659 uint32_t after = address + (after_pc-pc)*2;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
660 int debugging = 1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
661 while (debugging) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
662 fputs(">", stdout);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
663 if (!fgets(input_buf, sizeof(input_buf), stdin)) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
664 fputs("fgets failed", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
665 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
666 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
667 strip_nl(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
668 //hitting enter repeats last command
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
669 if (input_buf[0]) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
670 strcpy(last_cmd, input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
671 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
672 strcpy(input_buf, last_cmd);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
673 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
674 char * param;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
675 char format[8];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
676 uint32_t value;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
677 bp_def * new_bp;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
678 switch(input_buf[0])
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
679 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
680 case 'c':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
681 puts("Continuing");
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
682 debugging = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
683 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
684 case 'b':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
685 param = find_param(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
686 if (!param) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
687 fputs("b command requires a parameter\n", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
688 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
689 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
690 value = strtol(param, NULL, 16);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
691 insert_breakpoint(context, value, (uint8_t *)debugger);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
692 new_bp = malloc(sizeof(bp_def));
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
693 new_bp->next = breakpoints;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
694 new_bp->address = value;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
695 new_bp->index = bp_index++;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
696 breakpoints = new_bp;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
697 printf("Breakpoint %d set at %X\n", new_bp->index, value);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
698 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
699 case 'a':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
700 param = find_param(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
701 if (!param) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
702 fputs("a command requires a parameter\n", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
703 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
704 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
705 value = strtol(param, NULL, 16);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
706 insert_breakpoint(context, value, (uint8_t *)debugger);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
707 debugging = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
708 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
709 case 'd':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
710 param = find_param(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
711 if (!param) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
712 fputs("b command requires a parameter\n", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
713 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
714 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
715 value = atoi(param);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
716 this_bp = find_breakpoint_idx(&breakpoints, value);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
717 if (!*this_bp) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
718 fprintf(stderr, "Breakpoint %d does not exist\n", value);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
719 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
720 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
721 new_bp = *this_bp;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
722 *this_bp = (*this_bp)->next;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
723 free(new_bp);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
724 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
725 case 'p':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
726 strcpy(format, "%s: %d\n");
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
727 if (input_buf[1] == '/') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
728 switch (input_buf[2])
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
729 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
730 case 'x':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
731 case 'X':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
732 case 'd':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
733 case 'c':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
734 format[5] = input_buf[2];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
735 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
736 default:
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
737 fprintf(stderr, "Unrecognized format character: %c\n", input_buf[2]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
738 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
739 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
740 param = find_param(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
741 if (!param) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
742 fputs("p command requires a parameter\n", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
743 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
744 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
745 if (param[0] == 'd' && param[1] >= '0' && param[1] <= '7') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
746 value = context->dregs[param[1]-'0'];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
747 } else if (param[0] == 'a' && param[1] >= '0' && param[1] <= '7') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
748 value = context->aregs[param[1]-'0'];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
749 } else if (param[0] == 'S' && param[1] == 'R') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
750 value = (context->status << 8);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
751 for (int flag = 0; flag < 5; flag++) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
752 value |= context->flags[flag] << (4-flag);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
753 }
185
b204fbed4efe Add ability to print out current 68K cycle in debugger
Mike Pavone <pavone@retrodev.com>
parents: 184
diff changeset
754 } else if(param[0] == 'c') {
b204fbed4efe Add ability to print out current 68K cycle in debugger
Mike Pavone <pavone@retrodev.com>
parents: 184
diff changeset
755 value = context->current_cycle;
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
756 } else if (param[0] == '0' && param[1] == 'x') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
757 uint32_t p_addr = strtol(param+2, NULL, 16);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
758 value = read_dma_value(p_addr/2);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
759 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
760 fprintf(stderr, "Unrecognized parameter to p: %s\n", param);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
761 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
762 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
763 printf(format, param, value);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
764 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
765 case 'n':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
766 //TODO: Deal with jmp, dbcc, rtr and rte
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
767 if (inst.op == M68K_RTS) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
768 after = (read_dma_value(context->aregs[7]/2) << 16) | read_dma_value(context->aregs[7]/2 + 1);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
769 } else if(inst.op == M68K_BCC && inst.extra.cond != COND_FALSE) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
770 if (inst.extra.cond = COND_TRUE) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
771 after = inst.address + 2 + inst.src.params.immed;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
772 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
773 branch_f = after;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
774 branch_t = inst.address + 2 + inst.src.params.immed;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
775 insert_breakpoint(context, branch_t, (uint8_t *)debugger);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
776 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
777 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
778 insert_breakpoint(context, after, (uint8_t *)debugger);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
779 debugging = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
780 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
781 case 'q':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
782 puts("Quitting");
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
783 exit(0);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
784 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
785 default:
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
786 fprintf(stderr, "Unrecognized debugger command %s\n", input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
787 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
788 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
789 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
790 return context;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
791 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
792
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
793 int main(int argc, char ** argv)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
794 {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
795 if (argc < 2) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
796 fputs("Usage: blastem FILENAME\n", stderr);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
797 return 1;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
798 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
799 if(!load_rom(argv[1])) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
800 fprintf(stderr, "Failed to open %s for reading\n", argv[1]);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
801 return 1;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
802 }
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
803 int width = -1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
804 int height = -1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
805 int debug = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
806 for (int i = 2; i < argc; i++) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
807 if (argv[i][0] == '-') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
808 switch(argv[i][1]) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
809 case 'd':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
810 debug = 1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
811 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
812 default:
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
813 fprintf(stderr, "Unrecognized switch %s\n", argv[i]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
814 return 1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
815 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
816 } else if (width < 0) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
817 width = atoi(argv[i]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
818 } else if (height < 0) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
819 height = atoi(argv[i]);
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
820 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
821 }
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
822 width = width < 320 ? 320 : width;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
823 height = height < 240 ? (width/320) * 240 : height;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
824 render_init(width, height);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
825
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
826 x86_68k_options opts;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
827 m68k_context context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
828 vdp_context v_context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
829
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
830 init_x86_68k_opts(&opts);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
831 init_68k_context(&context, opts.native_code_map, &opts);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
832 init_vdp_context(&v_context);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
833 context.next_context = &v_context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
834 //cartridge ROM
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
835 context.mem_pointers[0] = cart;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
836 context.target_cycle = context.sync_cycle = MCLKS_PER_FRAME/MCLKS_PER_68K;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
837 //work RAM
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
838 context.mem_pointers[1] = ram;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
839 uint32_t address;
103
a71544cd01ea Don't pre-emptively translate code at interrupt vectors as some PD ROMs have these pointing at junk. Need some kind of heuristic for detecting garbage if I'm going to translate them ahead of time by default.
Mike Pavone <pavone@retrodev.com>
parents: 95
diff changeset
840 /*address = cart[0x68/2] << 16 | cart[0x6A/2];
95
dd3c680c618c Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents: 89
diff changeset
841 translate_m68k_stream(address, &context);
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
842 address = cart[0x70/2] << 16 | cart[0x72/2];
95
dd3c680c618c Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents: 89
diff changeset
843 translate_m68k_stream(address, &context);
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
844 address = cart[0x78/2] << 16 | cart[0x7A/2];
103
a71544cd01ea Don't pre-emptively translate code at interrupt vectors as some PD ROMs have these pointing at junk. Need some kind of heuristic for detecting garbage if I'm going to translate them ahead of time by default.
Mike Pavone <pavone@retrodev.com>
parents: 95
diff changeset
845 translate_m68k_stream(address, &context);*/
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
846 address = cart[2] << 16 | cart[3];
95
dd3c680c618c Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents: 89
diff changeset
847 translate_m68k_stream(address, &context);
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
848 if (debug) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
849 insert_breakpoint(&context, address, (uint8_t *)debugger);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
850 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
851 m68k_reset(&context);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
852 return 0;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
853 }