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Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
author Michael Pavone <pavone@retrodev.com>
date Fri, 26 Dec 2014 15:45:31 -0800
parents 68f86ca4bb32
children 39d7d463ed5b
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
567
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1 #include "backend.h"
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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2 #include "gen_x86.h"
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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3
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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4 void cycles(cpu_options *opts, uint32_t num)
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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5 {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
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6 add_ir(&opts->code, num, opts->cycles, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
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7 }
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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8
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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9 void check_cycles_int(cpu_options *opts, uint32_t address)
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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10 {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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11 code_info *code = &opts->code;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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12 cmp_rr(code, opts->cycles, opts->limit, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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13 code_ptr jmp_off = code->cur+1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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14 jcc(code, CC_NC, jmp_off+1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
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15 mov_ir(code, address, opts->scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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16 call(code, opts->handle_cycle_limit_int);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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17 *jmp_off = code->cur - (jmp_off+1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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18 }
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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19
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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20 void check_cycles(cpu_options * opts)
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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parents:
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21 {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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22 code_info *code = &opts->code;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
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23 cmp_rr(code, opts->cycles, opts->limit, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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24 check_alloc_code(code, MAX_INST_LEN*2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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25 code_ptr jmp_off = code->cur+1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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26 jcc(code, CC_NC, jmp_off+1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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27 call(code, opts->handle_cycle_limit);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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28 *jmp_off = code->cur - (jmp_off+1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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29 }
589
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30
601
f0061e3d2ad9 Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
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31 void check_code_prologue(code_info *code)
f0061e3d2ad9 Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
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32 {
f0061e3d2ad9 Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
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33 check_alloc_code(code, MAX_INST_LEN*4);
f0061e3d2ad9 Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
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34 }
f0061e3d2ad9 Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
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35
593
5ef3fe516da9 Z80 core is sort of working again
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36 code_ptr gen_mem_fun(cpu_options * opts, memmap_chunk const * memmap, uint32_t num_chunks, ftype fun_type, code_ptr *after_inc)
589
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37 {
2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
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38 code_info *code = &opts->code;
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39 code_ptr start = code->cur;
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40 check_cycles(opts);
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41 cycles(opts, opts->bus_cycles);
590
ea80559c67cb WIP effort to update z80 core for code gen changes
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42 if (after_inc) {
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43 *after_inc = code->cur;
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44 }
589
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45 if (opts->address_size == SZ_D && opts->address_mask < 0xFFFFFFFF) {
2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
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46 and_ir(code, opts->address_mask, opts->scratch1, SZ_D);
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47 }
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48 code_ptr lb_jcc = NULL, ub_jcc = NULL;
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49 uint8_t is_write = fun_type == WRITE_16 || fun_type == WRITE_8;
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50 uint8_t adr_reg = is_write ? opts->scratch2 : opts->scratch1;
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51 uint16_t access_flag = is_write ? MMAP_WRITE : MMAP_READ;
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52 uint8_t size = (fun_type == READ_16 || fun_type == WRITE_16) ? SZ_W : SZ_B;
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53 for (uint32_t chunk = 0; chunk < num_chunks; chunk++)
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54 {
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55 if (memmap[chunk].start > 0) {
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56 cmp_ir(code, memmap[chunk].start, adr_reg, opts->address_size);
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57 lb_jcc = code->cur + 1;
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58 jcc(code, CC_C, code->cur + 2);
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59 }
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60 if (memmap[chunk].end < opts->max_address) {
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61 cmp_ir(code, memmap[chunk].end, adr_reg, opts->address_size);
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62 ub_jcc = code->cur + 1;
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63 jcc(code, CC_NC, code->cur + 2);
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64 }
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65
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66 if (memmap[chunk].mask != opts->address_mask) {
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67 and_ir(code, memmap[chunk].mask, adr_reg, opts->address_size);
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68 }
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69 void * cfun;
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70 switch (fun_type)
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71 {
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72 case READ_16:
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73 cfun = memmap[chunk].read_16;
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74 break;
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75 case READ_8:
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76 cfun = memmap[chunk].read_8;
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77 break;
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78 case WRITE_16:
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79 cfun = memmap[chunk].write_16;
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80 break;
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81 case WRITE_8:
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82 cfun = memmap[chunk].write_8;
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83 break;
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84 default:
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85 cfun = NULL;
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86 }
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87 if(memmap[chunk].buffer && memmap[chunk].flags & access_flag) {
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88 if (memmap[chunk].flags & MMAP_PTR_IDX) {
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diff changeset
89 if (memmap[chunk].flags & MMAP_FUNC_NULL) {
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diff changeset
90 cmp_irdisp(code, 0, opts->context_reg, opts->mem_ptr_off + sizeof(void*) * memmap[chunk].ptr_index, SZ_PTR);
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91 code_ptr not_null = code->cur + 1;
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92 jcc(code, CC_NZ, code->cur + 2);
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93 call(code, opts->save_context);
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94 #ifdef X86_64
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95 if (is_write) {
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diff changeset
96 if (opts->scratch2 != RDI) {
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97 mov_rr(code, opts->scratch2, RDI, opts->address_size);
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98 }
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99 mov_rr(code, opts->scratch1, RDX, size);
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100 } else {
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diff changeset
101 push_r(code, opts->context_reg);
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102 mov_rr(code, opts->scratch1, RDI, opts->address_size);
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103 }
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104 test_ir(code, 8, RSP, opts->address_size);
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105 code_ptr adjust_rsp = code->cur + 1;
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106 jcc(code, CC_NZ, code->cur + 2);
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107 call(code, cfun);
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108 code_ptr no_adjust = code->cur + 1;
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109 jmp(code, code->cur + 2);
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110 *adjust_rsp = code->cur - (adjust_rsp + 1);
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diff changeset
111 sub_ir(code, 8, RSP, SZ_PTR);
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diff changeset
112 call(code, cfun);
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113 add_ir(code, 8, RSP, SZ_PTR);
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114 *no_adjust = code->cur - (no_adjust + 1);
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115 #else
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116 if (is_write) {
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117 push_r(code, opts->scratch1);
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118 } else {
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119 push_r(code, opts->context_reg);//save opts->context_reg for later
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120 }
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121 push_r(code, opts->context_reg);
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122 push_r(code, is_write ? opts->scratch2 : opts->scratch1);
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123 call(code, cfun);
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124 add_ir(code, is_write ? 12 : 8, RSP, opts->address_size);
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diff changeset
125 #endif
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126 if (is_write) {
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127 mov_rr(code, RAX, opts->context_reg, SZ_PTR);
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128 } else {
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129 pop_r(code, opts->context_reg);
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130 mov_rr(code, RAX, opts->scratch1, size);
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131 }
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132 jmp(code, opts->load_context);
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133
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134 *not_null = code->cur - (not_null + 1);
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135 }
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diff changeset
136 if (opts->byte_swap && size == SZ_B) {
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137 xor_ir(code, 1, adr_reg, opts->address_size);
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138 }
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139 if (opts->address_size != SZ_D) {
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140 movzx_rr(code, adr_reg, adr_reg, opts->address_size, SZ_D);
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141 }
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142 add_rdispr(code, opts->context_reg, opts->mem_ptr_off + sizeof(void*) * memmap[chunk].ptr_index, adr_reg, SZ_PTR);
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143 if (is_write) {
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144 mov_rrind(code, opts->scratch1, opts->scratch2, size);
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145
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146 } else {
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diff changeset
147 mov_rindr(code, opts->scratch1, opts->scratch1, size);
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148 }
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149 } else {
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diff changeset
150 uint8_t tmp_size = size;
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diff changeset
151 if (size == SZ_B) {
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152 if ((memmap[chunk].flags & MMAP_ONLY_ODD) || (memmap[chunk].flags & MMAP_ONLY_EVEN)) {
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diff changeset
153 bt_ir(code, 0, adr_reg, opts->address_size);
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diff changeset
154 code_ptr good_addr = code->cur + 1;
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diff changeset
155 jcc(code, (memmap[chunk].flags & MMAP_ONLY_ODD) ? CC_C : CC_NC, code->cur + 2);
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diff changeset
156 if (!is_write) {
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diff changeset
157 mov_ir(code, 0xFF, opts->scratch1, SZ_B);
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158 }
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diff changeset
159 retn(code);
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diff changeset
160 *good_addr = code->cur - (good_addr + 1);
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diff changeset
161 shr_ir(code, 1, adr_reg, opts->address_size);
595
68f86ca4bb32 Add a couple of missing checks for the byte_swap and address_size parameters in gen_mem_fun
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diff changeset
162 } else if (opts->byte_swap) {
589
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diff changeset
163 xor_ir(code, 1, adr_reg, opts->address_size);
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164 }
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diff changeset
165 } else if ((memmap[chunk].flags & MMAP_ONLY_ODD) || (memmap[chunk].flags & MMAP_ONLY_EVEN)) {
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diff changeset
166 tmp_size = SZ_B;
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diff changeset
167 shr_ir(code, 1, adr_reg, opts->address_size);
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diff changeset
168 if ((memmap[chunk].flags & MMAP_ONLY_EVEN) && is_write) {
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diff changeset
169 shr_ir(code, 8, opts->scratch1, SZ_W);
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170 }
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171 }
595
68f86ca4bb32 Add a couple of missing checks for the byte_swap and address_size parameters in gen_mem_fun
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diff changeset
172 if (opts->address_size != SZ_D) {
68f86ca4bb32 Add a couple of missing checks for the byte_swap and address_size parameters in gen_mem_fun
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diff changeset
173 movzx_rr(code, adr_reg, adr_reg, opts->address_size, SZ_D);
68f86ca4bb32 Add a couple of missing checks for the byte_swap and address_size parameters in gen_mem_fun
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diff changeset
174 }
589
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diff changeset
175 if ((intptr_t)memmap[chunk].buffer <= 0x7FFFFFFF && (intptr_t)memmap[chunk].buffer >= -2147483648) {
2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
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diff changeset
176 if (is_write) {
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diff changeset
177 mov_rrdisp(code, opts->scratch1, opts->scratch2, (intptr_t)memmap[chunk].buffer, tmp_size);
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diff changeset
178 } else {
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diff changeset
179 mov_rdispr(code, opts->scratch1, (intptr_t)memmap[chunk].buffer, opts->scratch1, tmp_size);
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180 }
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diff changeset
181 } else {
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diff changeset
182 if (is_write) {
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diff changeset
183 push_r(code, opts->scratch1);
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184 mov_ir(code, (intptr_t)memmap[chunk].buffer, opts->scratch1, SZ_PTR);
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diff changeset
185 add_rr(code, opts->scratch1, opts->scratch2, SZ_PTR);
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diff changeset
186 pop_r(code, opts->scratch1);
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187 mov_rrind(code, opts->scratch1, opts->scratch2, tmp_size);
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188 } else {
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diff changeset
189 mov_ir(code, (intptr_t)memmap[chunk].buffer, opts->scratch2, SZ_PTR);
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diff changeset
190 mov_rindexr(code, opts->scratch2, opts->scratch1, 1, opts->scratch1, tmp_size);
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191 }
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192 }
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diff changeset
193 if (size != tmp_size && !is_write) {
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diff changeset
194 if (memmap[chunk].flags & MMAP_ONLY_EVEN) {
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diff changeset
195 shl_ir(code, 8, opts->scratch1, SZ_W);
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diff changeset
196 mov_ir(code, 0xFF, opts->scratch1, SZ_B);
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diff changeset
197 } else {
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diff changeset
198 or_ir(code, 0xFF00, opts->scratch1, SZ_W);
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199 }
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200 }
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201 }
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diff changeset
202 if (is_write && (memmap[chunk].flags & MMAP_CODE)) {
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203 //TODO: Fixme for Z80
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diff changeset
204 mov_rr(code, opts->scratch2, opts->scratch1, opts->address_size);
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diff changeset
205 shr_ir(code, 11, opts->scratch1, opts->address_size);
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diff changeset
206 bt_rrdisp(code, opts->scratch1, opts->context_reg, opts->ram_flags_off, opts->address_size);
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diff changeset
207 code_ptr not_code = code->cur + 1;
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208 jcc(code, CC_NC, code->cur + 2);
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diff changeset
209 call(code, opts->save_context);
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diff changeset
210 #ifdef X86_32
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211 push_r(code, opts->context_reg);
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212 push_r(code, opts->scratch2);
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diff changeset
213 #endif
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diff changeset
214 call(code, opts->handle_code_write);
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diff changeset
215 #ifdef X86_32
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diff changeset
216 add_ir(code, 8, RSP, SZ_D);
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diff changeset
217 #endif
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diff changeset
218 mov_rr(code, RAX, opts->context_reg, SZ_PTR);
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diff changeset
219 call(code, opts->load_context);
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220 *not_code = code->cur - (not_code+1);
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221 }
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222 retn(code);
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223 } else if (cfun) {
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diff changeset
224 call(code, opts->save_context);
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225 #ifdef X86_64
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226 if (is_write) {
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227 if (opts->scratch2 != RDI) {
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228 mov_rr(code, opts->scratch2, RDI, opts->address_size);
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229 }
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diff changeset
230 mov_rr(code, opts->scratch1, RDX, size);
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231 } else {
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diff changeset
232 push_r(code, opts->context_reg);
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233 mov_rr(code, opts->scratch1, RDI, opts->address_size);
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234 }
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235 test_ir(code, 8, RSP, SZ_D);
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236 code_ptr adjust_rsp = code->cur + 1;
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diff changeset
237 jcc(code, CC_NZ, code->cur + 2);
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diff changeset
238 call(code, cfun);
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diff changeset
239 code_ptr no_adjust = code->cur + 1;
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240 jmp(code, code->cur + 2);
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diff changeset
241 *adjust_rsp = code->cur - (adjust_rsp + 1);
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diff changeset
242 sub_ir(code, 8, RSP, SZ_PTR);
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diff changeset
243 call(code, cfun);
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diff changeset
244 add_ir(code, 8, RSP, SZ_PTR);
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diff changeset
245 *no_adjust = code->cur - (no_adjust+1);
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diff changeset
246 #else
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diff changeset
247 if (is_write) {
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diff changeset
248 push_r(code, opts->scratch1);
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249 } else {
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diff changeset
250 push_r(code, opts->context_reg);//save opts->context_reg for later
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251 }
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diff changeset
252 push_r(code, opts->context_reg);
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diff changeset
253 push_r(code, is_write ? opts->scratch2 : opts->scratch1);
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diff changeset
254 call(code, cfun);
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diff changeset
255 add_ir(code, is_write ? 12 : 8, RSP, SZ_D);
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diff changeset
256 #endif
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diff changeset
257 if (is_write) {
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diff changeset
258 mov_rr(code, RAX, opts->context_reg, SZ_PTR);
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diff changeset
259 } else {
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diff changeset
260 pop_r(code, opts->context_reg);
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diff changeset
261 mov_rr(code, RAX, opts->scratch1, size);
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diff changeset
262 }
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diff changeset
263 jmp(code, opts->load_context);
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diff changeset
264 } else {
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diff changeset
265 //Not sure the best course of action here
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diff changeset
266 if (!is_write) {
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diff changeset
267 mov_ir(code, size == SZ_B ? 0xFF : 0xFFFF, opts->scratch1, size);
2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
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diff changeset
268 }
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diff changeset
269 retn(code);
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diff changeset
270 }
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diff changeset
271 if (lb_jcc) {
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diff changeset
272 *lb_jcc = code->cur - (lb_jcc+1);
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diff changeset
273 lb_jcc = NULL;
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diff changeset
274 }
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diff changeset
275 if (ub_jcc) {
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diff changeset
276 *ub_jcc = code->cur - (ub_jcc+1);
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diff changeset
277 ub_jcc = NULL;
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diff changeset
278 }
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diff changeset
279 }
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diff changeset
280 if (!is_write) {
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diff changeset
281 mov_ir(code, size == SZ_B ? 0xFF : 0xFFFF, opts->scratch1, size);
2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
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diff changeset
282 }
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diff changeset
283 retn(code);
2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
Michael Pavone <pavone@retrodev.com>
parents: 567
diff changeset
284 return start;
2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
Michael Pavone <pavone@retrodev.com>
parents: 567
diff changeset
285 }