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annotate blastem.c @ 261:f0c53a4bbfa3

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Implement LDIR and fix a bug in which context was not restored after a call to z80_handle_code_write
author Mike Pavone <pavone@retrodev.com>
date Tue, 30 Apr 2013 01:00:10 -0700
parents 625f8e4d5fd2
children 2989ed7b8608
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1 #include "68kinst.h"
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2 #include "m68k_to_x86.h"
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3 #include "z80_to_x86.h"
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4 #include "mem.h"
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5 #include "vdp.h"
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6 #include "render.h"
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7 #include "blastem.h"
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8 #include <stdio.h>
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9 #include <stdlib.h>
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10 #include <string.h>
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11
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12 #define CARTRIDGE_WORDS 0x200000
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13 #define RAM_WORDS 32 * 1024
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14 #define Z80_RAM_BYTES 8 * 1024
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15 #define MCLKS_PER_68K 7
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16 #define MCLKS_PER_Z80 15
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17 //TODO: Figure out the exact value for this
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18 #define MCLKS_PER_FRAME (MCLKS_LINE*262)
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19 #define CYCLE_NEVER 0xFFFFFFFF
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20
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21 uint16_t cart[CARTRIDGE_WORDS];
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22 uint16_t ram[RAM_WORDS];
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23 uint8_t z80_ram[Z80_RAM_BYTES];
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24
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25 io_port gamepad_1;
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26 io_port gamepad_2;
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27
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28 int headless = 0;
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29
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30 #ifndef MIN
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31 #define MIN(a,b) ((a) < (b) ? (a) : (b))
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32 #endif
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33
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34 #define SMD_HEADER_SIZE 512
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35 #define SMD_MAGIC1 0x03
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36 #define SMD_MAGIC2 0xAA
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37 #define SMD_MAGIC3 0xBB
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38 #define SMD_BLOCK_SIZE 0x4000
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39
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40 int load_smd_rom(long filesize, FILE * f)
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41 {
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42 uint8_t block[SMD_BLOCK_SIZE];
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43 filesize -= SMD_HEADER_SIZE;
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44 fseek(f, SMD_HEADER_SIZE, SEEK_SET);
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45
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46 uint16_t * dst = cart;
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47 while (filesize > 0) {
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48 fread(block, 1, SMD_BLOCK_SIZE, f);
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49 for (uint8_t *low = block, *high = (block+SMD_BLOCK_SIZE/2), *end = block+SMD_BLOCK_SIZE; high < end; high++, low++) {
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50 *(dst++) = *high << 8 | *low;
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51 }
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52 filesize -= SMD_BLOCK_SIZE;
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53 }
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54 return 1;
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55 }
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56
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57 int load_rom(char * filename)
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58 {
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59 uint8_t header[10];
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60 FILE * f = fopen(filename, "rb");
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61 if (!f) {
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62 return 0;
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63 }
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64 fread(header, 1, sizeof(header), f);
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65 fseek(f, 0, SEEK_END);
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66 long filesize = ftell(f);
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67 if (filesize/2 > CARTRIDGE_WORDS) {
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68 //carts bigger than 4MB not currently supported
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69 filesize = CARTRIDGE_WORDS*2;
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70 }
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71 fseek(f, 0, SEEK_SET);
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72 if (header[1] == SMD_MAGIC1 && header[8] == SMD_MAGIC2 && header[9] == SMD_MAGIC3) {
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73 int i;
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74 for (i = 3; i < 8; i++) {
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75 if (header[i] != 0) {
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76 break;
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77 }
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78 }
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79 if (i == 8) {
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80 if (header[2]) {
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81 fprintf(stderr, "%s is a split SMD ROM which is not currently supported", filename);
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82 exit(1);
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83 }
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84 return load_smd_rom(filesize, f);
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85 }
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86 }
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87 fread(cart, 2, filesize/2, f);
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88 fclose(f);
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89 for(unsigned short * cur = cart; cur - cart < (filesize/2); ++cur)
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90 {
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91 *cur = (*cur >> 8) | (*cur << 8);
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92 }
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93 //TODO: Mirror ROM
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94 return 1;
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95 }
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96
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97 uint16_t read_dma_value(uint32_t address)
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98 {
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99 //addresses here are word addresses (i.e. bit 0 corresponds to A1), so no need to do div by 2
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100 if (address < 0x200000) {
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101 return cart[address];
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102 } else if(address >= 0x700000) {
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103 return ram[address & 0x7FFF];
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104 }
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105 //TODO: Figure out what happens when you try to DMA from weird adresses like IO or banked Z80 area
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106 return 0;
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107 }
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108
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109 #define VINT_CYCLE ((MCLKS_LINE * 226)/MCLKS_PER_68K)
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110 #define ZVINT_CYCLE ((MCLKS_LINE * 226)/MCLKS_PER_Z80)
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111
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112 void adjust_int_cycle(m68k_context * context, vdp_context * v_context)
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113 {
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114 if (!(v_context->regs[REG_MODE_2] & 0x20 && ((context->status & 0x7) < 6)) || context->current_cycle >= VINT_CYCLE) {
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115 context->int_cycle = CYCLE_NEVER;
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116 context->target_cycle = context->sync_cycle;
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117 } else if (context->int_cycle > VINT_CYCLE) {
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118 context->int_cycle = VINT_CYCLE;
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119 context->int_num = 6;
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120 if (context->int_cycle < context->sync_cycle) {
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121 context->target_cycle = context->int_cycle;
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122 }
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123 }
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124 }
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125
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126 int break_on_sync = 0;
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127 #define Z80_ACK_DELAY 3 //TODO: Calculate this on the fly based on how synced up the Z80 and 68K clocks are
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128
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129 uint8_t reset = 1;
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130 uint8_t need_reset = 0;
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131 uint8_t busreq = 0;
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132 uint8_t busack = 0;
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133 uint32_t busack_cycle = CYCLE_NEVER;
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134 uint8_t new_busack = 0;
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135
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136 m68k_context * sync_components(m68k_context * context, uint32_t address)
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137 {
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138 //TODO: Handle sync targets smaller than a single frame
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diff changeset
139 z80_context * z_context = context->next_context;
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diff changeset
140 vdp_context * v_context = z_context->next_context;
88
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diff changeset
141 uint32_t mclks = context->current_cycle * MCLKS_PER_68K;
260
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diff changeset
142 if (!reset && !busreq) {
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diff changeset
143 if (need_reset) {
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diff changeset
144 z80_reset(z_context);
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diff changeset
145 need_reset = 0;
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diff changeset
146 }
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diff changeset
147 z_context->sync_cycle = mclks / MCLKS_PER_Z80;
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diff changeset
148 while (z_context->current_cycle < z_context->sync_cycle) {
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diff changeset
149 if (z_context->iff1 && z_context->current_cycle < ZVINT_CYCLE) {
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diff changeset
150 z_context->int_cycle = ZVINT_CYCLE;
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diff changeset
151 }
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diff changeset
152 z_context->target_cycle = z_context->sync_cycle < z_context->int_cycle ? z_context->sync_cycle : z_context->int_cycle;
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diff changeset
153 z80_run(z_context);
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diff changeset
154 }
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diff changeset
155 }
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diff changeset
156 if (mclks >= MCLKS_PER_FRAME) {
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diff changeset
157 //printf("reached frame end | 68K Cycles: %d, MCLK Cycles: %d\n", context->current_cycle, mclks);
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parents:
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158 vdp_run_context(v_context, MCLKS_PER_FRAME);
215
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
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parents: 211
diff changeset
159 if (!headless) {
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diff changeset
160 break_on_sync |= wait_render_frame(v_context);
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diff changeset
161 }
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162 mclks -= MCLKS_PER_FRAME;
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diff changeset
163 vdp_adjust_cycles(v_context, MCLKS_PER_FRAME);
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164 io_adjust_cycles(&gamepad_1, context->current_cycle, MCLKS_PER_FRAME/MCLKS_PER_68K);
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165 io_adjust_cycles(&gamepad_2, context->current_cycle, MCLKS_PER_FRAME/MCLKS_PER_68K);
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166 context->current_cycle -= MCLKS_PER_FRAME/MCLKS_PER_68K;
260
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diff changeset
167 if (z_context->current_cycle >= MCLKS_PER_FRAME/MCLKS_PER_Z80) {
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diff changeset
168 z_context->current_cycle -= MCLKS_PER_FRAME/MCLKS_PER_Z80;
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diff changeset
169 } else {
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diff changeset
170 z_context->current_cycle = 0;
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diff changeset
171 }
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172 if (mclks) {
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173 vdp_run_context(v_context, mclks);
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174 }
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175 } else {
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176 //printf("running VDP for %d cycles\n", mclks - v_context->cycles);
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177 vdp_run_context(v_context, mclks);
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178 }
186
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
179 adjust_int_cycle(context, v_context);
198
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parents: 197
diff changeset
180 if (break_on_sync && address) {
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parents: 197
diff changeset
181 break_on_sync = 0;
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diff changeset
182 debugger(context, address);
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diff changeset
183 }
88
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diff changeset
184 return context;
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185 }
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diff changeset
186
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187 m68k_context * vdp_port_write(uint32_t vdp_port, m68k_context * context, uint16_t value)
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diff changeset
188 {
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diff changeset
189 //printf("vdp_port write: %X, value: %X, cycle: %d\n", vdp_port, value, context->current_cycle);
198
209a37eed3e7 Add support for breaking into the debugger while game is running
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parents: 197
diff changeset
190 sync_components(context, 0);
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
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diff changeset
191 z80_context * z_context = context->next_context;
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diff changeset
192 vdp_context * v_context = z_context->next_context;
88
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parents:
diff changeset
193 if (vdp_port < 0x10) {
149
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
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parents: 144
diff changeset
194 int blocked;
88
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parents:
diff changeset
195 if (vdp_port < 4) {
149
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
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diff changeset
196 while (vdp_data_port_write(v_context, value) < 0) {
88
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diff changeset
197 while(v_context->flags & FLAG_DMA_RUN) {
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diff changeset
198 vdp_run_dma_done(v_context, MCLKS_PER_FRAME);
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diff changeset
199 if (v_context->cycles >= MCLKS_PER_FRAME) {
215
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
200 if (!headless) {
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
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parents: 211
diff changeset
201 wait_render_frame(v_context);
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
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parents: 211
diff changeset
202 }
88
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203 vdp_adjust_cycles(v_context, MCLKS_PER_FRAME);
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204 io_adjust_cycles(&gamepad_1, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K);
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diff changeset
205 io_adjust_cycles(&gamepad_2, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K);
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diff changeset
206 }
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diff changeset
207 }
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diff changeset
208 context->current_cycle = v_context->cycles / MCLKS_PER_68K;
149
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
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diff changeset
209 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
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diff changeset
210 } else if(vdp_port < 8) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
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parents: 144
diff changeset
211 blocked = vdp_control_port_write(v_context, value);
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parents: 144
diff changeset
212 if (blocked) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
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parents: 144
diff changeset
213 while (blocked) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
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parents: 144
diff changeset
214 while(v_context->flags & FLAG_DMA_RUN) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
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parents: 144
diff changeset
215 vdp_run_dma_done(v_context, MCLKS_PER_FRAME);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
216 if (v_context->cycles >= MCLKS_PER_FRAME) {
215
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
217 if (!headless) {
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
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parents: 211
diff changeset
218 wait_render_frame(v_context);
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
219 }
149
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
220 vdp_adjust_cycles(v_context, MCLKS_PER_FRAME);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
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parents: 144
diff changeset
221 io_adjust_cycles(&gamepad_1, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
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parents: 144
diff changeset
222 io_adjust_cycles(&gamepad_2, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
223 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
224 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
225 if (blocked < 0) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
226 blocked = vdp_control_port_write(v_context, value);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
227 } else {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
228 blocked = 0;
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
229 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
230 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
231 context->current_cycle = v_context->cycles / MCLKS_PER_68K;
88
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parents:
diff changeset
232 } else {
186
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
233 adjust_int_cycle(context, v_context);
88
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
234 }
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parents:
diff changeset
235 } else {
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parents:
diff changeset
236 printf("Illegal write to HV Counter port %X\n", vdp_port);
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parents:
diff changeset
237 exit(1);
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parents:
diff changeset
238 }
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parents:
diff changeset
239 context->current_cycle = v_context->cycles/MCLKS_PER_68K;
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parents:
diff changeset
240 } else if (vdp_port < 0x18) {
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parents:
diff changeset
241 //TODO: Implement PSG
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parents:
diff changeset
242 } else {
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parents:
diff changeset
243 //TODO: Implement undocumented test register(s)
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parents:
diff changeset
244 }
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parents:
diff changeset
245 return context;
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parents:
diff changeset
246 }
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parents:
diff changeset
247
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parents:
diff changeset
248 m68k_context * vdp_port_read(uint32_t vdp_port, m68k_context * context)
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parents:
diff changeset
249 {
198
209a37eed3e7 Add support for breaking into the debugger while game is running
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parents: 197
diff changeset
250 sync_components(context, 0);
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
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parents: 215
diff changeset
251 z80_context * z_context = context->next_context;
625f8e4d5fd2 Initial stab at integartiong Z80 core
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parents: 215
diff changeset
252 vdp_context * v_context = z_context->next_context;
88
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parents:
diff changeset
253 if (vdp_port < 0x10) {
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parents:
diff changeset
254 if (vdp_port < 4) {
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parents:
diff changeset
255 context->value = vdp_data_port_read(v_context);
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parents:
diff changeset
256 } else if(vdp_port < 8) {
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parents:
diff changeset
257 context->value = vdp_control_port_read(v_context);
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parents:
diff changeset
258 } else {
137
0e7e1ccc0a81 Implemented HV counter
Mike Pavone <pavone@retrodev.com>
parents: 130
diff changeset
259 context->value = vdp_hv_counter_read(v_context);
0e7e1ccc0a81 Implemented HV counter
Mike Pavone <pavone@retrodev.com>
parents: 130
diff changeset
260 //printf("HV Counter: %X at cycle %d\n", context->value, v_context->cycles);
88
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
261 }
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parents:
diff changeset
262 context->current_cycle = v_context->cycles/MCLKS_PER_68K;
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parents:
diff changeset
263 } else {
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parents:
diff changeset
264 printf("Illegal read from PSG or test register port %X\n", vdp_port);
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parents:
diff changeset
265 exit(1);
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parents:
diff changeset
266 }
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parents:
diff changeset
267 return context;
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
268 }
c339559f1d4f Forgot to add blastem main file earlier
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parents:
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269
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diff changeset
270 #define TH 0x40
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diff changeset
271 #define TH_TIMEOUT 8000
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diff changeset
272
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diff changeset
273 void io_adjust_cycles(io_port * pad, uint32_t current_cycle, uint32_t deduction)
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diff changeset
274 {
89
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parents: 88
diff changeset
275 /*uint8_t control = pad->control | 0x80;
88
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diff changeset
276 uint8_t th = control & pad->output;
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diff changeset
277 if (pad->input[GAMEPAD_TH0] || pad->input[GAMEPAD_TH1]) {
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parents:
diff changeset
278 printf("adjust_cycles | control: %X, TH: %X, GAMEPAD_TH0: %X, GAMEPAD_TH1: %X, TH Counter: %d, Timeout: %d, Cycle: %d\n", control, th, pad->input[GAMEPAD_TH0], pad->input[GAMEPAD_TH1], pad->th_counter,pad->timeout_cycle, current_cycle);
89
9757b4c6c33f Minor joypad fix and commeount out some debug printfs
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parents: 88
diff changeset
279 }*/
88
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diff changeset
280 if (current_cycle >= pad->timeout_cycle) {
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diff changeset
281 pad->th_counter = 0;
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parents:
diff changeset
282 } else {
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parents:
diff changeset
283 pad->timeout_cycle -= deduction;
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parents:
diff changeset
284 }
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diff changeset
285 if (busack_cycle < CYCLE_NEVER && current_cycle < busack_cycle) {
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diff changeset
286 busack_cycle -= deduction;
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diff changeset
287 }
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parents:
diff changeset
288 }
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289
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diff changeset
290 void io_data_write(io_port * pad, m68k_context * context, uint8_t value)
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parents:
diff changeset
291 {
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parents:
diff changeset
292 if (pad->control & TH) {
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parents:
diff changeset
293 //check if TH has changed
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parents:
diff changeset
294 if ((pad->output & TH) ^ (value & TH)) {
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parents:
diff changeset
295 if (context->current_cycle >= pad->timeout_cycle) {
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parents:
diff changeset
296 pad->th_counter = 0;
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parents:
diff changeset
297 }
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parents:
diff changeset
298 if (!(value & TH)) {
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parents:
diff changeset
299 pad->th_counter++;
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diff changeset
300 }
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diff changeset
301 pad->timeout_cycle = context->current_cycle + TH_TIMEOUT;
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parents:
diff changeset
302 }
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parents:
diff changeset
303 }
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parents:
diff changeset
304 pad->output = value;
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parents:
diff changeset
305 }
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parents:
diff changeset
306
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parents:
diff changeset
307 void io_data_read(io_port * pad, m68k_context * context)
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parents:
diff changeset
308 {
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diff changeset
309 uint8_t control = pad->control | 0x80;
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diff changeset
310 uint8_t th = control & pad->output;
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parents:
diff changeset
311 uint8_t input;
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parents:
diff changeset
312 if (context->current_cycle >= pad->timeout_cycle) {
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parents:
diff changeset
313 pad->th_counter = 0;
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parents:
diff changeset
314 }
89
9757b4c6c33f Minor joypad fix and commeount out some debug printfs
Mike Pavone <pavone@retrodev.com>
parents: 88
diff changeset
315 /*if (pad->input[GAMEPAD_TH0] || pad->input[GAMEPAD_TH1]) {
88
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parents:
diff changeset
316 printf("io_data_read | control: %X, TH: %X, GAMEPAD_TH0: %X, GAMEPAD_TH1: %X, TH Counter: %d, Timeout: %d, Cycle: %d\n", control, th, pad->input[GAMEPAD_TH0], pad->input[GAMEPAD_TH1], pad->th_counter,pad->timeout_cycle, context->current_cycle);
89
9757b4c6c33f Minor joypad fix and commeount out some debug printfs
Mike Pavone <pavone@retrodev.com>
parents: 88
diff changeset
317 }*/
88
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parents:
diff changeset
318 if (th) {
195
c615061f7914 Fix 6-button controller emulation
Mike Pavone <pavone@retrodev.com>
parents: 186
diff changeset
319 if (pad->th_counter == 3) {
88
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parents:
diff changeset
320 input = pad->input[GAMEPAD_EXTRA];
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parents:
diff changeset
321 } else {
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parents:
diff changeset
322 input = pad->input[GAMEPAD_TH1];
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parents:
diff changeset
323 }
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parents:
diff changeset
324 } else {
195
c615061f7914 Fix 6-button controller emulation
Mike Pavone <pavone@retrodev.com>
parents: 186
diff changeset
325 if (pad->th_counter == 3) {
88
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
326 input = pad->input[GAMEPAD_TH0] | 0xF;
195
c615061f7914 Fix 6-button controller emulation
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parents: 186
diff changeset
327 } else if(pad->th_counter == 4) {
88
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parents:
diff changeset
328 input = pad->input[GAMEPAD_TH0] & 0x30;
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
329 } else {
89
9757b4c6c33f Minor joypad fix and commeount out some debug printfs
Mike Pavone <pavone@retrodev.com>
parents: 88
diff changeset
330 input = pad->input[GAMEPAD_TH0] | 0xC;
88
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
331 }
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
332 }
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parents:
diff changeset
333 context->value = ((~input) & (~control)) | (pad->output & control);
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parents:
diff changeset
334 /*if (pad->input[GAMEPAD_TH0] || pad->input[GAMEPAD_TH1]) {
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parents:
diff changeset
335 printf ("value: %X\n", context->value);
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
336 }*/
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
337 }
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parents:
diff changeset
338
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parents:
diff changeset
339 m68k_context * io_write(uint32_t location, m68k_context * context, uint8_t value)
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
340 {
153
42c031184e8a Implement access to Z80 RAM
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parents: 149
diff changeset
341 if (location < 0x10000) {
42c031184e8a Implement access to Z80 RAM
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parents: 149
diff changeset
342 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
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parents: 149
diff changeset
343 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
344 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
345 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
346 if (!(busack || reset)) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
347 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
348 if (location < 0x4000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
349 z80_ram[location & 0x1FFF] = value;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
350 }
88
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
351 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
352 } else {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
353 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
354 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
355 switch(location/2)
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
356 {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
357 case 0x1:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
358 io_data_write(&gamepad_1, context, value);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
359 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
360 case 0x2:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
361 io_data_write(&gamepad_2, context, value);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
362 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
363 case 0x3://PORT C Data
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
364 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
365 case 0x4:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
366 gamepad_1.control = value;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
367 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
368 case 0x5:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
369 gamepad_2.control = value;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
370 break;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
371 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
372 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
373 if (location == 0x1100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
374 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
375 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
376 busack_cycle = CYCLE_NEVER;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
377 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
378 if (value & 1) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
379 busreq = 1;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
380 if(!reset) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
381 busack_cycle = context->current_cycle + Z80_ACK_DELAY;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
382 new_busack = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
383 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
384 } else {
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
385 if (busreq) {
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
386 z80_context * z_context = context->next_context;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
387 //TODO: Add necessary delay between release of busreq and resumption of execution
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
388 z_context->current_cycle = (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
389 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
390 busreq = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
391 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
392 busack = 1;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
393 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
394 } else if (location == 0x1200) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
395 if (value & 1) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
396 if (reset && busreq) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
397 new_busack = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
398 busack_cycle = context->current_cycle + Z80_ACK_DELAY;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
399 }
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
400 //TODO: Deal with the scenario in which reset is not asserted long enough
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
401 if (reset) {
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
402 z80_context * z_context = context->next_context;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
403 need_reset = 1;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
404 //TODO: Add necessary delay between release of reset and start of execution
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
405 z_context->current_cycle = (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
406 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
407 reset = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
408 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
409 reset = 1;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
410 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
411 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
412 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
413 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
414 return context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
415 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
416
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
417 m68k_context * io_write_w(uint32_t location, m68k_context * context, uint16_t value)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
418 {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
419 if (location < 0x10000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
420 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
421 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
422 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
423 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
424 if (!(busack || reset)) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
425 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
426 if (location < 0x4000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
427 z80_ram[location & 0x1FFE] = value >> 8;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
428 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
429 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
430 } else {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
431 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
432 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
433 switch(location/2)
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
434 {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
435 case 0x1:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
436 io_data_write(&gamepad_1, context, value);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
437 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
438 case 0x2:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
439 io_data_write(&gamepad_2, context, value);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
440 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
441 case 0x3://PORT C Data
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
442 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
443 case 0x4:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
444 gamepad_1.control = value;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
445 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
446 case 0x5:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
447 gamepad_2.control = value;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
448 break;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
449 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
450 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
451 //printf("IO Write of %X to %X @ %d\n", value, location, context->current_cycle);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
452 if (location == 0x1100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
453 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
454 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
455 busack_cycle = CYCLE_NEVER;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
456 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
457 if (value & 0x100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
458 busreq = 1;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
459 if(!reset) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
460 busack_cycle = context->current_cycle + Z80_ACK_DELAY;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
461 new_busack = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
462 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
463 } else {
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
464 if (busreq) {
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
465 z80_context * z_context = context->next_context;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
466 //TODO: Add necessary delay between release of busreq and resumption of execution
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
467 z_context->current_cycle = (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
468 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
469 busreq = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
470 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
471 busack = 1;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
472 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
473 } else if (location == 0x1200) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
474 if (value & 0x100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
475 if (reset && busreq) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
476 new_busack = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
477 busack_cycle = context->current_cycle + Z80_ACK_DELAY;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
478 }
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
479 //TODO: Deal with the scenario in which reset is not asserted long enough
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
480 if (reset) {
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
481 z80_context * z_context = context->next_context;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
482 need_reset = 1;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
483 //TODO: Add necessary delay between release of reset and start of execution
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
484 z_context->current_cycle = (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
485 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
486 reset = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
487 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
488 reset = 1;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
489 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
490 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
491 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
492 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
493 return context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
494 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
495
130
0bdbffa9fe90 Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents: 115
diff changeset
496 #define USA 0x80
0bdbffa9fe90 Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents: 115
diff changeset
497 #define JAP 0x00
0bdbffa9fe90 Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents: 115
diff changeset
498 #define EUR 0xC0
0bdbffa9fe90 Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents: 115
diff changeset
499 #define NO_DISK 0x20
0bdbffa9fe90 Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents: 115
diff changeset
500 uint8_t version_reg = NO_DISK | USA;
0bdbffa9fe90 Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents: 115
diff changeset
501
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
502 m68k_context * io_read(uint32_t location, m68k_context * context)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
503 {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
504 if (location < 0x10000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
505 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
506 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
507 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
508 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
509 if (!(busack || reset)) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
510 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
511 if (location < 0x4000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
512 context->value = z80_ram[location & 0x1FFF];
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
513 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
514 context->value = 0xFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
515 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
516 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
517 context->value = 0xFF;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
518 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
519 } else {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
520 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
521 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
522 switch(location/2)
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
523 {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
524 case 0x0:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
525 //version bits should be 0 for now since we're not emulating TMSS
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
526 //Not sure about the other bits
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
527 context->value = version_reg;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
528 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
529 case 0x1:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
530 io_data_read(&gamepad_1, context);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
531 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
532 case 0x2:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
533 io_data_read(&gamepad_2, context);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
534 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
535 case 0x3://PORT C Data
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
536 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
537 case 0x4:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
538 context->value = gamepad_1.control;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
539 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
540 case 0x5:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
541 context->value = gamepad_2.control;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
542 break;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
543 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
544 } else {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
545 if (location == 0x1100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
546 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
547 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
548 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
549 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
550 context->value = reset || busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
551 //printf("Byte read of BUSREQ returned %d @ %d (reset: %d, busack: %d)\n", context->value, context->current_cycle, reset, busack);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
552 } else if (location == 0x1200) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
553 context->value = !reset;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
554 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
555 printf("Byte read of unknown IO location: %X\n", location);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
556 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
557 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
558 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
559 return context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
560 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
561
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
562 m68k_context * io_read_w(uint32_t location, m68k_context * context)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
563 {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
564 if (location < 0x10000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
565 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
566 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
567 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
568 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
569 if (!(busack || reset)) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
570 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
571 if (location < 0x4000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
572 context->value = z80_ram[location & 0x1FFE];
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
573 context->value |= context->value << 8;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
574 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
575 context->value = 0xFFFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
576 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
577 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
578 context->value = 0xFFFF;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
579 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
580 } else {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
581 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
582 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
583 switch(location/2)
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
584 {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
585 case 0x0:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
586 //version bits should be 0 for now since we're not emulating TMSS
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
587 //Not sure about the other bits
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
588 context->value = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
589 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
590 case 0x1:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
591 io_data_read(&gamepad_1, context);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
592 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
593 case 0x2:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
594 io_data_read(&gamepad_2, context);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
595 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
596 case 0x3://PORT C Data
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
597 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
598 case 0x4:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
599 context->value = gamepad_1.control;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
600 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
601 case 0x5:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
602 context->value = gamepad_2.control;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
603 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
604 case 0x6:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
605 //PORT C Control
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
606 context->value = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
607 break;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
608 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
609 context->value = context->value | (context->value << 8);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
610 //printf("Word read to %X returned %d\n", location, context->value);
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
611 } else {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
612 if (location == 0x1100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
613 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
614 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
615 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
616 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
617 context->value = (reset || busack) << 8;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
618 //printf("Word read of BUSREQ returned %d\n", context->value);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
619 } else if (location == 0x1200) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
620 context->value = (!reset) << 8;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
621 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
622 printf("Word read of unknown IO location: %X\n", location);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
623 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
624 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
625 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
626 return context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
627 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
628
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
629 typedef struct bp_def {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
630 struct bp_def * next;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
631 uint32_t address;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
632 uint32_t index;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
633 } bp_def;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
634
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
635 bp_def * breakpoints = NULL;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
636 uint32_t bp_index = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
637
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
638 bp_def ** find_breakpoint(bp_def ** cur, uint32_t address)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
639 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
640 while (*cur) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
641 if ((*cur)->address == address) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
642 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
643 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
644 cur = &((*cur)->next);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
645 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
646 return cur;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
647 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
648
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
649 bp_def ** find_breakpoint_idx(bp_def ** cur, uint32_t index)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
650 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
651 while (*cur) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
652 if ((*cur)->index == index) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
653 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
654 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
655 cur = &((*cur)->next);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
656 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
657 return cur;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
658 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
659
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
660 char * find_param(char * buf)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
661 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
662 for (; *buf; buf++) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
663 if (*buf == ' ') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
664 if (*(buf+1)) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
665 return buf+1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
666 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
667 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
668 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
669 return NULL;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
670 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
671
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
672 void strip_nl(char * buf)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
673 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
674 for(; *buf; buf++) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
675 if (*buf == '\n') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
676 *buf = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
677 return;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
678 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
679 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
680 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
681
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
682 m68k_context * debugger(m68k_context * context, uint32_t address)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
683 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
684 static char last_cmd[1024];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
685 char input_buf[1024];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
686 static uint32_t branch_t;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
687 static uint32_t branch_f;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
688 m68kinst inst;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
689 //probably not necessary, but let's play it safe
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
690 address &= 0xFFFFFF;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
691 if (address == branch_t) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
692 bp_def ** f_bp = find_breakpoint(&breakpoints, branch_f);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
693 if (!*f_bp) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
694 remove_breakpoint(context, branch_f);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
695 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
696 branch_t = branch_f = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
697 } else if(address == branch_f) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
698 bp_def ** t_bp = find_breakpoint(&breakpoints, branch_t);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
699 if (!*t_bp) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
700 remove_breakpoint(context, branch_t);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
701 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
702 branch_t = branch_f = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
703 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
704 //Check if this is a user set breakpoint, or just a temporary one
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
705 bp_def ** this_bp = find_breakpoint(&breakpoints, address);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
706 if (*this_bp) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
707 printf("Breakpoint %d hit\n", (*this_bp)->index);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
708 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
709 remove_breakpoint(context, address);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
710 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
711 uint16_t * pc;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
712 if (address < 0x400000) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
713 pc = cart + address/2;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
714 } else if(address > 0xE00000) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
715 pc = ram + (address & 0xFFFF)/2;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
716 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
717 fprintf(stderr, "Entered debugger at address %X\n", address);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
718 exit(1);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
719 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
720 uint16_t * after_pc = m68k_decode(pc, &inst, address);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
721 m68k_disasm(&inst, input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
722 printf("%X: %s\n", address, input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
723 uint32_t after = address + (after_pc-pc)*2;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
724 int debugging = 1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
725 while (debugging) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
726 fputs(">", stdout);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
727 if (!fgets(input_buf, sizeof(input_buf), stdin)) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
728 fputs("fgets failed", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
729 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
730 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
731 strip_nl(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
732 //hitting enter repeats last command
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
733 if (input_buf[0]) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
734 strcpy(last_cmd, input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
735 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
736 strcpy(input_buf, last_cmd);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
737 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
738 char * param;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
739 char format[8];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
740 uint32_t value;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
741 bp_def * new_bp;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
742 switch(input_buf[0])
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
743 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
744 case 'c':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
745 puts("Continuing");
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
746 debugging = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
747 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
748 case 'b':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
749 param = find_param(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
750 if (!param) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
751 fputs("b command requires a parameter\n", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
752 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
753 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
754 value = strtol(param, NULL, 16);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
755 insert_breakpoint(context, value, (uint8_t *)debugger);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
756 new_bp = malloc(sizeof(bp_def));
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
757 new_bp->next = breakpoints;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
758 new_bp->address = value;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
759 new_bp->index = bp_index++;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
760 breakpoints = new_bp;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
761 printf("Breakpoint %d set at %X\n", new_bp->index, value);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
762 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
763 case 'a':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
764 param = find_param(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
765 if (!param) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
766 fputs("a command requires a parameter\n", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
767 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
768 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
769 value = strtol(param, NULL, 16);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
770 insert_breakpoint(context, value, (uint8_t *)debugger);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
771 debugging = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
772 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
773 case 'd':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
774 param = find_param(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
775 if (!param) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
776 fputs("b command requires a parameter\n", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
777 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
778 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
779 value = atoi(param);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
780 this_bp = find_breakpoint_idx(&breakpoints, value);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
781 if (!*this_bp) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
782 fprintf(stderr, "Breakpoint %d does not exist\n", value);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
783 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
784 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
785 new_bp = *this_bp;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
786 *this_bp = (*this_bp)->next;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
787 free(new_bp);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
788 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
789 case 'p':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
790 strcpy(format, "%s: %d\n");
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
791 if (input_buf[1] == '/') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
792 switch (input_buf[2])
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
793 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
794 case 'x':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
795 case 'X':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
796 case 'd':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
797 case 'c':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
798 format[5] = input_buf[2];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
799 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
800 default:
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
801 fprintf(stderr, "Unrecognized format character: %c\n", input_buf[2]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
802 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
803 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
804 param = find_param(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
805 if (!param) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
806 fputs("p command requires a parameter\n", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
807 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
808 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
809 if (param[0] == 'd' && param[1] >= '0' && param[1] <= '7') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
810 value = context->dregs[param[1]-'0'];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
811 } else if (param[0] == 'a' && param[1] >= '0' && param[1] <= '7') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
812 value = context->aregs[param[1]-'0'];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
813 } else if (param[0] == 'S' && param[1] == 'R') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
814 value = (context->status << 8);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
815 for (int flag = 0; flag < 5; flag++) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
816 value |= context->flags[flag] << (4-flag);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
817 }
185
b204fbed4efe Add ability to print out current 68K cycle in debugger
Mike Pavone <pavone@retrodev.com>
parents: 184
diff changeset
818 } else if(param[0] == 'c') {
b204fbed4efe Add ability to print out current 68K cycle in debugger
Mike Pavone <pavone@retrodev.com>
parents: 184
diff changeset
819 value = context->current_cycle;
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
820 } else if (param[0] == '0' && param[1] == 'x') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
821 uint32_t p_addr = strtol(param+2, NULL, 16);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
822 value = read_dma_value(p_addr/2);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
823 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
824 fprintf(stderr, "Unrecognized parameter to p: %s\n", param);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
825 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
826 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
827 printf(format, param, value);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
828 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
829 case 'n':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
830 //TODO: Deal with jmp, dbcc, rtr and rte
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
831 if (inst.op == M68K_RTS) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
832 after = (read_dma_value(context->aregs[7]/2) << 16) | read_dma_value(context->aregs[7]/2 + 1);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
833 } else if(inst.op == M68K_BCC && inst.extra.cond != COND_FALSE) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
834 if (inst.extra.cond = COND_TRUE) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
835 after = inst.address + 2 + inst.src.params.immed;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
836 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
837 branch_f = after;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
838 branch_t = inst.address + 2 + inst.src.params.immed;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
839 insert_breakpoint(context, branch_t, (uint8_t *)debugger);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
840 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
841 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
842 insert_breakpoint(context, after, (uint8_t *)debugger);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
843 debugging = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
844 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
845 case 'q':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
846 puts("Quitting");
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
847 exit(0);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
848 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
849 default:
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
850 fprintf(stderr, "Unrecognized debugger command %s\n", input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
851 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
852 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
853 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
854 return context;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
855 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
856
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
857 void init_run_cpu(z80_context * zcontext, int debug, FILE * address_log)
211
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
858 {
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
859 m68k_context context;
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
860 x86_68k_options opts;
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
861 init_x86_68k_opts(&opts);
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
862 opts.address_log = address_log;
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
863 init_68k_context(&context, opts.native_code_map, &opts);
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
864
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
865 context.next_context = zcontext;
211
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
866 //cartridge ROM
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
867 context.mem_pointers[0] = cart;
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
868 context.target_cycle = context.sync_cycle = MCLKS_PER_FRAME/MCLKS_PER_68K;
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
869 //work RAM
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
870 context.mem_pointers[1] = ram;
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
871 uint32_t address;
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
872 /*address = cart[0x68/2] << 16 | cart[0x6A/2];
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
873 translate_m68k_stream(address, &context);
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
874 address = cart[0x70/2] << 16 | cart[0x72/2];
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
875 translate_m68k_stream(address, &context);
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
876 address = cart[0x78/2] << 16 | cart[0x7A/2];
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
877 translate_m68k_stream(address, &context);*/
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
878 address = cart[2] << 16 | cart[3];
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
879 translate_m68k_stream(address, &context);
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
880 if (debug) {
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
881 insert_breakpoint(&context, address, (uint8_t *)debugger);
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
882 }
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
883 m68k_reset(&context);
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
884 }
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
885
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
886 int main(int argc, char ** argv)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
887 {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
888 if (argc < 2) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
889 fputs("Usage: blastem FILENAME\n", stderr);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
890 return 1;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
891 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
892 if(!load_rom(argv[1])) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
893 fprintf(stderr, "Failed to open %s for reading\n", argv[1]);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
894 return 1;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
895 }
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
896 int width = -1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
897 int height = -1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
898 int debug = 0;
197
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents: 195
diff changeset
899 FILE *address_log = NULL;
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
900 for (int i = 2; i < argc; i++) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
901 if (argv[i][0] == '-') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
902 switch(argv[i][1]) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
903 case 'd':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
904 debug = 1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
905 break;
197
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents: 195
diff changeset
906 case 'l':
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents: 195
diff changeset
907 address_log = fopen("address.log", "w");
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents: 195
diff changeset
908 break;
215
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
909 case 'v':
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
910 headless = 1;
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
911 break;
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
912 default:
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
913 fprintf(stderr, "Unrecognized switch %s\n", argv[i]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
914 return 1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
915 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
916 } else if (width < 0) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
917 width = atoi(argv[i]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
918 } else if (height < 0) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
919 height = atoi(argv[i]);
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
920 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
921 }
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
922 width = width < 320 ? 320 : width;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
923 height = height < 240 ? (width/320) * 240 : height;
215
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
924 if (!headless) {
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
925 render_init(width, height);
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
926 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
927 vdp_context v_context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
928
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
929 init_vdp_context(&v_context);
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
930
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
931 z80_context z_context;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
932 x86_z80_options z_opts;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
933 init_x86_z80_opts(&z_opts);
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
934 init_z80_context(&z_context, &z_opts);
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
935 z_context.next_context = &v_context;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
936 z_context.mem_pointers[0] = z80_ram;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
937 z_context.sync_cycle = z_context.target_cycle = MCLKS_PER_FRAME/MCLKS_PER_Z80;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
938 z_context.int_cycle = CYCLE_NEVER;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
939 z_context.mem_pointers[1] = z_context.mem_pointers[2] = (uint8_t *)cart;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
940
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
941 init_run_cpu(&z_context, debug, address_log);
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
942 return 0;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
943 }