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annotate lc8951.c @ 2071:598017ef4b0d segacd

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Fix a few sega cd graphics processor bugs
author Michael Pavone <pavone@retrodev.com>
date Sun, 30 Jan 2022 22:29:04 -0800
parents f22e04b69272
children c69e42444f96
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1 #include "lc8951.h"
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2 #include "backend.h"
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3
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4 enum {
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5 COMIN,
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6 IFSTAT,
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7 DBCL,
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8 DBCH,
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9 HEAD0,
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10 HEAD1,
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11 HEAD2,
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12 HEAD3,
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13 PTL,
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14 PTH,
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15 WAL,
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16 WAH,
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17 STAT0,
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18 STAT1,
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19 STAT2,
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20 STAT3,
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21
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22 SBOUT = COMIN,
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23 IFCTRL = IFSTAT,
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24 DACL = HEAD0,
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25 DACH = HEAD1,
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26 DTTRG = HEAD2,
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27 DTACK = HEAD3,
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28 WAL_WRITE = PTL,
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29 WAH_WRITE = PTH,
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30 CTRL0 = WAL,
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31 CTRL1 = WAH,
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32 PTL_WRITE = STAT0,
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33 PTH_WRITE = STAT1,
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34 RESET = STAT3
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35 };
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36
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37 //IFCTRL
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38 #define BIT_CMDIEN 0x80
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39 #define BIT_DTEIEN 0x40
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40 #define BIT_DECIEN 0x20
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41 #define BIT_CMDBK 0x10
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42 #define BIT_DTWAI 0x08
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43 #define BIT_STWAI 0x04
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44 #define BIT_DOUTEN 0x02
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45 #define BIT_SOUTEN 0x01
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46
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47 //IFSTAT
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48 #define BIT_CMDI 0x80
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49 #define BIT_DTEI 0x40
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50 #define BIT_DECI 0x20
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51 #define BIT_DTBSY 0x08
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52 #define BIT_STBSY 0x04
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53 #define BIT_DTEN 0x02
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54 #define BIT_STEN 0x01
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55
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56 //CTRL0
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57 #define BIT_DECEN 0x80
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58 #define BIT_WRRQ 0x04
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59
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60 //STAT0
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61 #define BIT_CRCOK 0x80
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62
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63 //STAT3
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64 #define BIT_VALST 0x80
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65
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66 //datasheet timing info
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67 //3 cycles for memory operation
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68 //6 cycles min for DMA-mode host transfer
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69
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70 void lc8951_init(lc8951 *context, lcd8951_byte_recv_fun byte_handler, void *handler_data)
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71 {
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72 //This seems to vary somewhat between Sega CD models
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73 //unclear if the difference is in the lc8951 or gate array
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74 context->regs[IFSTAT] = 0xFF;
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75 context->ar_mask = 0x1F;
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76 context->clock_step = (2 + 2) * 6; // external divider, internal divider + DMA period
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77 context->byte_handler = byte_handler;
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78 context->handler_data = handler_data;
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79 context->decode_end = CYCLE_NEVER;
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80 context->transfer_end = CYCLE_NEVER;
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81 }
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82
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83 void lc8951_reg_write(lc8951 *context, uint8_t value)
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84 {
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85 switch (context->ar)
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86 {
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87 case SBOUT:
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88 context->regs[context->ar] = value;
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89 if (context->ifctrl & BIT_SOUTEN) {
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90 context->regs[IFSTAT] &= ~BIT_STBSY;
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91 }
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92 break;
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93 case IFCTRL:
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94 context->ifctrl = value;
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95 if (!(value & BIT_SOUTEN)) {
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96 context->regs[IFSTAT] |= BIT_STBSY;
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97 }
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98 if (!(value & BIT_DOUTEN)) {
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99 context->regs[IFSTAT] |= BIT_DTBSY|BIT_DTEI;
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100 context->transfer_end = CYCLE_NEVER;
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101 }
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102 break;
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103 case DBCL:
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104 context->regs[context->ar] = value;
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105 break;
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106 case DBCH:
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107 context->regs[context->ar] = value & 0xF;
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108 break;
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109 case DACL:
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110 context->dac &= 0xFF00;
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111 context->dac |= value;
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112 break;
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113 case DACH:
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114 context->dac &= 0xFF;
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115 context->dac |= value << 8;
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116 break;
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117 case DTTRG:
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118 if (context->ifctrl & BIT_DOUTEN) {
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119 context->regs[IFSTAT] &= ~BIT_DTBSY;
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120 uint16_t transfer_size = context->regs[DBCL] | (context->regs[DBCH] << 8);
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121 context->transfer_end = context->cycle + transfer_size * context->clock_step;
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122 printf("DTTRG: size %u, cycle %u, end %u\n", transfer_size, context->cycle, context->transfer_end);
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123 }
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124 break;
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125 case DTACK:
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126 context->regs[IFSTAT] |= BIT_DTEI;
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127 break;
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128 case WAL_WRITE:
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129 context->regs[WAL] = value;
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130 break;
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131 case WAH_WRITE:
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132 context->regs[WAH] = value;
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133 break;
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134 case CTRL0:
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135 context->ctrl0 = value;
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136 break;
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137 case CTRL1:
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138 context->ctrl1 = value;
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139 break;
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140 case PTL_WRITE:
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141 context->regs[PTL] = value;
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142 break;
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143 case PTH_WRITE:
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144 context->regs[PTH] = value;
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145 //TODO: Datasheet says any write to PT triggers a decode, but initial tests suggest that's not the case
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146 //Need to do more tests with other CTRL0/CTRL1 settings
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147 //context->decode_end = context->cycle + 2352 * context->clock_step * 4;
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148 break;
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Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
149 case RESET:
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
150 context->comin_count = 0;
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
151 context->regs[IFSTAT] = 0xFF;
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
152 break;
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
153 default:
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
154 break;
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
155 }
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
156 if (context->ar != SBOUT) {
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
157 context->ar++;
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
158 context->ar &= context->ar_mask;
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
159 }
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
160 }
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
161
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
162 uint8_t lc8951_reg_read(lc8951 *context)
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
163 {
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
164 uint8_t value;
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
165 if (context->ar == COMIN) {
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
166 if (!context->comin_count) {
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
167 return 0xFF;
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
168 }
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
169 value = context->comin[(context->comin_write - context->comin_count)&sizeof(context->comin)];
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
170 context->comin_count--;
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
171 if (!context->comin_count) {
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
172 context->regs[IFSTAT] |= BIT_CMDI;
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
173 }
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
174 return value;
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
175 }
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
176 if (context->ar == STAT3) {
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
177 context->regs[IFSTAT] |= BIT_DECI;
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
178 }
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
179 if (context->ar >= sizeof(context->regs)) {
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
180 value = 0xFF;
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
181 } else {
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
182 value = context->regs[context->ar];
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
183 }
2062
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
184 printf("CDC read %X: %X\n", context->ar, value);
2058
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
185 context->ar++;
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
186 context->ar &= context->ar_mask;
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
187 return value;
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
188 }
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
189
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
190 void lc8951_ar_write(lc8951 *context, uint8_t value)
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
191 {
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
192 context->ar = value & context->ar_mask;
70260f6051dd Initial work on CDC emulation
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
193 }
2062
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
194
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
195 //25 MHz clock input (1/2 SCD MCLK)
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
196 //internal /2 divider
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
197 //3 cycles for each SRAM access (though might be crystal frequency rather than internal frequency)
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
198 //6 cycle period for DMA transfer out
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
199 //
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
200
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
201 void lc8951_run(lc8951 *context, uint32_t cycle)
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
202 {
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
203 for(; context->cycle < cycle; context->cycle += context->clock_step)
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
204 {
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
205 if (context->cycle >= context->decode_end) {
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
206 context->decode_end = CYCLE_NEVER;
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
207 context->regs[IFSTAT] &= ~BIT_DECI;
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
208 context->regs[STAT3] &= ~BIT_VALST;
2067
f22e04b69272 More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents: 2066
diff changeset
209 if (context->ctrl0 & BIT_WRRQ) {
f22e04b69272 More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents: 2066
diff changeset
210 uint16_t block_start = (context->regs[PTL] | (context->regs[PTH] << 8)) & (sizeof(context->buffer)-1);
f22e04b69272 More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents: 2066
diff changeset
211 for (int reg = HEAD0; reg < PTL; reg++)
f22e04b69272 More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents: 2066
diff changeset
212 {
f22e04b69272 More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents: 2066
diff changeset
213 printf("Setting HEAD%d to buffer[%X]\n", reg - HEAD0, block_start);
f22e04b69272 More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents: 2066
diff changeset
214 context->regs[reg] =context->buffer[block_start++];
f22e04b69272 More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents: 2066
diff changeset
215 block_start &= (sizeof(context->buffer)-1);
f22e04b69272 More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents: 2066
diff changeset
216 }
2062
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
217 }
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
218 printf("Decode done %X:%X:%X mode %X\n", context->regs[HEAD0], context->regs[HEAD1], context->regs[HEAD2], context->regs[HEAD3]);
2067
f22e04b69272 More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents: 2066
diff changeset
219 context->regs[STAT0] |= BIT_CRCOK;
2062
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
220 }
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
221 if (context->transfer_end != CYCLE_NEVER) {
2065
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
222 if (context->byte_handler(context->handler_data, context->buffer[context->dac & (sizeof(context->buffer)-1)])) {
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
223 context->dac++;
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
224 context->regs[DBCL]--;
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
225 if (context->regs[DBCL] == 0xFF) {
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
226 context->regs[DBCH]--;
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
227 if (context->regs[DBCH] == 0xFF) {
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
228 context->regs[IFSTAT] &= ~BIT_DTEI;
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
229 context->regs[IFSTAT] |= BIT_DTBSY;
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
230 if (context->cycle != context->transfer_end) {
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
231 printf("Expected transfer end at %u but ended at %u\n", context->transfer_end, context->cycle);
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
232 }
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
233 context->transfer_end = CYCLE_NEVER;
2062
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
234 }
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
235 }
2065
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
236 } else {
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
237 // pause transfer
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
238 context->transfer_end = CYCLE_NEVER;
2062
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
239 }
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
240 }
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
241 }
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
242 }
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
243
2066
a61a8a87410c Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents: 2065
diff changeset
244 void lc8951_resume_transfer(lc8951 *context, uint32_t cycle)
2065
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
245 {
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
246 if (context->transfer_end == CYCLE_NEVER && (context->ifctrl & BIT_DOUTEN)) {
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
247 uint16_t transfer_size = context->regs[DBCL] | (context->regs[DBCH] << 8);
2066
a61a8a87410c Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents: 2065
diff changeset
248 if (transfer_size != 0xFFFF) {
a61a8a87410c Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents: 2065
diff changeset
249 //HACK!!! Work around Sub CPU running longer than we would like and dragging other components with it
a61a8a87410c Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents: 2065
diff changeset
250 uint32_t step_diff = (context->cycle - cycle) / context->clock_step;
a61a8a87410c Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents: 2065
diff changeset
251 if (step_diff) {
a61a8a87410c Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents: 2065
diff changeset
252 context->cycle -= step_diff * context->clock_step;
a61a8a87410c Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents: 2065
diff changeset
253 }
2065
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
254 context->transfer_end = context->cycle + transfer_size * context->clock_step;
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
255 printf("RESUME: size %u, cycle %u, end %u\n", transfer_size, context->cycle, context->transfer_end);
2066
a61a8a87410c Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents: 2065
diff changeset
256 if (step_diff) {
a61a8a87410c Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents: 2065
diff changeset
257 lc8951_run(context, cycle);
a61a8a87410c Fix a bunch of CDC/CDD related mcd-verificator failures
Michael Pavone <pavone@retrodev.com>
parents: 2065
diff changeset
258 }
2065
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
259 }
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
260 }
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
261 }
02a9846668d1 Implement transfer of data from CDC to elsewhere. Other miscellaneous CDD/CDC improvements
Michael Pavone <pavone@retrodev.com>
parents: 2062
diff changeset
262
2062
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
263 void lc8951_write_byte(lc8951 *context, uint32_t cycle, int sector_offset, uint8_t byte)
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
264 {
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
265 lc8951_run(context, cycle);
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
266 uint16_t current_write_addr = context->regs[WAL] | (context->regs[WAH] << 8);
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
267 if (sector_offset == 12) {
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
268 //we've recevied the sync pattern for the next block
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
269
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
270 //header/status regs no longer considered "valid"
07ed42bd7b4c Some progress on CDC and CDD emulation. Now passes first 3 "CDC INIT" tests in mcd-verificator
Michael Pavone <pavone@retrodev.com>
parents: 2058
diff changeset
271 context->regs[STAT3] |= BIT_VALST;
2067
f22e04b69272 More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents: 2066
diff changeset
272 //!DECI is set inactive at the same time as !VALST
f22e04b69272 More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents: 2066
diff changeset
273 context->regs[IFSTAT] |= BIT_DECI;
f22e04b69272 More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents: 2066
diff changeset
274 if (context->ctrl0 & BIT_DECEN) {
f22e04b69272 More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents: 2066
diff changeset
275 if (context->ctrl0 & BIT_WRRQ) {
f22e04b69272 More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents: 2066
diff changeset
276 uint16_t block_start = current_write_addr - 2352;
f22e04b69272 More CDC/CDD improvements
Michael Pavone <pavone@retrodev.com>
parents: 2066
diff changeset
277 context->regs[PTL] = block_start;
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278 context->regs[PTH] = block_start >> 8;
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279 }
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280 printf("Decoding block starting at %X\n", context->regs[PTL] | (context->regs[PTH] << 8));
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281 //TODO: Datasheet has some hints about how long decoding takes in the form of how long DECI is asserted
2062
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282 context->decode_end = context->cycle + 2352 * context->clock_step * 4;
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283 }
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284 }
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285 if (sector_offset >= 12 && sector_offset < 16) {
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286 //TODO: Handle SHDREN = 1
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287 if ((context->ctrl0 & (BIT_DECEN|BIT_WRRQ)) == (BIT_DECEN)) {
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288 //monitor only mode
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289 context->regs[HEAD0 + sector_offset - 12] = byte;
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290 }
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291 }
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292 if ((context->ctrl0 & (BIT_DECEN|BIT_WRRQ)) == (BIT_DECEN|BIT_WRRQ)) {
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293 context->buffer[current_write_addr & (sizeof(context->buffer)-1)] = byte;
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294 context->regs[WAL]++;
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295 if (!context->regs[WAL]) {
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296 context->regs[WAH]++;
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297 }
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298 }
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299 }
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300
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301 uint32_t lc8951_next_interrupt(lc8951 *context)
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302 {
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303 if ((~context->regs[IFSTAT]) & context->ifctrl & (BIT_CMDI|BIT_DTEI|BIT_DECI)) {
2062
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304 //interrupt already pending
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305 return context->cycle;
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306 }
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307 uint32_t deci_cycle = CYCLE_NEVER;
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308 if (context->ifctrl & BIT_DECI) {
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309 deci_cycle = context->decode_end;
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310 }
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311 uint32_t dtei_cycle = CYCLE_NEVER;
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312 if (context->ifctrl & BIT_DTEI) {
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313 dtei_cycle = context->transfer_end;
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314 }
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315 return deci_cycle < dtei_cycle ? deci_cycle : dtei_cycle;
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316 }
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diff changeset
317
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318 void lc8951_adjust_cycles(lc8951 *context, uint32_t deduction)
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diff changeset
319 {
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diff changeset
320 if (context->decode_end != CYCLE_NEVER) {
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diff changeset
321 context->decode_end -= deduction;
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322 }
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diff changeset
323 if (context->transfer_end != CYCLE_NEVER) {
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diff changeset
324 context->transfer_end -= deduction;
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325 }
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diff changeset
326 }