Sat, 08 Feb 2014 23:37:09 -0800 |
Mike Pavone |
Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work.
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Mon, 06 Jan 2014 22:54:05 -0800 |
Michael Pavone |
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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Thu, 31 Oct 2013 00:28:27 -0700 |
Mike Pavone |
Small optimization for H40 mode
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Tue, 29 Oct 2013 00:03:11 -0700 |
Mike Pavone |
Merge
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Mon, 07 Oct 2013 10:02:08 -0700 |
Mike Pavone |
Initial implementation of sprite overflow and sprite collision status register flags
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Sun, 27 Oct 2013 01:29:50 -0700 |
Mike Pavone |
Basic OpenGL rendering is working
opengl
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Tue, 17 Sep 2013 19:10:00 -0700 |
Mike Pavone |
Set VBLANK flag in status register when display is disabled
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Tue, 17 Sep 2013 09:45:14 -0700 |
Mike Pavone |
Implement HV counter latch
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Tue, 17 Sep 2013 00:42:49 -0700 |
Mike Pavone |
Implement funny behavior for DMA fill to CRAM and VSRAM. Return VSRAM address 0 for reads to VSRAM at >= 40
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Tue, 17 Sep 2013 00:11:45 -0700 |
Mike Pavone |
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
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Mon, 16 Sep 2013 09:44:22 -0700 |
Mike Pavone |
Partial fix for DMA copy
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Sun, 15 Sep 2013 23:49:09 -0700 |
Mike Pavone |
Clear the low 2 bits of CD when a register is written to
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Sun, 15 Sep 2013 23:40:18 -0700 |
Mike Pavone |
Don't allow register writes to regs above when in Mode 4
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Sun, 15 Sep 2013 23:33:24 -0700 |
Mike Pavone |
Remove read pending stuff, that had been added in an attempt to fix CRAM/VSRAM undefined bit results. Set number of bits actually saved in VSRAM to 11
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Sun, 15 Sep 2013 23:00:17 -0700 |
Mike Pavone |
Implement undocumented 8-bit VRAM read
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Sun, 15 Sep 2013 22:43:01 -0700 |
Mike Pavone |
Fix VSRAM reads
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Sun, 15 Sep 2013 22:20:43 -0700 |
Mike Pavone |
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
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Fri, 13 Sep 2013 19:22:46 -0700 |
Mike Pavone |
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
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Tue, 10 Sep 2013 23:31:08 -0700 |
Mike Pavone |
Added copyright notice to source files and added GPL license text in COPYING
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Tue, 10 Sep 2013 09:55:12 -0700 |
Mike Pavone |
Fix timing of backdrop rendering when the display is turned off
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Tue, 10 Sep 2013 00:30:39 -0700 |
Mike Pavone |
Merge
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Tue, 10 Sep 2013 00:29:46 -0700 |
Mike Pavone |
Implement FIFO latency and improve DMA accuracy
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Sun, 08 Sep 2013 20:48:33 -0700 |
Mike Pavone |
Revert change to VBLANK flag timing based on new direct color DMA test
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Mon, 02 Sep 2013 01:02:18 -0700 |
Mike Pavone |
Fix per-column scrolling bug
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Mon, 02 Sep 2013 00:20:56 -0700 |
Mike Pavone |
Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements.
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Sun, 01 Sep 2013 14:27:17 -0700 |
Mike Pavone |
Merge
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Fri, 26 Jul 2013 19:55:04 -0700 |
Mike Pavone |
Added support for saving savestates. Added gst savestate format test harness
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Sun, 01 Sep 2013 12:11:28 -0700 |
Mike Pavone |
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
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Tue, 16 Jul 2013 23:16:14 -0700 |
Mike Pavone |
Add address/cd registers to VDP debug message
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Mon, 15 Jul 2013 23:07:45 -0700 |
Mike Pavone |
Restore one of the VDP debugging modes
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Fri, 12 Jul 2013 19:11:55 -0700 |
Mike Pavone |
Implement the scroll ring buffer properly without memcpy
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Sun, 30 Jun 2013 21:45:23 -0700 |
Mike Pavone |
Refactor duplicated CRAM writing code and fix a bug in the process
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Sun, 30 Jun 2013 11:45:58 -0700 |
Mike Pavone |
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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Sat, 29 Jun 2013 17:15:08 -0700 |
Mike Pavone |
Add support for loading GST format savestates
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Sun, 23 Jun 2013 12:27:11 -0700 |
Mike Pavone |
Fix window layer in double res interlace mode
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Sun, 23 Jun 2013 10:17:40 -0700 |
Mike Pavone |
Fix sprite y mask in interlace mode. Fix framebuffer selection when switching out of interlace mode.
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Sun, 23 Jun 2013 09:17:19 -0700 |
Mike Pavone |
Fix vscroll calculation in double resultion interlace mode
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Sat, 22 Jun 2013 21:19:43 -0700 |
Mike Pavone |
Initial work on interlace
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Wed, 15 May 2013 22:37:04 -0700 |
Mike Pavone |
Fix background color regsiter number
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Tue, 14 May 2013 00:46:34 -0700 |
Mike Pavone |
Only latch video mode at the very beginning of the frame to avoid problems with the cycle count getting out of sync with what I expect
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Tue, 14 May 2013 00:40:10 -0700 |
Mike Pavone |
Update Z80 vint timing
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Tue, 14 May 2013 00:28:45 -0700 |
Mike Pavone |
Update hv counter calculation for clock wonkiness
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Tue, 14 May 2013 00:03:26 -0700 |
Mike Pavone |
Fixup VINT cycle and HBLANK flag for the previous timing fixes
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Mon, 13 May 2013 23:42:52 -0700 |
Mike Pavone |
Initial stab at implementing funky clock adjustments during HSYNC for H40 mode
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Mon, 13 May 2013 21:52:33 -0700 |
Mike Pavone |
Implement first line/last line weirdness in VDP
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Mon, 13 May 2013 21:36:33 -0700 |
Mike Pavone |
Fewer magic numbers in the VDP core for the win
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Mon, 13 May 2013 21:06:08 -0700 |
Mike Pavone |
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
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Sat, 11 May 2013 23:59:20 -0700 |
Mike Pavone |
Properly mask sprite X and Y coordinates
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Sat, 11 May 2013 22:45:05 -0700 |
Mike Pavone |
Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
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Fri, 10 May 2013 23:16:06 -0700 |
Mike Pavone |
Implement hblank flag in status register
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Fri, 10 May 2013 22:57:56 -0700 |
Mike Pavone |
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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Mon, 06 May 2013 00:57:56 -0700 |
Mike Pavone |
Make sure all rendering operations mask CRAM with 0xEEE before using it
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Mon, 22 Apr 2013 23:34:39 -0700 |
Mike Pavone |
Less broken implementation of shadow/highlight
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Mon, 22 Apr 2013 21:24:50 -0700 |
Mike Pavone |
Shadow and higlight operators were switched
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Mon, 22 Apr 2013 19:39:38 -0700 |
Mike Pavone |
Implemented shadow hilight mode.
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Mon, 14 Jan 2013 20:23:17 -0800 |
Mike Pavone |
Fixes for direct color dma stuff
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Mon, 14 Jan 2013 02:13:14 -0800 |
Mike Pavone |
Small fix to bg drawing that yields the proper res for direct color DMA
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Mon, 14 Jan 2013 02:03:35 -0800 |
Mike Pavone |
Fix background rendering when display is off and improve refresh cycle emulation so that direct color DMA demos work
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Tue, 08 Jan 2013 09:34:46 -0800 |
Mike Pavone |
Fix rendering of sprites at the top edge of screen
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Thu, 03 Jan 2013 22:07:40 -0800 |
Mike Pavone |
Implement MULU/MULS and DIVU/DIVS
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