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log vdp.c @ 1199:45c3415508e1

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age author description
Tue, 24 Jan 2017 00:02:03 -0800 Michael Pavone Remove accidentally committed debug logging
Sun, 22 Jan 2017 19:40:32 -0800 Michael Pavone Force IPV4 for GDB remote debugging on Windows. Bind to localhost instead of unspecified address since listening on external ports probably isn't a good idea in the general case
Thu, 19 Jan 2017 09:32:34 -0800 Michael Pavone Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished.
Wed, 18 Jan 2017 21:30:20 -0800 Michael Pavone CRAM contention artifact emulation
Tue, 17 Jan 2017 19:01:04 -0800 Michael Pavone Undo poorly thought out minor optimization that screwed up rendering
Tue, 17 Jan 2017 09:27:05 -0800 Michael Pavone Fix vdp_run_to_vblank
Tue, 17 Jan 2017 09:18:35 -0800 Michael Pavone Disable timing debug
Tue, 17 Jan 2017 09:18:16 -0800 Michael Pavone Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency
Tue, 17 Jan 2017 09:02:36 -0800 Michael Pavone Fix H40 VInt inconsistency
Mon, 16 Jan 2017 23:34:30 -0800 Michael Pavone Fix H32 VInt timing inconsistency
Mon, 16 Jan 2017 22:30:21 -0800 Michael Pavone Fix H32 inconsistency
Mon, 16 Jan 2017 21:38:49 -0800 Michael Pavone Added synthetic test for tracking down interrupt timing issues
Mon, 16 Jan 2017 09:31:33 -0800 Michael Pavone Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Sun, 15 Jan 2017 22:54:01 -0800 Michael Pavone Don't adjust cycles every frame. Only when we start getting close to UINT_MAX. Don't adjust all the way down to zero when we do adjust. Shouldn't fix anything, but may make debugging current issues easier.
Sun, 15 Jan 2017 22:38:31 -0800 Michael Pavone Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Sun, 15 Jan 2017 15:29:32 -0800 Michael Pavone Fix benchmark mode
Sun, 15 Jan 2017 15:07:24 -0800 Michael Pavone Initial work on emulating top and bottom border area
Mon, 09 Jan 2017 19:24:11 -0800 Michael Pavone Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Sun, 08 Jan 2017 13:39:44 -0800 Michael Pavone A bunch of Mode 4 fixes
Sun, 08 Jan 2017 10:46:32 -0800 Michael Pavone Update H32 and Mode 4 mappings based on latest tests
Fri, 06 Jan 2017 19:25:04 -0800 Michael Pavone Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Thu, 05 Jan 2017 19:15:53 -0800 Michael Pavone Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Thu, 05 Jan 2017 00:42:11 -0800 Michael Pavone Fix Mode 4 sprite collision flag
Thu, 05 Jan 2017 00:36:23 -0800 Michael Pavone Implemented Mode 4 H conter latching
Thu, 05 Jan 2017 00:08:28 -0800 Michael Pavone BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Wed, 04 Jan 2017 23:01:58 -0800 Michael Pavone Fix to pass a couple more tests in VDPTEST.sms
Wed, 04 Jan 2017 22:48:00 -0800 Michael Pavone Fix some issues with VDP interface in Mode 4/PBC mode
Wed, 04 Jan 2017 21:23:59 -0800 Michael Pavone Display both byte and word pending values to better reflect VDP pending state in PBC mode
Wed, 04 Jan 2017 20:43:22 -0800 Michael Pavone Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Mon, 02 Jan 2017 16:25:13 -0800 Michael Pavone Fix Mode 4 sprite table Y scan to account for VRAM byte swapping
Sun, 01 Jan 2017 23:00:28 -0800 Michael Pavone Fix slot tracking screwup
Sun, 01 Jan 2017 22:47:23 -0800 Michael Pavone Fix horizontal scrolling in Mode 4
Sun, 01 Jan 2017 21:06:32 -0800 Michael Pavone Update Mode 4 rendering to match logic analyzer captures
Sun, 01 Jan 2017 02:33:06 -0800 Michael Pavone Fix a bug in hslot advancement in Mode 4. Fix some of the "inactive_start" calculations that did not take into account Mode 4.
Sun, 01 Jan 2017 01:23:26 -0800 Michael Pavone Make Mode 4 sprite rendering a little less broken
Sun, 01 Jan 2017 01:16:43 -0800 Michael Pavone Fix rendering of BG color index 0 in Mode 4. Only transparent with respect to sprites and not the backdrop like in Mode 5
Tue, 27 Dec 2016 14:31:27 -0800 Michael Pavone Fix Mode 4 color mapping
Tue, 27 Dec 2016 13:46:06 -0800 Michael Pavone Brighten up Mode 4 colors
Tue, 27 Dec 2016 13:38:58 -0800 Michael Pavone The function of the HVC Latch enable bit in mode register 1 is different when not in mode 5
Tue, 27 Dec 2016 13:26:14 -0800 Michael Pavone Fix inactive start line for Mode 4 in vdp_next_hint. Fix an off by one error in the range of registers allowed to be written in Mode 4
Tue, 27 Dec 2016 13:11:07 -0800 Michael Pavone Implemented Mode 4 sprite list termination
Tue, 27 Dec 2016 12:43:37 -0800 Michael Pavone Less broken Mode 4 implementation
Tue, 27 Dec 2016 11:31:17 -0800 Michael Pavone Somewhat broken implementation of Mode 4
Thu, 22 Dec 2016 19:51:25 -0800 Michael Pavone Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Mon, 12 Dec 2016 09:50:33 -0800 Michael Pavone Fix field flag handling bug introduced with VDP/render interface cleanup
Fri, 09 Dec 2016 09:48:48 -0800 Michael Pavone WIP split of ROM loading/argument parsing from Genesis emulation code. Compiles and doesn't crash, but nothing works. Still a few too many globals as well.
Mon, 28 Nov 2016 22:45:46 -0800 Michael Pavone Clean up symbol visiblity and delete a ltitle bit of dead code
Mon, 22 Aug 2016 09:46:18 -0700 Michael Pavone Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Fri, 12 Aug 2016 09:39:39 -0700 Michael Pavone Removed obsolete TOOD
Sun, 15 May 2016 16:22:45 -0700 Michael Pavone Fix bug in vflip implementation when in double resolution interlace mode
Wed, 11 May 2016 22:43:18 -0700 Michael Pavone Fix implementation of sprite collision flag. Old implementation did not make sense.
Mon, 02 May 2016 23:08:20 -0700 Michael Pavone Fix GST savestate loading to deal with SAT cache to fix sprite corruption on savestate load. Clear out Z80 native_pc so the Z80 state does not get hosed when loading a savestate while the emulator is already running
Sat, 30 Apr 2016 20:57:29 -0700 Michael Pavone Fix bug in SAT cache address calculation that caused a crash in Strider II
Sat, 30 Apr 2016 16:19:57 -0700 Michael Pavone Added TODO for hardware checking
Sat, 30 Apr 2016 16:19:19 -0700 Michael Pavone Set sprite overflow flag if we completely consume sprite rendering capacity for the line even if there is nothing left to draw. This graphical corruption in the vertical stretching scroll section. Needs hardware confirmation.
Sat, 30 Apr 2016 15:31:48 -0700 Michael Pavone Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Sat, 30 Apr 2016 08:37:55 -0700 Michael Pavone Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Wed, 27 Apr 2016 23:57:00 -0700 Michael Pavone Properly emulate machine freeze when reading from VDP while configured for writes
Sun, 24 Apr 2016 14:30:15 -0700 Michael Pavone FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Sun, 24 Apr 2016 11:53:59 -0700 Michael Pavone Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Sun, 24 Apr 2016 02:19:48 -0700 Michael Pavone Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Sun, 24 Apr 2016 01:24:38 -0700 Michael Pavone Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Tue, 12 Apr 2016 21:38:24 -0700 Michael Pavone Remove the int number argument to vdp_int_ack since it is no longer used
Tue, 12 Apr 2016 08:35:44 -0700 Michael Pavone Fix VDP interrupt ack. Big thanks to Eke-Eke or whoever left that helpful comment in Genesis Plus GX. Fixes Fatal Rewind
Tue, 02 Feb 2016 18:33:00 -0800 Michael Pavone Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Tue, 02 Feb 2016 18:24:15 -0800 Michael Pavone Perform the same slot mapping shift for H32 mode as I did for H40
Thu, 28 Jan 2016 09:10:14 -0800 Michael Pavone Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Tue, 26 Jan 2016 19:23:10 -0800 Michael Pavone After reviewing the results of my test ROM again it seems pretty clear that the VBlank flag gets set at the same time as the vcounter changes
Sun, 17 Jan 2016 14:46:12 -0800 Michael Pavone Fix calculation of window start column when it's on the right side. This removes graphical glitches in Afterburner 2, Fireshark and Dungeons and Dragons: Warriors of the Eternal Sun and probably others
Fri, 13 Nov 2015 22:56:59 -0800 Michael Pavone Selecting a second game from the menu now works
Mon, 03 Aug 2015 20:06:56 -0700 Michael Pavone Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Fri, 17 Jul 2015 08:49:23 -0700 Michael Pavone Add ability to change start address for VRAM viewer. Fix handling of DMA enable flag when it comes to DMA fills. This fixes a bug in James Pond 3
Sun, 28 Jun 2015 09:53:17 -0700 Michael Pavone More clang warning cleanup
Sat, 30 May 2015 15:53:59 -0700 Michael Pavone Fixed shadow/highlight mode
Fri, 22 May 2015 18:38:44 -0700 Michael Pavone Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display
Thu, 21 May 2015 00:55:46 -0700 Michael Pavone Restore the other 2 debug display modes
Wed, 20 May 2015 22:27:51 -0700 Michael Pavone Add some tests for hint timing and fix it properly this time.
Wed, 20 May 2015 19:05:11 -0700 Michael Pavone Upgrade to SDL 2.0 and drop support for the non-OpenGL render path
Wed, 20 May 2015 10:35:03 -0700 Michael Pavone Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
Tue, 19 May 2015 23:23:53 -0700 Michael Pavone Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Sun, 17 May 2015 15:43:20 -0700 Michael Pavone Fix VDP status register PAL bit based on observations of the Titan Overdrive demo
Sat, 16 May 2015 23:08:07 -0700 Michael Pavone Adjust H32 vint slot in response to latest test ROM data
Sat, 16 May 2015 23:04:57 -0700 Michael Pavone First pass at emulating a vscroll latch. Titan's Overdrive demo seems to depend on the scroll value being latched early in the line before the HINT gets a chance to change it
Thu, 14 May 2015 23:17:55 -0700 Michael Pavone Small horizontal interrupt fixes
Wed, 13 May 2015 19:19:43 -0700 Michael Pavone Add description of cd register value to vr debugger command
Mon, 11 May 2015 20:30:35 -0700 Michael Pavone Fix frame counter increment and VINT cycle time calculation
Mon, 11 May 2015 00:28:47 -0700 Michael Pavone Sync fixes and logging to fix more sync issues
Sun, 04 Jan 2015 23:05:37 -0800 Michael Pavone Some small synchronization improvements that do not seem to fix anything
Sun, 04 Jan 2015 12:24:34 -0800 Michael Pavone Adjusted h40_hsync_cycles so that lines actually take 3420 mclks. Fixed vdp_cycles_next_line to take h40_sync_cycles into account
Sun, 14 Dec 2014 18:14:50 -0800 Michael Pavone Fix the HV counter and adjust the slots of certain VDP events
Thu, 14 Aug 2014 09:38:32 -0700 Michael Pavone Small fix to display of DMA source address in vr debug command
Wed, 18 Jun 2014 16:39:42 -0700 Michael Pavone Remove debug printf that escaped into my previous commit
Wed, 18 Jun 2014 16:30:19 -0700 Michael Pavone Fix most of the breakage caused by the vcounter/hcounter changes
Tue, 17 Jun 2014 19:01:01 -0700 Michael Pavone Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Mon, 16 Jun 2014 19:13:28 -0700 Michael Pavone Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Sat, 08 Feb 2014 23:37:09 -0800 Mike Pavone Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work.
Mon, 06 Jan 2014 22:54:05 -0800 Michael Pavone The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Thu, 31 Oct 2013 00:28:27 -0700 Mike Pavone Small optimization for H40 mode
Tue, 29 Oct 2013 00:03:11 -0700 Mike Pavone Merge
Mon, 07 Oct 2013 10:02:08 -0700 Mike Pavone Initial implementation of sprite overflow and sprite collision status register flags
Sun, 27 Oct 2013 01:29:50 -0700 Mike Pavone Basic OpenGL rendering is working opengl
Tue, 17 Sep 2013 19:10:00 -0700 Mike Pavone Set VBLANK flag in status register when display is disabled
Tue, 17 Sep 2013 09:45:14 -0700 Mike Pavone Implement HV counter latch
Tue, 17 Sep 2013 00:42:49 -0700 Mike Pavone Implement funny behavior for DMA fill to CRAM and VSRAM. Return VSRAM address 0 for reads to VSRAM at >= 40
Tue, 17 Sep 2013 00:11:45 -0700 Mike Pavone Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mon, 16 Sep 2013 09:44:22 -0700 Mike Pavone Partial fix for DMA copy
Sun, 15 Sep 2013 23:49:09 -0700 Mike Pavone Clear the low 2 bits of CD when a register is written to
Sun, 15 Sep 2013 23:40:18 -0700 Mike Pavone Don't allow register writes to regs above when in Mode 4
Sun, 15 Sep 2013 23:33:24 -0700 Mike Pavone Remove read pending stuff, that had been added in an attempt to fix CRAM/VSRAM undefined bit results. Set number of bits actually saved in VSRAM to 11
Sun, 15 Sep 2013 23:00:17 -0700 Mike Pavone Implement undocumented 8-bit VRAM read
Sun, 15 Sep 2013 22:43:01 -0700 Mike Pavone Fix VSRAM reads
Sun, 15 Sep 2013 22:20:43 -0700 Mike Pavone Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Fri, 13 Sep 2013 19:22:46 -0700 Mike Pavone Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Tue, 10 Sep 2013 23:31:08 -0700 Mike Pavone Added copyright notice to source files and added GPL license text in COPYING
Tue, 10 Sep 2013 09:55:12 -0700 Mike Pavone Fix timing of backdrop rendering when the display is turned off
Tue, 10 Sep 2013 00:30:39 -0700 Mike Pavone Merge
Tue, 10 Sep 2013 00:29:46 -0700 Mike Pavone Implement FIFO latency and improve DMA accuracy
Sun, 08 Sep 2013 20:48:33 -0700 Mike Pavone Revert change to VBLANK flag timing based on new direct color DMA test
Mon, 02 Sep 2013 01:02:18 -0700 Mike Pavone Fix per-column scrolling bug
Mon, 02 Sep 2013 00:20:56 -0700 Mike Pavone Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements.
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