log m68k_core.c @ 2493:b62336ceb626 default tip

age author description
Wed, 24 Jan 2024 18:51:44 -0800 Michael Pavone Avoid conflicts between watchpoints and normal debugger entry
Sat, 20 Jan 2024 21:16:04 -0800 Michael Pavone Fix off-by-one in watchpoint eval
Sat, 23 Dec 2023 23:03:31 -0800 Michael Pavone Implement watchpoints in Z80 debugger
Sat, 23 Dec 2023 22:11:43 -0800 Michael Pavone Oops, wrong type in sizeof for m68k_add_watchpoint
Sat, 23 Dec 2023 17:37:57 -0800 Michael Pavone Implement 68K watchpoints in internal debugger
Fri, 24 Nov 2023 14:44:01 -0800 Michael Pavone Fix regression in savestate loading
Mon, 16 Oct 2023 23:30:04 -0700 Michael Pavone Allow 68K to return mid-instruction. Adjust how 68K interrupt ack works so int2 busy flag timing is more correct. Fix some other SCD timing issues
Sat, 07 Oct 2023 18:04:35 -0700 Michael Pavone Fix some issues identified by asan/ubsan
Sun, 30 Oct 2022 12:04:29 -0700 Michael Pavone Use translate_out_of_bounds rather than defer_translation for addresses that lack native code size metadata
Mon, 05 Sep 2022 01:15:15 -0700 Michael Pavone Fix some 68K exception processing cycle times
Mon, 05 Sep 2022 00:49:03 -0700 Michael Pavone Fix bad 68K instruction timings revealed by Ti_'s test ROM, except those that involve exception timing
Sat, 20 Aug 2022 23:58:09 -0700 Michael Pavone Fix crash bug that caused a regression in Lunar: Eternal Blue
Wed, 30 Mar 2022 23:20:45 -0700 Michael Pavone Fix regression in Sonic & Knuckles
Thu, 17 Mar 2022 22:41:42 -0700 Michael Pavone Remove use of get_native_pointer in 68K instruction decoding in preparation for word RAM interleaving
Fri, 28 Jan 2022 22:47:51 -0800 Michael Pavone Update commented out CPU logging to differentiate between main and sub 68k segacd
Tue, 18 Jan 2022 00:03:50 -0800 Michael Pavone Implement enough of Sega CD gate array and Sub CPU to pass Sik's Mode 1 test ROM segacd
Sun, 19 Apr 2020 00:59:49 -0700 Michael Pavone Fix resuming 68K core when using interpreter mame_interp
Sat, 18 Apr 2020 11:42:53 -0700 Michael Pavone Merge from default mame_interp
Tue, 07 Jan 2020 22:52:27 -0800 Michael Pavone Reset 68K supervisor state and interrupt mask on soft reset
Thu, 14 Mar 2019 23:40:50 -0700 Michael Pavone Merge from default mame_interp
Mon, 11 Mar 2019 00:04:48 -0700 Michael Pavone Minor cleanup
Wed, 13 Mar 2019 22:01:22 -0700 Michael Pavone Get latency between interrupt latch and interrupt acceptance working with Musashi mame_interp
Wed, 13 Mar 2019 19:13:46 -0700 Michael Pavone Hopefully fix 68K serialization/deserialization with Musashi mame_interp
Tue, 12 Mar 2019 21:58:53 -0700 Michael Pavone Wrote a version of m68k_invalidate_code_range for interpreter build so that MMAP_PTR_IDX regions can safely get "fast" pointers mame_interp
Tue, 25 Dec 2018 11:12:26 -0800 Michael Pavone Merge from default mame_interp
Thu, 28 Jun 2018 09:27:05 -0700 Michael Pavone Fix a number of other memory errors (mostly leaks again) identified by valgrind
Fri, 22 Jun 2018 23:10:27 -0700 Michael Pavone Fix some memory errors (mostly leaks) identified by valgrind
Thu, 17 May 2018 00:43:16 -0700 Michael Pavone Fix instruction timing for a number of instructions with only a single operand
Sat, 30 Dec 2017 18:27:06 -0800 Michael Pavone Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME mame_interp
Wed, 27 Dec 2017 13:46:52 -0800 Michael Pavone Super hacky integration of the version of Musashi from MAME mame_interp
Tue, 21 Nov 2017 23:11:11 -0800 Michael Pavone Basic support for loading ROMs via Nuklear UI nuklear_ui
Fri, 08 Sep 2017 00:38:22 -0700 Michael Pavone Fix unlk for the a7 case
Wed, 06 Sep 2017 23:10:11 -0700 Michael Pavone Properly clear trace mode on interrupt or other exception. Fix NBCD with memory destination
Sun, 06 Aug 2017 00:06:36 -0700 Michael Pavone WIP - New savestate format
Fri, 19 May 2017 20:27:35 -0700 Michael Pavone Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move
Thu, 04 May 2017 21:06:35 -0700 Michael Pavone Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation
Mon, 24 Apr 2017 20:49:31 -0700 Michael Pavone Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Thu, 20 Apr 2017 22:28:58 -0700 Michael Pavone Fixed timing for RTS and RTE
Sat, 25 Mar 2017 00:21:32 -0700 Michael Pavone Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Wed, 15 Mar 2017 19:05:27 -0700 Michael Pavone Cycle accurate implementation of divs
Mon, 13 Mar 2017 23:14:13 -0700 Michael Pavone RESET is not a terminal instruction on the 68K. Fixes a crash bug in Chavez II and possibly other games
Thu, 09 Mar 2017 22:17:46 -0800 Michael Pavone Fix bug in handling of translating unmapped addresses
Fri, 03 Mar 2017 23:51:29 -0800 Michael Pavone Cycle accurate divu and undefined flags for overflow case
Thu, 23 Feb 2017 00:08:37 -0800 Michael Pavone WIP support for XBAND mapper hardware
Wed, 01 Feb 2017 19:33:11 -0800 Michael Pavone Fix regression in handling of unmapped memory addresses
Sun, 29 Jan 2017 00:15:18 -0800 Michael Pavone Implement extra read and fix movem timing generally
Wed, 28 Dec 2016 20:39:27 -0800 Michael Pavone Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Mon, 28 Nov 2016 22:45:46 -0800 Michael Pavone Clean up symbol visiblity and delete a ltitle bit of dead code
Thu, 06 Oct 2016 09:34:31 -0700 Michael Pavone Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Tue, 10 May 2016 21:26:27 -0700 Michael Pavone Fix PC value pushed to stack for A and F line traps
Thu, 28 Apr 2016 09:00:42 -0700 Michael Pavone Implemented A line and F line traps.
Wed, 27 Apr 2016 23:11:24 -0700 Michael Pavone Implement privelege violation exceptions
Wed, 27 Apr 2016 21:39:17 -0700 Michael Pavone Implemented IR and undefined bits of info word for address error exception frames
Wed, 27 Apr 2016 19:10:50 -0700 Michael Pavone Fix changes made to get_instruction_start and map_native_address to cope with being able to translate at odd addresses.
Tue, 26 Apr 2016 23:13:37 -0700 Michael Pavone Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Tue, 26 Apr 2016 00:07:15 -0700 Michael Pavone Implement illegal instruction trap
Sun, 24 Apr 2016 21:23:28 -0700 Michael Pavone Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First
Sun, 24 Apr 2016 02:19:48 -0700 Michael Pavone Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Sun, 24 Apr 2016 00:22:38 -0700 Michael Pavone Fix order of writes for move.l with a predec destination
Fri, 27 Nov 2015 13:10:02 -0800 Michael Pavone Fix a few lingering stack alignment rework bugs