Mercurial > repos > blastem
annotate m68k_core.c @ 1507:2455662378ed mame_interp
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
author | Michael Pavone <pavone@retrodev.com> |
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date | Sat, 30 Dec 2017 18:27:06 -0800 |
parents | ded16f3d7eb4 |
children | b7ecd0d6a77b |
rev | line source |
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Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
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1 /* |
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Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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2 Copyright 2014 Michael Pavone |
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Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #include "m68k_core.h" |
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Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
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7 #ifdef USE_NATIVE |
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8 #include "m68k_internal.h" |
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Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
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9 #endif |
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10 #include "68kinst.h" |
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11 #include "backend.h" |
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Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
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12 #ifdef USE_NATIVE |
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13 #include "gen.h" |
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14 #endif |
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Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
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15 #include "util.h" |
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WIP - New savestate format
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16 #include "serialize.h" |
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17 #ifndef USE_NATIVE |
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Super hacky integration of the version of Musashi from MAME
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18 #include "musashi/m68kcpu.h" |
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19 #endif |
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20 #include <stdio.h> |
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21 #include <stddef.h> |
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22 #include <stdlib.h> |
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23 #include <string.h> |
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24 |
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More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
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25 char disasm_buf[1024]; |
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Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
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26 #ifdef USE_NATIVE |
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27 int8_t native_reg(m68k_op_info * op, m68k_options * opts) |
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28 { |
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29 if (op->addr_mode == MODE_REG) { |
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30 return opts->dregs[op->params.regs.pri]; |
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31 } |
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32 if (op->addr_mode == MODE_AREG) { |
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33 return opts->aregs[op->params.regs.pri]; |
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34 } |
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35 return -1; |
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36 } |
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37 |
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More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
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38 size_t dreg_offset(uint8_t reg) |
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39 { |
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40 return offsetof(m68k_context, dregs) + sizeof(uint32_t) * reg; |
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41 } |
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42 |
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43 size_t areg_offset(uint8_t reg) |
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44 { |
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45 return offsetof(m68k_context, aregs) + sizeof(uint32_t) * reg; |
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46 } |
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47 |
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48 //must be called with an m68k_op_info that uses a register |
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49 size_t reg_offset(m68k_op_info *op) |
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50 { |
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51 return op->addr_mode == MODE_REG ? dreg_offset(op->params.regs.pri) : areg_offset(op->params.regs.pri); |
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52 } |
1507
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
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53 #endif |
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Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
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54 void m68k_print_regs(m68k_context * context) |
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55 { |
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56 printf("XNZVC\n%d%d%d%d%d\n", context->flags[0], context->flags[1], context->flags[2], context->flags[3], context->flags[4]); |
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57 for (int i = 0; i < 8; i++) { |
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58 printf("d%d: %X\n", i, context->dregs[i]); |
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59 } |
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60 for (int i = 0; i < 8; i++) { |
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61 printf("a%d: %X\n", i, context->aregs[i]); |
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62 } |
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63 } |
1507
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Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
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64 #ifdef USE_NATIVE |
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65 void m68k_read_size(m68k_options *opts, uint8_t size) |
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66 { |
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67 switch (size) |
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68 { |
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69 case OPSIZE_BYTE: |
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70 call(&opts->gen.code, opts->read_8); |
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71 break; |
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72 case OPSIZE_WORD: |
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73 call(&opts->gen.code, opts->read_16); |
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74 break; |
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75 case OPSIZE_LONG: |
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76 call(&opts->gen.code, opts->read_32); |
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77 break; |
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78 } |
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79 } |
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80 |
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81 void m68k_write_size(m68k_options *opts, uint8_t size, uint8_t lowfirst) |
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82 { |
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83 switch (size) |
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84 { |
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85 case OPSIZE_BYTE: |
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86 call(&opts->gen.code, opts->write_8); |
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87 break; |
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88 case OPSIZE_WORD: |
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89 call(&opts->gen.code, opts->write_16); |
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90 break; |
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91 case OPSIZE_LONG: |
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92 if (lowfirst) { |
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93 call(&opts->gen.code, opts->write_32_lowfirst); |
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94 } else { |
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95 call(&opts->gen.code, opts->write_32_highfirst); |
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96 } |
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97 break; |
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98 } |
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99 } |
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100 |
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Moved m68k_save_result to m68k_core.c
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101 void m68k_save_result(m68kinst * inst, m68k_options * opts) |
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Moved m68k_save_result to m68k_core.c
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102 { |
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103 if (inst->dst.addr_mode != MODE_REG && inst->dst.addr_mode != MODE_AREG && inst->dst.addr_mode != MODE_UNUSED) { |
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104 if (inst->dst.addr_mode == MODE_AREG_PREDEC && |
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Properly clear trace mode on interrupt or other exception. Fix NBCD with memory destination
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105 ((inst->src.addr_mode == MODE_AREG_PREDEC && inst->op != M68K_MOVE) || (inst->op == M68K_NBCD)) |
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106 ) { |
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107 areg_to_native(opts, inst->dst.params.regs.pri, opts->gen.scratch2); |
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108 } |
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109 m68k_write_size(opts, inst->extra.size, 1); |
688
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110 } |
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111 } |
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112 |
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113 static void translate_m68k_lea_pea(m68k_options * opts, m68kinst * inst) |
574
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114 { |
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115 code_info *code = &opts->gen.code; |
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116 int8_t dst_reg = inst->op == M68K_PEA ? opts->gen.scratch1 : native_reg(&(inst->dst), opts); |
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117 switch(inst->src.addr_mode) |
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118 { |
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119 case MODE_AREG_INDIRECT: |
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120 cycles(&opts->gen, BUS); |
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121 if (dst_reg >= 0) { |
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122 areg_to_native(opts, inst->src.params.regs.pri, dst_reg); |
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123 } else { |
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124 if (opts->aregs[inst->src.params.regs.pri] >= 0) { |
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125 native_to_areg(opts, opts->aregs[inst->src.params.regs.pri], inst->dst.params.regs.pri); |
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126 } else { |
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127 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1); |
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128 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri); |
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129 } |
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130 } |
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131 break; |
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132 case MODE_AREG_DISPLACE: |
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133 cycles(&opts->gen, 8); |
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134 calc_areg_displace(opts, &inst->src, dst_reg >= 0 ? dst_reg : opts->gen.scratch1); |
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135 if (dst_reg < 0) { |
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136 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri); |
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137 } |
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138 break; |
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139 case MODE_AREG_INDEX_DISP8: |
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140 cycles(&opts->gen, 12); |
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141 if (dst_reg < 0 || inst->dst.params.regs.pri == inst->src.params.regs.pri || inst->dst.params.regs.pri == (inst->src.params.regs.sec >> 1 & 0x7)) { |
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142 dst_reg = opts->gen.scratch1; |
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143 } |
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144 calc_areg_index_disp8(opts, &inst->src, dst_reg); |
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145 if (dst_reg == opts->gen.scratch1 && inst->op != M68K_PEA) { |
574
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146 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri); |
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147 } |
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148 break; |
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149 case MODE_PC_DISPLACE: |
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150 cycles(&opts->gen, 8); |
581
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151 if (inst->op == M68K_PEA) { |
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152 ldi_native(opts, inst->src.params.regs.displacement + inst->address+2, dst_reg); |
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153 } else { |
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154 ldi_areg(opts, inst->src.params.regs.displacement + inst->address+2, inst->dst.params.regs.pri); |
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155 } |
574
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156 break; |
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157 case MODE_PC_INDEX_DISP8: |
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158 cycles(&opts->gen, BUS*3); |
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159 if (dst_reg < 0 || inst->dst.params.regs.pri == (inst->src.params.regs.sec >> 1 & 0x7)) { |
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160 dst_reg = opts->gen.scratch1; |
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161 } |
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162 ldi_native(opts, inst->address+2, dst_reg); |
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163 calc_index_disp8(opts, &inst->src, dst_reg); |
581
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164 if (dst_reg == opts->gen.scratch1 && inst->op != M68K_PEA) { |
574
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165 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri); |
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166 } |
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167 break; |
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168 case MODE_ABSOLUTE: |
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169 case MODE_ABSOLUTE_SHORT: |
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170 cycles(&opts->gen, (inst->src.addr_mode == MODE_ABSOLUTE) ? BUS * 3 : BUS * 2); |
581
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171 if (inst->op == M68K_PEA) { |
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172 ldi_native(opts, inst->src.params.immed, dst_reg); |
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173 } else { |
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174 ldi_areg(opts, inst->src.params.immed, inst->dst.params.regs.pri); |
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175 } |
574
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176 break; |
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177 default: |
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178 m68k_disasm(inst, disasm_buf); |
792
724bbec47f86
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
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179 fatal_error("%X: %s\naddress mode %d not implemented (lea src)\n", inst->address, disasm_buf, inst->src.addr_mode); |
574
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180 } |
581
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181 if (inst->op == M68K_PEA) { |
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182 subi_areg(opts, 4, 7); |
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183 areg_to_native(opts, 7, opts->gen.scratch2); |
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184 call(code, opts->write_32_lowfirst); |
574
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185 } |
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186 } |
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187 |
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188 static void push_const(m68k_options *opts, int32_t value) |
574
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189 { |
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190 ldi_native(opts, value, opts->gen.scratch1); |
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191 subi_areg(opts, 4, 7); |
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192 areg_to_native(opts, 7, opts->gen.scratch2); |
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193 call(&opts->gen.code, opts->write_32_highfirst); |
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194 } |
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195 |
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196 void jump_m68k_abs(m68k_options * opts, uint32_t address) |
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197 { |
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198 code_info *code = &opts->gen.code; |
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199 code_ptr dest_addr = get_native_address(opts, address); |
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200 if (!dest_addr) { |
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201 opts->gen.deferred = defer_address(opts->gen.deferred, address, code->cur + 1); |
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202 //dummy address to be replaced later, make sure it generates a 4-byte displacement |
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203 dest_addr = code->cur + 256; |
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204 } |
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205 jmp(code, dest_addr); |
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206 //this used to call opts->native_addr for destinations in RAM, but that shouldn't be needed |
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207 //since instruction retranslation patches the original native instruction location |
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208 } |
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209 |
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210 static void translate_m68k_bsr(m68k_options * opts, m68kinst * inst) |
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211 { |
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212 code_info *code = &opts->gen.code; |
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213 int32_t disp = inst->src.params.immed; |
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214 uint32_t after = inst->address + (inst->variant == VAR_BYTE ? 2 : 4); |
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215 //TODO: Add cycles in the right place relative to pushing the return address on the stack |
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216 cycles(&opts->gen, 10); |
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217 push_const(opts, after); |
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218 jump_m68k_abs(opts, inst->address + 2 + disp); |
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219 } |
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220 |
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221 static void translate_m68k_jmp_jsr(m68k_options * opts, m68kinst * inst) |
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222 { |
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223 uint8_t is_jsr = inst->op == M68K_JSR; |
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224 code_info *code = &opts->gen.code; |
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225 code_ptr dest_addr; |
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226 uint8_t sec_reg; |
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227 uint32_t after; |
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228 uint32_t m68k_addr; |
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229 switch(inst->src.addr_mode) |
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230 { |
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231 case MODE_AREG_INDIRECT: |
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232 cycles(&opts->gen, BUS*2); |
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233 if (is_jsr) { |
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234 push_const(opts, inst->address+2); |
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235 } |
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236 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1); |
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237 call(code, opts->native_addr); |
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238 jmp_r(code, opts->gen.scratch1); |
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239 break; |
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240 case MODE_AREG_DISPLACE: |
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241 cycles(&opts->gen, BUS*2); |
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242 if (is_jsr) { |
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243 push_const(opts, inst->address+4); |
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244 } |
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245 calc_areg_displace(opts, &inst->src, opts->gen.scratch1); |
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246 call(code, opts->native_addr); |
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247 jmp_r(code, opts->gen.scratch1); |
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248 break; |
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249 case MODE_AREG_INDEX_DISP8: |
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250 cycles(&opts->gen, BUS*3);//TODO: CHeck that this is correct |
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251 if (is_jsr) { |
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252 push_const(opts, inst->address+4); |
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253 } |
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254 calc_areg_index_disp8(opts, &inst->src, opts->gen.scratch1); |
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255 call(code, opts->native_addr); |
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256 jmp_r(code, opts->gen.scratch1); |
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257 break; |
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258 case MODE_PC_DISPLACE: |
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259 //TODO: Add cycles in the right place relative to pushing the return address on the stack |
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260 cycles(&opts->gen, 10); |
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261 if (is_jsr) { |
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262 push_const(opts, inst->address+4); |
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263 } |
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264 jump_m68k_abs(opts, inst->src.params.regs.displacement + inst->address + 2); |
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265 break; |
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266 case MODE_PC_INDEX_DISP8: |
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267 cycles(&opts->gen, BUS*3);//TODO: CHeck that this is correct |
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268 if (is_jsr) { |
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269 push_const(opts, inst->address+4); |
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270 } |
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271 ldi_native(opts, inst->address+2, opts->gen.scratch1); |
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272 calc_index_disp8(opts, &inst->src, opts->gen.scratch1); |
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273 call(code, opts->native_addr); |
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274 jmp_r(code, opts->gen.scratch1); |
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275 break; |
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276 case MODE_ABSOLUTE: |
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277 case MODE_ABSOLUTE_SHORT: |
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278 //TODO: Add cycles in the right place relative to pushing the return address on the stack |
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279 cycles(&opts->gen, inst->src.addr_mode == MODE_ABSOLUTE ? 12 : 10); |
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280 if (is_jsr) { |
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281 push_const(opts, inst->address + (inst->src.addr_mode == MODE_ABSOLUTE ? 6 : 4)); |
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282 } |
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283 jump_m68k_abs(opts, inst->src.params.immed); |
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284 break; |
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285 default: |
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286 m68k_disasm(inst, disasm_buf); |
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287 fatal_error("%s\naddress mode %d not yet supported (%s)\n", disasm_buf, inst->src.addr_mode, is_jsr ? "jsr" : "jmp"); |
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288 } |
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289 } |
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290 |
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291 static void translate_m68k_unlk(m68k_options * opts, m68kinst * inst) |
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292 { |
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293 cycles(&opts->gen, BUS); |
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294 if (inst->dst.params.regs.pri != 7) { |
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295 areg_to_native(opts, inst->dst.params.regs.pri, opts->aregs[7]); |
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296 } |
574
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297 areg_to_native(opts, 7, opts->gen.scratch1); |
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298 call(&opts->gen.code, opts->read_32); |
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299 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri); |
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300 if (inst->dst.params.regs.pri != 7) { |
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301 addi_areg(opts, 4, 7); |
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302 } |
574
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303 } |
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304 |
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305 static void translate_m68k_link(m68k_options * opts, m68kinst * inst) |
574
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306 { |
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307 //compensate for displacement word |
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308 cycles(&opts->gen, BUS); |
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309 subi_areg(opts, 4, 7); |
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310 areg_to_native(opts, 7, opts->gen.scratch2); |
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311 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1); |
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312 call(&opts->gen.code, opts->write_32_highfirst); |
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313 native_to_areg(opts, opts->aregs[7], inst->src.params.regs.pri); |
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314 addi_areg(opts, inst->dst.params.immed, 7); |
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315 //prefetch |
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316 cycles(&opts->gen, BUS); |
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317 } |
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318 |
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319 static void translate_m68k_rts(m68k_options * opts, m68kinst * inst) |
574
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320 { |
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321 code_info *code = &opts->gen.code; |
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322 areg_to_native(opts, 7, opts->gen.scratch1); |
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323 addi_areg(opts, 4, 7); |
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324 call(code, opts->read_32); |
1323
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Fixed timing for RTS and RTE
Michael Pavone <pavone@retrodev.com>
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325 cycles(&opts->gen, 2*BUS); |
574
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326 call(code, opts->native_addr); |
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327 jmp_r(code, opts->gen.scratch1); |
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328 } |
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329 |
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Clean up symbol visiblity and delete a ltitle bit of dead code
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330 static void translate_m68k_rtr(m68k_options *opts, m68kinst * inst) |
574
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331 { |
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332 code_info *code = &opts->gen.code; |
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333 //Read saved CCR |
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334 areg_to_native(opts, 7, opts->gen.scratch1); |
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335 call(code, opts->read_16); |
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336 addi_areg(opts, 2, 7); |
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337 call(code, opts->set_ccr); |
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338 //Read saved PC |
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339 areg_to_native(opts, 7, opts->gen.scratch1); |
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340 call(code, opts->read_32); |
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341 addi_areg(opts, 4, 7); |
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342 //Get native address and jump to it |
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343 call(code, opts->native_addr); |
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344 jmp_r(code, opts->gen.scratch1); |
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345 } |
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346 |
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347 static void translate_m68k_trap(m68k_options *opts, m68kinst *inst) |
574
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348 { |
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349 code_info *code = &opts->gen.code; |
1027
276cd582b728
Fix PC value pushed to stack for A and F line traps
Michael Pavone <pavone@retrodev.com>
parents:
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diff
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|
350 uint32_t vector, pc = inst->address; |
992
261995d06897
Implemented A line and F line traps.
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|
351 switch (inst->op) |
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|
352 { |
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|
353 case M68K_TRAP: |
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|
354 vector = inst->src.params.immed + VECTOR_TRAP_0; |
1027
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Fix PC value pushed to stack for A and F line traps
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diff
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|
355 pc += 2; |
992
261995d06897
Implemented A line and F line traps.
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|
356 break; |
261995d06897
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|
357 case M68K_A_LINE_TRAP: |
261995d06897
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|
358 vector = VECTOR_LINE_1010; |
261995d06897
Implemented A line and F line traps.
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diff
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|
359 break; |
261995d06897
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diff
changeset
|
360 case M68K_F_LINE_TRAP: |
261995d06897
Implemented A line and F line traps.
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parents:
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diff
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|
361 vector = VECTOR_LINE_1111; |
261995d06897
Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents:
990
diff
changeset
|
362 break; |
261995d06897
Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents:
990
diff
changeset
|
363 } |
261995d06897
Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents:
990
diff
changeset
|
364 ldi_native(opts, vector, opts->gen.scratch2); |
1027
276cd582b728
Fix PC value pushed to stack for A and F line traps
Michael Pavone <pavone@retrodev.com>
parents:
992
diff
changeset
|
365 ldi_native(opts, pc, opts->gen.scratch1); |
574
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|
366 jmp(code, opts->trap); |
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|
367 } |
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|
368 |
1102
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|
369 static void translate_m68k_illegal(m68k_options *opts, m68kinst *inst) |
986
f680fe746a7d
Implement illegal instruction trap
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|
370 { |
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|
371 code_info *code = &opts->gen.code; |
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|
372 cycles(&opts->gen, BUS); |
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|
373 ldi_native(opts, VECTOR_ILLEGAL_INST, opts->gen.scratch2); |
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|
374 ldi_native(opts, inst->address, opts->gen.scratch1); |
f680fe746a7d
Implement illegal instruction trap
Michael Pavone <pavone@retrodev.com>
parents:
985
diff
changeset
|
375 jmp(code, opts->trap); |
f680fe746a7d
Implement illegal instruction trap
Michael Pavone <pavone@retrodev.com>
parents:
985
diff
changeset
|
376 } |
f680fe746a7d
Implement illegal instruction trap
Michael Pavone <pavone@retrodev.com>
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985
diff
changeset
|
377 |
1102
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Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
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1082
diff
changeset
|
378 static void translate_m68k_move_usp(m68k_options *opts, m68kinst *inst) |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
379 { |
990
33a46d35b913
Implement privelege violation exceptions
Michael Pavone <pavone@retrodev.com>
parents:
989
diff
changeset
|
380 m68k_trap_if_not_supervisor(opts, inst); |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
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|
381 cycles(&opts->gen, BUS); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
382 int8_t reg; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
383 if (inst->src.addr_mode == MODE_UNUSED) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
384 reg = native_reg(&inst->dst, opts); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
385 if (reg < 0) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
386 reg = opts->gen.scratch1; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
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|
387 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
388 areg_to_native(opts, 8, reg); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
389 if (reg == opts->gen.scratch1) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
390 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
581
diff
changeset
|
391 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
392 } else { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
393 reg = native_reg(&inst->src, opts); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
394 if (reg < 0) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
395 reg = opts->gen.scratch1; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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396 areg_to_native(opts, inst->src.params.regs.pri, reg); |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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397 } |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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398 native_to_areg(opts, reg, 8); |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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399 } |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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400 } |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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401 |
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402 static void translate_movem_regtomem_reglist(m68k_options * opts, m68kinst *inst) |
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403 { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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404 code_info *code = &opts->gen.code; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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405 int8_t bit,reg,dir; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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406 if (inst->dst.addr_mode == MODE_AREG_PREDEC) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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407 reg = 15; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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408 dir = -1; |
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409 } else { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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410 reg = 0; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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411 dir = 1; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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412 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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413 for(bit=0; reg < 16 && reg >= 0; reg += dir, bit++) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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414 if (inst->src.params.immed & (1 << bit)) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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415 if (inst->dst.addr_mode == MODE_AREG_PREDEC) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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416 subi_native(opts, (inst->extra.size == OPSIZE_LONG) ? 4 : 2, opts->gen.scratch2); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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417 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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418 push_native(opts, opts->gen.scratch2); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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419 if (reg > 7) { |
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420 areg_to_native(opts, reg-8, opts->gen.scratch1); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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421 } else { |
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422 dreg_to_native(opts, reg, opts->gen.scratch1); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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423 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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424 if (inst->extra.size == OPSIZE_LONG) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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425 call(code, opts->write_32_lowfirst); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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426 } else { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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427 call(code, opts->write_16); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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428 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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429 pop_native(opts, opts->gen.scratch2); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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430 if (inst->dst.addr_mode != MODE_AREG_PREDEC) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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431 addi_native(opts, (inst->extra.size == OPSIZE_LONG) ? 4 : 2, opts->gen.scratch2); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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432 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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433 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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434 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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435 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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436 |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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437 static void translate_movem_memtoreg_reglist(m68k_options * opts, m68kinst *inst) |
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438 { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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439 code_info *code = &opts->gen.code; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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440 for(uint8_t reg = 0; reg < 16; reg ++) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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441 if (inst->dst.params.immed & (1 << reg)) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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442 push_native(opts, opts->gen.scratch1); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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443 if (inst->extra.size == OPSIZE_LONG) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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444 call(code, opts->read_32); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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445 } else { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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446 call(code, opts->read_16); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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447 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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448 if (inst->extra.size == OPSIZE_WORD) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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449 sign_extend16_native(opts, opts->gen.scratch1); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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450 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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451 if (reg > 7) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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452 native_to_areg(opts, opts->gen.scratch1, reg-8); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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453 } else { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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454 native_to_dreg(opts, opts->gen.scratch1, reg); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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455 } |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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456 pop_native(opts, opts->gen.scratch1); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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457 addi_native(opts, (inst->extra.size == OPSIZE_LONG) ? 4 : 2, opts->gen.scratch1); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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458 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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459 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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460 } |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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461 |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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462 static code_ptr get_movem_impl(m68k_options *opts, m68kinst *inst) |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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463 { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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464 uint8_t reg_to_mem = inst->src.addr_mode == MODE_REG; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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465 uint8_t size = inst->extra.size; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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466 int8_t dir = reg_to_mem && inst->dst.addr_mode == MODE_AREG_PREDEC ? -1 : 1; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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467 uint16_t reglist = reg_to_mem ? inst->src.params.immed : inst->dst.params.immed; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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468 for (uint32_t i = 0; i < opts->num_movem; i++) |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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469 { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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470 if ( |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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471 opts->big_movem[i].reglist == reglist && opts->big_movem[i].reg_to_mem == reg_to_mem |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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472 && opts->big_movem[i].size == size && opts->big_movem[i].dir == dir |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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473 ) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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474 return opts->big_movem[i].impl; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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475 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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476 } |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
477 if (opts->num_movem == opts->movem_storage) { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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parents:
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changeset
|
478 opts->movem_storage *= 2; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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diff
changeset
|
479 opts->big_movem = realloc(opts->big_movem, sizeof(movem_fun) * opts->movem_storage); |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
480 } |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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changeset
|
481 if (!opts->extra_code.cur) { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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changeset
|
482 init_code_info(&opts->extra_code); |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
483 } |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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changeset
|
484 check_alloc_code(&opts->extra_code, 512); |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
485 code_ptr impl = opts->extra_code.cur; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
486 code_info tmp = opts->gen.code; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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changeset
|
487 opts->gen.code = opts->extra_code; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
488 if (reg_to_mem) { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
489 translate_movem_regtomem_reglist(opts, inst); |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
490 } else { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
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changeset
|
491 translate_movem_memtoreg_reglist(opts, inst); |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
492 } |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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changeset
|
493 opts->extra_code = opts->gen.code; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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changeset
|
494 opts->gen.code = tmp; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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parents:
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diff
changeset
|
495 |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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changeset
|
496 rts(&opts->extra_code); |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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parents:
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changeset
|
497 return impl; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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parents:
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diff
changeset
|
498 } |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
499 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1082
diff
changeset
|
500 static void translate_m68k_movem(m68k_options * opts, m68kinst * inst) |
588
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
501 { |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
502 code_info *code = &opts->gen.code; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
503 uint8_t early_cycles; |
1298
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
504 uint16_t num_regs = inst->src.addr_mode == MODE_REG ? inst->src.params.immed : inst->dst.params.immed; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
505 { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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parents:
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diff
changeset
|
506 //TODO: Move this popcount alg to a utility function |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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parents:
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diff
changeset
|
507 uint16_t a = (num_regs & 0b1010101010101010) >> 1; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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parents:
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diff
changeset
|
508 uint16_t b = num_regs & 0b0101010101010101; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
509 num_regs = a + b; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
510 a = (num_regs & 0b1100110011001100) >> 2; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
511 b = num_regs & 0b0011001100110011; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
512 num_regs = a + b; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
513 a = (num_regs & 0b1111000011110000) >> 4; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
514 b = num_regs & 0b0000111100001111; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
515 num_regs = a + b; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
516 a = (num_regs & 0b1111111100000000) >> 8; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
517 b = num_regs & 0b0000000011111111; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
518 num_regs = a + b; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
519 } |
588
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
520 if(inst->src.addr_mode == MODE_REG) { |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
521 //reg to mem |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
522 early_cycles = 8; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
523 switch (inst->dst.addr_mode) |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
524 { |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
525 case MODE_AREG_INDIRECT: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
526 case MODE_AREG_PREDEC: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
527 areg_to_native(opts, inst->dst.params.regs.pri, opts->gen.scratch2); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
528 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
529 case MODE_AREG_DISPLACE: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
530 early_cycles += BUS; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
531 calc_areg_displace(opts, &inst->dst, opts->gen.scratch2); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
532 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
533 case MODE_AREG_INDEX_DISP8: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
534 early_cycles += 6; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
535 calc_areg_index_disp8(opts, &inst->dst, opts->gen.scratch2); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
536 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
537 case MODE_PC_DISPLACE: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
538 early_cycles += BUS; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
539 ldi_native(opts, inst->dst.params.regs.displacement + inst->address+2, opts->gen.scratch2); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
540 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
541 case MODE_PC_INDEX_DISP8: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
542 early_cycles += 6; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
543 ldi_native(opts, inst->address+2, opts->gen.scratch2); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
544 calc_index_disp8(opts, &inst->dst, opts->gen.scratch2); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
545 case MODE_ABSOLUTE: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
546 early_cycles += 4; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
547 case MODE_ABSOLUTE_SHORT: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
548 early_cycles += 4; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
549 ldi_native(opts, inst->dst.params.immed, opts->gen.scratch2); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
550 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
551 default: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
552 m68k_disasm(inst, disasm_buf); |
792
724bbec47f86
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents:
726
diff
changeset
|
553 fatal_error("%X: %s\naddress mode %d not implemented (movem dst)\n", inst->address, disasm_buf, inst->dst.addr_mode); |
588
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
554 } |
1298
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
555 |
588
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
556 cycles(&opts->gen, early_cycles); |
1298
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
557 if (num_regs <= 9) { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
558 translate_movem_regtomem_reglist(opts, inst); |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
559 } else { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
560 call(code, get_movem_impl(opts, inst)); |
588
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
561 } |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
562 if (inst->dst.addr_mode == MODE_AREG_PREDEC) { |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
563 native_to_areg(opts, opts->gen.scratch2, inst->dst.params.regs.pri); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
564 } |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
565 } else { |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
566 //mem to reg |
1212
191ac490fb3d
Implement extra read and fix movem timing generally
Michael Pavone <pavone@retrodev.com>
parents:
1130
diff
changeset
|
567 early_cycles = 8; //includes prefetch |
588
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
568 switch (inst->src.addr_mode) |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
569 { |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
570 case MODE_AREG_INDIRECT: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
571 case MODE_AREG_POSTINC: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
572 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
573 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
574 case MODE_AREG_DISPLACE: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
575 early_cycles += BUS; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
576 calc_areg_displace(opts, &inst->src, opts->gen.scratch1); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
577 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
578 case MODE_AREG_INDEX_DISP8: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
579 early_cycles += 6; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
580 calc_areg_index_disp8(opts, &inst->src, opts->gen.scratch1); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
581 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
582 case MODE_PC_DISPLACE: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
583 early_cycles += BUS; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
584 ldi_native(opts, inst->src.params.regs.displacement + inst->address+2, opts->gen.scratch1); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
585 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
586 case MODE_PC_INDEX_DISP8: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
587 early_cycles += 6; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
588 ldi_native(opts, inst->address+2, opts->gen.scratch1); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
589 calc_index_disp8(opts, &inst->src, opts->gen.scratch1); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
590 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
591 case MODE_ABSOLUTE: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
592 early_cycles += 4; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
593 case MODE_ABSOLUTE_SHORT: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
594 early_cycles += 4; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
595 ldi_native(opts, inst->src.params.immed, opts->gen.scratch1); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
596 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
597 default: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
598 m68k_disasm(inst, disasm_buf); |
792
724bbec47f86
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents:
726
diff
changeset
|
599 fatal_error("%X: %s\naddress mode %d not implemented (movem src)\n", inst->address, disasm_buf, inst->src.addr_mode); |
588
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
600 } |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
601 cycles(&opts->gen, early_cycles); |
1298
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
602 |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
603 if (num_regs <= 9) { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
604 translate_movem_memtoreg_reglist(opts, inst); |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
605 } else { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
606 call(code, get_movem_impl(opts, inst)); |
588
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
607 } |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
608 if (inst->src.addr_mode == MODE_AREG_POSTINC) { |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
609 native_to_areg(opts, opts->gen.scratch1, inst->src.params.regs.pri); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
610 } |
1212
191ac490fb3d
Implement extra read and fix movem timing generally
Michael Pavone <pavone@retrodev.com>
parents:
1130
diff
changeset
|
611 //Extra read |
191ac490fb3d
Implement extra read and fix movem timing generally
Michael Pavone <pavone@retrodev.com>
parents:
1130
diff
changeset
|
612 call(code, opts->read_16); |
588
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
613 } |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
614 } |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
615 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1082
diff
changeset
|
616 static void translate_m68k_nop(m68k_options *opts, m68kinst *inst) |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
617 { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
618 cycles(&opts->gen, BUS); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
619 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
620 |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
621 void swap_ssp_usp(m68k_options * opts) |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
622 { |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
623 areg_to_native(opts, 7, opts->gen.scratch2); |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
624 areg_to_native(opts, 8, opts->aregs[7]); |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
625 native_to_areg(opts, opts->gen.scratch2, 8); |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
626 } |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
627 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1082
diff
changeset
|
628 static void translate_m68k_rte(m68k_options *opts, m68kinst *inst) |
687
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
629 { |
990
33a46d35b913
Implement privelege violation exceptions
Michael Pavone <pavone@retrodev.com>
parents:
989
diff
changeset
|
630 m68k_trap_if_not_supervisor(opts, inst); |
33a46d35b913
Implement privelege violation exceptions
Michael Pavone <pavone@retrodev.com>
parents:
989
diff
changeset
|
631 |
687
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
632 code_info *code = &opts->gen.code; |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
633 //Read saved SR |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
634 areg_to_native(opts, 7, opts->gen.scratch1); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
635 call(code, opts->read_16); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
636 addi_areg(opts, 2, 7); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
637 call(code, opts->set_sr); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
638 //Read saved PC |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
639 areg_to_native(opts, 7, opts->gen.scratch1); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
640 call(code, opts->read_32); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
641 addi_areg(opts, 4, 7); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
642 check_user_mode_swap_ssp_usp(opts); |
1323
c9dc2603b087
Fixed timing for RTS and RTE
Michael Pavone <pavone@retrodev.com>
parents:
1298
diff
changeset
|
643 cycles(&opts->gen, 2*BUS); |
687
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
644 //Get native address, sync components, recalculate integer points and jump to returned address |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
645 call(code, opts->native_addr_and_sync); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
646 jmp_r(code, opts->gen.scratch1); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
647 } |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
648 |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
649 code_ptr get_native_address(m68k_options *opts, uint32_t address) |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
650 { |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
651 native_map_slot * native_code_map = opts->gen.native_code_map; |
987
1f09994e92c5
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents:
986
diff
changeset
|
652 |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
653 memmap_chunk const *mem_chunk = find_map_chunk(address, &opts->gen, 0, NULL); |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
654 if (mem_chunk) { |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
655 //calculate the lowest alias for this address |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
656 address = mem_chunk->start + ((address - mem_chunk->start) & mem_chunk->mask); |
1214
afa3d0a227ae
Fix regression in handling of unmapped memory addresses
Michael Pavone <pavone@retrodev.com>
parents:
1212
diff
changeset
|
657 } else { |
afa3d0a227ae
Fix regression in handling of unmapped memory addresses
Michael Pavone <pavone@retrodev.com>
parents:
1212
diff
changeset
|
658 address &= opts->gen.address_mask; |
985
751280fb4494
Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
659 } |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
660 uint32_t chunk = address / NATIVE_CHUNK_SIZE; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
661 if (!native_code_map[chunk].base) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
662 return NULL; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
663 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
664 uint32_t offset = address % NATIVE_CHUNK_SIZE; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
665 if (native_code_map[chunk].offsets[offset] == INVALID_OFFSET || native_code_map[chunk].offsets[offset] == EXTENSION_WORD) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
666 return NULL; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
667 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
668 return native_code_map[chunk].base + native_code_map[chunk].offsets[offset]; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
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|
669 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
670 |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
671 code_ptr get_native_from_context(m68k_context * context, uint32_t address) |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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parents:
diff
changeset
|
672 { |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
673 return get_native_address(context->options, address); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
674 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
675 |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
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parents:
1102
diff
changeset
|
676 uint32_t get_instruction_start(m68k_options *opts, uint32_t address) |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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parents:
diff
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|
677 { |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
678 native_map_slot * native_code_map = opts->gen.native_code_map; |
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Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
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parents:
1102
diff
changeset
|
679 memmap_chunk const *mem_chunk = find_map_chunk(address, &opts->gen, 0, NULL); |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
680 if (mem_chunk) { |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
681 //calculate the lowest alias for this address |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
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parents:
1102
diff
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|
682 address = mem_chunk->start + ((address - mem_chunk->start) & mem_chunk->mask); |
1214
afa3d0a227ae
Fix regression in handling of unmapped memory addresses
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1212
diff
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|
683 } else { |
afa3d0a227ae
Fix regression in handling of unmapped memory addresses
Michael Pavone <pavone@retrodev.com>
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1212
diff
changeset
|
684 address &= opts->gen.address_mask; |
985
751280fb4494
Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
685 } |
751280fb4494
Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
686 |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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parents:
diff
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|
687 uint32_t chunk = address / NATIVE_CHUNK_SIZE; |
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Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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parents:
diff
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|
688 if (!native_code_map[chunk].base) { |
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Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
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|
689 return 0; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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parents:
diff
changeset
|
690 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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parents:
diff
changeset
|
691 uint32_t offset = address % NATIVE_CHUNK_SIZE; |
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Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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parents:
diff
changeset
|
692 if (native_code_map[chunk].offsets[offset] == INVALID_OFFSET) { |
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Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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parents:
diff
changeset
|
693 return 0; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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parents:
diff
changeset
|
694 } |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
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parents:
1102
diff
changeset
|
695 while (native_code_map[chunk].offsets[offset] == EXTENSION_WORD) |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
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parents:
1102
diff
changeset
|
696 { |
570
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parents:
diff
changeset
|
697 --address; |
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Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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parents:
diff
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|
698 chunk = address / NATIVE_CHUNK_SIZE; |
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Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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parents:
diff
changeset
|
699 offset = address % NATIVE_CHUNK_SIZE; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
700 } |
988
ce9df7a5fdf2
Fix changes made to get_instruction_start and map_native_address to cope with being able to translate at odd addresses.
Michael Pavone <pavone@retrodev.com>
parents:
987
diff
changeset
|
701 return address; |
570
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Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
702 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
703 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1082
diff
changeset
|
704 static void map_native_address(m68k_context * context, uint32_t address, code_ptr native_addr, uint8_t size, uint8_t native_size) |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
705 { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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parents:
diff
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|
706 m68k_options * opts = context->options; |
1130
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Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
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diff
changeset
|
707 native_map_slot * native_code_map = opts->gen.native_code_map; |
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Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
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parents:
1102
diff
changeset
|
708 uint32_t meta_off; |
1228
2e6dcb5c11a2
WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents:
1214
diff
changeset
|
709 memmap_chunk const *mem_chunk = find_map_chunk(address, &opts->gen, MMAP_CODE, &meta_off); |
1130
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Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
710 if (mem_chunk) { |
1228
2e6dcb5c11a2
WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents:
1214
diff
changeset
|
711 if (mem_chunk->flags & MMAP_CODE) { |
2e6dcb5c11a2
WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents:
1214
diff
changeset
|
712 uint32_t masked = (address - mem_chunk->start) & mem_chunk->mask; |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
713 uint32_t final_off = masked + meta_off; |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
714 uint32_t ram_flags_off = final_off >> (opts->gen.ram_flags_shift + 3); |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
715 context->ram_code_flags[ram_flags_off] |= 1 << ((final_off >> opts->gen.ram_flags_shift) & 7); |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
688
diff
changeset
|
716 |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
717 uint32_t slot = final_off / 1024; |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
718 if (!opts->gen.ram_inst_sizes[slot]) { |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
719 opts->gen.ram_inst_sizes[slot] = malloc(sizeof(uint8_t) * 512); |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
720 } |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
721 opts->gen.ram_inst_sizes[slot][(final_off/2) & 511] = native_size; |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
688
diff
changeset
|
722 |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
723 //TODO: Deal with case in which end of instruction is in a different memory chunk |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
724 masked = (address + size - 1) & mem_chunk->mask; |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
725 final_off = masked + meta_off; |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
726 ram_flags_off = final_off >> (opts->gen.ram_flags_shift + 3); |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
727 context->ram_code_flags[ram_flags_off] |= 1 << ((final_off >> opts->gen.ram_flags_shift) & 7); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
728 } |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
729 //calculate the lowest alias for this address |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
730 address = mem_chunk->start + ((address - mem_chunk->start) & mem_chunk->mask); |
1214
afa3d0a227ae
Fix regression in handling of unmapped memory addresses
Michael Pavone <pavone@retrodev.com>
parents:
1212
diff
changeset
|
731 } else { |
afa3d0a227ae
Fix regression in handling of unmapped memory addresses
Michael Pavone <pavone@retrodev.com>
parents:
1212
diff
changeset
|
732 address &= opts->gen.address_mask; |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
733 } |
987
1f09994e92c5
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents:
986
diff
changeset
|
734 |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
735 uint32_t chunk = address / NATIVE_CHUNK_SIZE; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
736 if (!native_code_map[chunk].base) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
737 native_code_map[chunk].base = native_addr; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
738 native_code_map[chunk].offsets = malloc(sizeof(int32_t) * NATIVE_CHUNK_SIZE); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
739 memset(native_code_map[chunk].offsets, 0xFF, sizeof(int32_t) * NATIVE_CHUNK_SIZE); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
740 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
741 uint32_t offset = address % NATIVE_CHUNK_SIZE; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
742 native_code_map[chunk].offsets[offset] = native_addr-native_code_map[chunk].base; |
988
ce9df7a5fdf2
Fix changes made to get_instruction_start and map_native_address to cope with being able to translate at odd addresses.
Michael Pavone <pavone@retrodev.com>
parents:
987
diff
changeset
|
743 for(address++,size-=1; size; address++,size-=1) { |
ce9df7a5fdf2
Fix changes made to get_instruction_start and map_native_address to cope with being able to translate at odd addresses.
Michael Pavone <pavone@retrodev.com>
parents:
987
diff
changeset
|
744 address &= opts->gen.address_mask; |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
745 chunk = address / NATIVE_CHUNK_SIZE; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
746 offset = address % NATIVE_CHUNK_SIZE; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
747 if (!native_code_map[chunk].base) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
748 native_code_map[chunk].base = native_addr; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
749 native_code_map[chunk].offsets = malloc(sizeof(int32_t) * NATIVE_CHUNK_SIZE); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
750 memset(native_code_map[chunk].offsets, 0xFF, sizeof(int32_t) * NATIVE_CHUNK_SIZE); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
751 } |
713
f9b80a78d9a6
Don't overwrite an instruction offset mapping with an extension word value. I really need the ability for a word to be mapped to more than one instruction, but this will be more correct for now
Michael Pavone <pavone@retrodev.com>
parents:
706
diff
changeset
|
752 if (native_code_map[chunk].offsets[offset] == INVALID_OFFSET) { |
f9b80a78d9a6
Don't overwrite an instruction offset mapping with an extension word value. I really need the ability for a word to be mapped to more than one instruction, but this will be more correct for now
Michael Pavone <pavone@retrodev.com>
parents:
706
diff
changeset
|
753 //TODO: Better handling of overlapping instructions |
f9b80a78d9a6
Don't overwrite an instruction offset mapping with an extension word value. I really need the ability for a word to be mapped to more than one instruction, but this will be more correct for now
Michael Pavone <pavone@retrodev.com>
parents:
706
diff
changeset
|
754 native_code_map[chunk].offsets[offset] = EXTENSION_WORD; |
f9b80a78d9a6
Don't overwrite an instruction offset mapping with an extension word value. I really need the ability for a word to be mapped to more than one instruction, but this will be more correct for now
Michael Pavone <pavone@retrodev.com>
parents:
706
diff
changeset
|
755 } |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
756 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
757 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
758 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1082
diff
changeset
|
759 static uint8_t get_native_inst_size(m68k_options * opts, uint32_t address) |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
760 { |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
761 uint32_t meta_off; |
1228
2e6dcb5c11a2
WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents:
1214
diff
changeset
|
762 memmap_chunk const *chunk = find_map_chunk(address, &opts->gen, MMAP_CODE, &meta_off); |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
763 if (chunk) { |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
764 meta_off += (address - chunk->start) & chunk->mask; |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
765 } |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
688
diff
changeset
|
766 uint32_t slot = meta_off/1024; |
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
688
diff
changeset
|
767 return opts->gen.ram_inst_sizes[slot][(meta_off/2)%512]; |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
768 } |
1507
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
769 #endif |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
770 |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
771 uint8_t m68k_is_terminal(m68kinst * inst) |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
772 { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
773 return inst->op == M68K_RTS || inst->op == M68K_RTE || inst->op == M68K_RTR || inst->op == M68K_JMP |
1279
996eb76d6da1
RESET is not a terminal instruction on the 68K. Fixes a crash bug in Chavez II and possibly other games
Michael Pavone <pavone@retrodev.com>
parents:
1275
diff
changeset
|
774 || inst->op == M68K_TRAP || inst->op == M68K_ILLEGAL || inst->op == M68K_INVALID |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
775 || (inst->op == M68K_BCC && inst->extra.cond == COND_TRUE); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
776 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
777 |
1507
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
778 #ifdef USE_NATIVE |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1082
diff
changeset
|
779 static void m68k_handle_deferred(m68k_context * context) |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
780 { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
781 m68k_options * opts = context->options; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
782 process_deferred(&opts->gen.deferred, context, (native_addr_func)get_native_from_context); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
783 if (opts->gen.deferred) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
784 translate_m68k_stream(opts->gen.deferred->address, context); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
785 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
786 } |
1507
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
787 #endif |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
788 |
989
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
789 uint16_t m68k_get_ir(m68k_context *context) |
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
790 { |
1507
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
791 #ifdef USE_NATIVE |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
792 uint32_t inst_addr = get_instruction_start(context->options, context->last_prefetch_address-2); |
989
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
793 uint16_t *native_addr = get_native_pointer(inst_addr, (void **)context->mem_pointers, &context->options->gen); |
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
794 if (native_addr) { |
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
795 return *native_addr; |
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
796 } |
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
797 fprintf(stderr, "M68K: Failed to calculate value of IR. Last prefetch address: %X\n", context->last_prefetch_address); |
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
798 return 0xFFFF; |
1507
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
799 #else |
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
800 return ((m68000_base_device *)context)->ir; |
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
801 #endif |
989
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
802 } |
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
803 |
1329
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
804 static m68k_debug_handler find_breakpoint(m68k_context *context, uint32_t address) |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
805 { |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
806 for (uint32_t i = 0; i < context->num_breakpoints; i++) |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
807 { |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
808 if (context->breakpoints[i].address == address) { |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
809 return context->breakpoints[i].handler; |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
810 } |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
811 } |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
812 return NULL; |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
813 } |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
814 |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
815 void insert_breakpoint(m68k_context * context, uint32_t address, m68k_debug_handler bp_handler) |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
816 { |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
817 if (!find_breakpoint(context, address)) { |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
818 if (context->bp_storage == context->num_breakpoints) { |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
819 context->bp_storage *= 2; |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
820 if (context->bp_storage < 4) { |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
821 context->bp_storage = 4; |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
822 } |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
823 context->breakpoints = realloc(context->breakpoints, context->bp_storage * sizeof(m68k_breakpoint)); |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
824 } |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
825 context->breakpoints[context->num_breakpoints++] = (m68k_breakpoint){ |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
826 .handler = bp_handler, |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
827 .address = address |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
828 }; |
1507
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
829 #ifdef USE_NATIVE |
1329
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
830 m68k_breakpoint_patch(context, address, bp_handler, NULL); |
1507
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
831 #endif |
1329
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
832 } |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
833 } |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
834 |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
835 m68k_context *m68k_bp_dispatcher(m68k_context *context, uint32_t address) |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
836 { |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
837 m68k_debug_handler handler = find_breakpoint(context, address); |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
838 if (handler) { |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
839 handler(context, address); |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
840 } else { |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
841 //spurious breakoint? |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
842 warning("Spurious breakpoing at %X\n", address); |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
843 remove_breakpoint(context, address); |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
844 } |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
845 |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
846 return context; |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
847 } |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
848 |
1507
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
849 #ifdef USE_NATIVE |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
850 typedef enum { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
851 RAW_FUNC = 1, |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
852 BINARY_ARITH, |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
853 UNARY_ARITH, |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
854 OP_FUNC |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
855 } impl_type; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
856 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
857 typedef void (*raw_fun)(m68k_options * opts, m68kinst *inst); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
858 typedef void (*op_fun)(m68k_options * opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
859 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
860 typedef struct { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
861 union { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
862 raw_fun raw; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
863 uint32_t flag_mask; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
864 op_fun op; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
865 } impl; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
866 impl_type itype; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
867 } impl_info; |
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868 |
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869 #define RAW_IMPL(inst, fun) [inst] = { .impl = { .raw = fun }, .itype = RAW_FUNC } |
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870 #define OP_IMPL(inst, fun) [inst] = { .impl = { .op = fun }, .itype = OP_FUNC } |
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871 #define UNARY_IMPL(inst, mask) [inst] = { .impl = { .flag_mask = mask }, .itype = UNARY_ARITH } |
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872 #define BINARY_IMPL(inst, mask) [inst] = { .impl = { .flag_mask = mask}, .itype = BINARY_ARITH } |
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|
873 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
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|
874 static impl_info m68k_impls[] = { |
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|
875 //math |
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876 BINARY_IMPL(M68K_ADD, X|N|Z|V|C), |
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877 BINARY_IMPL(M68K_SUB, X|N|Z|V|C), |
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|
878 //z flag is special cased for ADDX/SUBX |
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879 BINARY_IMPL(M68K_ADDX, X|N|V|C), |
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|
880 BINARY_IMPL(M68K_SUBX, X|N|V|C), |
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|
881 OP_IMPL(M68K_ABCD, translate_m68k_abcd_sbcd), |
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|
882 OP_IMPL(M68K_SBCD, translate_m68k_abcd_sbcd), |
834 | 883 OP_IMPL(M68K_NBCD, translate_m68k_abcd_sbcd), |
582
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884 BINARY_IMPL(M68K_AND, N|Z|V0|C0), |
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885 BINARY_IMPL(M68K_EOR, N|Z|V0|C0), |
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886 BINARY_IMPL(M68K_OR, N|Z|V0|C0), |
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887 RAW_IMPL(M68K_CMP, translate_m68k_cmp), |
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888 OP_IMPL(M68K_DIVS, translate_m68k_div), |
1282
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|
889 OP_IMPL(M68K_DIVU, translate_m68k_div), |
582
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890 OP_IMPL(M68K_MULS, translate_m68k_mul), |
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891 OP_IMPL(M68K_MULU, translate_m68k_mul), |
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892 RAW_IMPL(M68K_EXT, translate_m68k_ext), |
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893 UNARY_IMPL(M68K_NEG, X|N|Z|V|C), |
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|
894 OP_IMPL(M68K_NEGX, translate_m68k_negx), |
614
60a06c025103
Fix flag mask for m68k not
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parents:
588
diff
changeset
|
895 UNARY_IMPL(M68K_NOT, N|Z|V|C), |
582
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|
896 UNARY_IMPL(M68K_TST, N|Z|V0|C0), |
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|
897 |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
898 //shift/rotate |
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|
899 OP_IMPL(M68K_ASL, translate_m68k_sl), |
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|
900 OP_IMPL(M68K_LSL, translate_m68k_sl), |
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|
901 OP_IMPL(M68K_ASR, translate_m68k_asr), |
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|
902 OP_IMPL(M68K_LSR, translate_m68k_lsr), |
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|
903 OP_IMPL(M68K_ROL, translate_m68k_rot), |
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|
904 OP_IMPL(M68K_ROR, translate_m68k_rot), |
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|
905 OP_IMPL(M68K_ROXL, translate_m68k_rot), |
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|
906 OP_IMPL(M68K_ROXR, translate_m68k_rot), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
907 UNARY_IMPL(M68K_SWAP, N|Z|V0|C0), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
908 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
909 //bit |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
910 OP_IMPL(M68K_BCHG, translate_m68k_bit), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
911 OP_IMPL(M68K_BCLR, translate_m68k_bit), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
912 OP_IMPL(M68K_BSET, translate_m68k_bit), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
913 OP_IMPL(M68K_BTST, translate_m68k_bit), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
914 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
915 //data movement |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
916 RAW_IMPL(M68K_MOVE, translate_m68k_move), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
917 RAW_IMPL(M68K_MOVEM, translate_m68k_movem), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
918 RAW_IMPL(M68K_MOVEP, translate_m68k_movep), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
919 RAW_IMPL(M68K_MOVE_USP, translate_m68k_move_usp), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
920 RAW_IMPL(M68K_LEA, translate_m68k_lea_pea), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
921 RAW_IMPL(M68K_PEA, translate_m68k_lea_pea), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
922 RAW_IMPL(M68K_CLR, translate_m68k_clr), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
923 OP_IMPL(M68K_EXG, translate_m68k_exg), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
924 RAW_IMPL(M68K_SCC, translate_m68k_scc), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
925 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
926 //function calls and branches |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
927 RAW_IMPL(M68K_BCC, translate_m68k_bcc), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
928 RAW_IMPL(M68K_BSR, translate_m68k_bsr), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
929 RAW_IMPL(M68K_DBCC, translate_m68k_dbcc), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
930 RAW_IMPL(M68K_JMP, translate_m68k_jmp_jsr), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
931 RAW_IMPL(M68K_JSR, translate_m68k_jmp_jsr), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
932 RAW_IMPL(M68K_RTS, translate_m68k_rts), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
933 RAW_IMPL(M68K_RTE, translate_m68k_rte), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
934 RAW_IMPL(M68K_RTR, translate_m68k_rtr), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
935 RAW_IMPL(M68K_LINK, translate_m68k_link), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
936 RAW_IMPL(M68K_UNLK, translate_m68k_unlk), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
937 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
938 //SR/CCR stuff |
584
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
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diff
changeset
|
939 RAW_IMPL(M68K_ANDI_CCR, translate_m68k_andi_ori_ccr_sr), |
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
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|
940 RAW_IMPL(M68K_ANDI_SR, translate_m68k_andi_ori_ccr_sr), |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
941 RAW_IMPL(M68K_EORI_CCR, translate_m68k_eori_ccr_sr), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
942 RAW_IMPL(M68K_EORI_SR, translate_m68k_eori_ccr_sr), |
584
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
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diff
changeset
|
943 RAW_IMPL(M68K_ORI_CCR, translate_m68k_andi_ori_ccr_sr), |
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
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diff
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|
944 RAW_IMPL(M68K_ORI_SR, translate_m68k_andi_ori_ccr_sr), |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
945 OP_IMPL(M68K_MOVE_CCR, translate_m68k_move_ccr_sr), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
946 OP_IMPL(M68K_MOVE_SR, translate_m68k_move_ccr_sr), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
947 OP_IMPL(M68K_MOVE_FROM_SR, translate_m68k_move_from_sr), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
948 RAW_IMPL(M68K_STOP, translate_m68k_stop), |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
949 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
950 //traps |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
951 OP_IMPL(M68K_CHK, translate_m68k_chk), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
952 RAW_IMPL(M68K_TRAP, translate_m68k_trap), |
992
261995d06897
Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents:
990
diff
changeset
|
953 RAW_IMPL(M68K_A_LINE_TRAP, translate_m68k_trap), |
261995d06897
Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents:
990
diff
changeset
|
954 RAW_IMPL(M68K_F_LINE_TRAP, translate_m68k_trap), |
839 | 955 RAW_IMPL(M68K_TRAPV, translate_m68k_trapv), |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
956 RAW_IMPL(M68K_ILLEGAL, translate_m68k_illegal), |
986
f680fe746a7d
Implement illegal instruction trap
Michael Pavone <pavone@retrodev.com>
parents:
985
diff
changeset
|
957 RAW_IMPL(M68K_INVALID, translate_m68k_illegal), |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
958 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
959 //misc |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
960 RAW_IMPL(M68K_NOP, translate_m68k_nop), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
961 RAW_IMPL(M68K_RESET, translate_m68k_reset), |
837 | 962 RAW_IMPL(M68K_TAS, translate_m68k_tas), |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
963 }; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
964 |
1329
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
965 static void translate_m68k(m68k_context *context, m68kinst * inst) |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
966 { |
1329
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
967 m68k_options * opts = context->options; |
987
1f09994e92c5
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents:
986
diff
changeset
|
968 if (inst->address & 1) { |
1f09994e92c5
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents:
986
diff
changeset
|
969 translate_m68k_odd(opts, inst); |
1f09994e92c5
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents:
986
diff
changeset
|
970 return; |
1f09994e92c5
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents:
986
diff
changeset
|
971 } |
1329
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
972 code_ptr start = opts->gen.code.cur; |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
973 check_cycles_int(&opts->gen, inst->address); |
1329
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
974 |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
975 m68k_debug_handler bp; |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
976 if ((bp = find_breakpoint(context, inst->address))) { |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
977 m68k_breakpoint_patch(context, inst->address, bp, start); |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
978 } |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
979 |
701
200ee73c7210
Remove/comment verbose logging added for tracking down sync bug
Michael Pavone <pavone@retrodev.com>
parents:
697
diff
changeset
|
980 //log_address(&opts->gen, inst->address, "M68K: %X @ %d\n"); |
981
902c53d9c16f
Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
979
diff
changeset
|
981 if ( |
902c53d9c16f
Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
979
diff
changeset
|
982 (inst->src.addr_mode > MODE_AREG && inst->src.addr_mode < MODE_IMMEDIATE) |
902c53d9c16f
Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
979
diff
changeset
|
983 || (inst->dst.addr_mode > MODE_AREG && inst->dst.addr_mode < MODE_IMMEDIATE) |
989
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
984 || (inst->op == M68K_BCC && (inst->src.params.immed & 1)) |
981
902c53d9c16f
Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
979
diff
changeset
|
985 ) { |
902c53d9c16f
Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
979
diff
changeset
|
986 //Not accurate for all cases, but probably good enough for now |
902c53d9c16f
Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
979
diff
changeset
|
987 m68k_set_last_prefetch(opts, inst->address + inst->bytes); |
902c53d9c16f
Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
979
diff
changeset
|
988 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
989 impl_info * info = m68k_impls + inst->op; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
990 if (info->itype == RAW_FUNC) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
991 info->impl.raw(opts, inst); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
992 return; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
993 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
994 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
995 host_ea src_op, dst_op; |
1363
df6af7187b36
Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move
Michael Pavone <pavone@retrodev.com>
parents:
1341
diff
changeset
|
996 uint8_t needs_int_latch = 0; |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
997 if (inst->src.addr_mode != MODE_UNUSED) { |
1363
df6af7187b36
Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move
Michael Pavone <pavone@retrodev.com>
parents:
1341
diff
changeset
|
998 needs_int_latch |= translate_m68k_op(inst, &src_op, opts, 0); |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
999 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1000 if (inst->dst.addr_mode != MODE_UNUSED) { |
1363
df6af7187b36
Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move
Michael Pavone <pavone@retrodev.com>
parents:
1341
diff
changeset
|
1001 needs_int_latch |= translate_m68k_op(inst, &dst_op, opts, 1); |
df6af7187b36
Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move
Michael Pavone <pavone@retrodev.com>
parents:
1341
diff
changeset
|
1002 } |
df6af7187b36
Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move
Michael Pavone <pavone@retrodev.com>
parents:
1341
diff
changeset
|
1003 if (needs_int_latch) { |
df6af7187b36
Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move
Michael Pavone <pavone@retrodev.com>
parents:
1341
diff
changeset
|
1004 m68k_check_cycles_int_latch(opts); |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1005 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1006 if (info->itype == OP_FUNC) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1007 info->impl.op(opts, inst, &src_op, &dst_op); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1008 } else if (info->itype == BINARY_ARITH) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1009 translate_m68k_arith(opts, inst, info->impl.flag_mask, &src_op, &dst_op); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1010 } else if (info->itype == UNARY_ARITH) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1011 translate_m68k_unary(opts, inst, info->impl.flag_mask, inst->dst.addr_mode != MODE_UNUSED ? &dst_op : &src_op); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1012 } else { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1013 m68k_disasm(inst, disasm_buf); |
792
724bbec47f86
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents:
726
diff
changeset
|
1014 fatal_error("%X: %s\ninstruction %d not yet implemented\n", inst->address, disasm_buf, inst->op); |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1015 } |
894
a7774fc2de4b
Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted.
Michael Pavone <pavone@retrodev.com>
parents:
884
diff
changeset
|
1016 if (opts->gen.code.stack_off) { |
a7774fc2de4b
Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted.
Michael Pavone <pavone@retrodev.com>
parents:
884
diff
changeset
|
1017 m68k_disasm(inst, disasm_buf); |
a7774fc2de4b
Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted.
Michael Pavone <pavone@retrodev.com>
parents:
884
diff
changeset
|
1018 fatal_error("Stack offset is %X after %X: %s\n", opts->gen.code.stack_off, inst->address, disasm_buf); |
a7774fc2de4b
Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted.
Michael Pavone <pavone@retrodev.com>
parents:
884
diff
changeset
|
1019 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1020 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1021 |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1022 void translate_m68k_stream(uint32_t address, m68k_context * context) |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1023 { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1024 m68kinst instbuf; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1025 m68k_options * opts = context->options; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1026 code_info *code = &opts->gen.code; |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
1027 if(get_native_address(opts, address)) { |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1028 return; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1029 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1030 uint16_t *encoded, *next; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1031 do { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1032 if (opts->address_log) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1033 fprintf(opts->address_log, "%X\n", address); |
654
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1034 fflush(opts->address_log); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1035 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1036 do { |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
1037 encoded = get_native_pointer(address, (void **)context->mem_pointers, &opts->gen); |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
1038 if (!encoded) { |
1228
2e6dcb5c11a2
WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents:
1214
diff
changeset
|
1039 code_ptr start = code->cur; |
1082
2ec5e6eaf81d
Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents:
1027
diff
changeset
|
1040 translate_out_of_bounds(opts, address); |
1228
2e6dcb5c11a2
WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents:
1214
diff
changeset
|
1041 code_ptr after = code->cur; |
1275
f36ef4847ef2
Fix bug in handling of translating unmapped addresses
Michael Pavone <pavone@retrodev.com>
parents:
1262
diff
changeset
|
1042 map_native_address(context, address, start, 2, after-start); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1043 break; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1044 } |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
1045 code_ptr existing = get_native_address(opts, address); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1046 if (existing) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1047 jmp(code, existing); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1048 break; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1049 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1050 next = m68k_decode(encoded, &instbuf, address); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1051 if (instbuf.op == M68K_INVALID) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1052 instbuf.src.params.immed = *encoded; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1053 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1054 uint16_t m68k_size = (next-encoded)*2; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1055 address += m68k_size; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
1056 //char disbuf[1024]; |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1057 //m68k_disasm(&instbuf, disbuf); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1058 //printf("%X: %s\n", instbuf.address, disbuf); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1059 |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1060 //make sure the beginning of the code for an instruction is contiguous |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1061 check_code_prologue(code); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1062 code_ptr start = code->cur; |
1329
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
1063 translate_m68k(context, &instbuf); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1064 code_ptr after = code->cur; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1065 map_native_address(context, instbuf.address, start, m68k_size, after-start); |
987
1f09994e92c5
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents:
986
diff
changeset
|
1066 } while(!m68k_is_terminal(&instbuf) && !(address & 1)); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1067 process_deferred(&opts->gen.deferred, context, (native_addr_func)get_native_from_context); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1068 if (opts->gen.deferred) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1069 address = opts->gen.deferred->address; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1070 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
1071 } while(opts->gen.deferred); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1072 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1073 |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1074 void * m68k_retranslate_inst(uint32_t address, m68k_context * context) |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1075 { |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1076 m68k_options * opts = context->options; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1077 code_info *code = &opts->gen.code; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1078 uint8_t orig_size = get_native_inst_size(opts, address); |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
1079 code_ptr orig_start = get_native_address(context->options, address); |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1080 uint32_t orig = address; |
902
6011409ded0d
Fix a few lingering stack alignment rework bugs
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
1081 code_info orig_code = {orig_start, orig_start + orig_size + 5, 0}; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
1082 uint16_t *after, *inst = get_native_pointer(address, (void **)context->mem_pointers, &opts->gen); |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1083 m68kinst instbuf; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1084 after = m68k_decode(inst, &instbuf, orig); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1085 if (orig_size != MAX_NATIVE_SIZE) { |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1086 deferred_addr * orig_deferred = opts->gen.deferred; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1087 |
654
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1088 //make sure we have enough code space for the max size instruction |
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1089 check_alloc_code(code, MAX_NATIVE_SIZE); |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1090 code_ptr native_start = code->cur; |
1329
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
1091 translate_m68k(context, &instbuf); |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1092 code_ptr native_end = code->cur; |
654
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1093 /*uint8_t is_terminal = m68k_is_terminal(&instbuf); |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1094 if ((native_end - native_start) <= orig_size) { |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1095 code_ptr native_next; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1096 if (!is_terminal) { |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1097 native_next = get_native_address(context->native_code_map, orig + (after-inst)*2); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1098 } |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1099 if (is_terminal || (native_next && ((native_next == orig_start + orig_size) || (orig_size - (native_end - native_start)) > 5))) { |
654
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1100 printf("Using original location: %p\n", orig_code.cur); |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1101 remove_deferred_until(&opts->gen.deferred, orig_deferred); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1102 code_info tmp; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1103 tmp.cur = code->cur; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1104 tmp.last = code->last; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1105 code->cur = orig_code.cur; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1106 code->last = orig_code.last; |
1329
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
1107 translate_m68k(context, &instbuf); |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1108 native_end = orig_code.cur = code->cur; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1109 code->cur = tmp.cur; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1110 code->last = tmp.last; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1111 if (!is_terminal) { |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1112 nop_fill_or_jmp_next(&orig_code, orig_start + orig_size, native_next); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1113 } |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1114 m68k_handle_deferred(context); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1115 return orig_start; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1116 } |
654
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1117 }*/ |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1118 |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1119 map_native_address(context, instbuf.address, native_start, (after-inst)*2, MAX_NATIVE_SIZE); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1120 |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1121 jmp(&orig_code, native_start); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1122 if (!m68k_is_terminal(&instbuf)) { |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1123 code_ptr native_end = code->cur; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1124 code->cur = native_start + MAX_NATIVE_SIZE; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1125 code_ptr rest = get_native_address_trans(context, orig + (after-inst)*2); |
1341
f1607874dbee
Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
1329
diff
changeset
|
1126 code_info tmp_code = { |
f1607874dbee
Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
1329
diff
changeset
|
1127 .cur = native_end, |
f1607874dbee
Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
1329
diff
changeset
|
1128 .last = native_start + MAX_NATIVE_SIZE, |
f1607874dbee
Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
1329
diff
changeset
|
1129 .stack_off = code->stack_off |
f1607874dbee
Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
1329
diff
changeset
|
1130 }; |
f1607874dbee
Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
1329
diff
changeset
|
1131 jmp(&tmp_code, rest); |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1132 } else { |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1133 code->cur = native_start + MAX_NATIVE_SIZE; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1134 } |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1135 m68k_handle_deferred(context); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1136 return native_start; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1137 } else { |
654
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1138 code_info tmp = *code; |
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1139 *code = orig_code; |
1329
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
1140 translate_m68k(context, &instbuf); |
654
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1141 orig_code = *code; |
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1142 *code = tmp; |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1143 if (!m68k_is_terminal(&instbuf)) { |
654
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1144 jmp(&orig_code, get_native_address_trans(context, orig + (after-inst)*2)); |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1145 } |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1146 m68k_handle_deferred(context); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1147 return orig_start; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1148 } |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1149 } |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1150 |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1151 code_ptr get_native_address_trans(m68k_context * context, uint32_t address) |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1152 { |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
1153 code_ptr ret = get_native_address(context->options, address); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1154 if (!ret) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1155 translate_m68k_stream(address, context); |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
1156 ret = get_native_address(context->options, address); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1157 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1158 return ret; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1159 } |
1507
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1160 #endif |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1161 |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1162 void remove_breakpoint(m68k_context * context, uint32_t address) |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1163 { |
1329
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
1164 for (uint32_t i = 0; i < context->num_breakpoints; i++) |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
1165 { |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
1166 if (context->breakpoints[i].address == address) { |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
1167 if (i != (context->num_breakpoints-1)) { |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
1168 context->breakpoints[i] = context->breakpoints[context->num_breakpoints-1]; |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
1169 } |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
1170 context->num_breakpoints--; |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
1171 break; |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
1172 } |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
1173 } |
1507
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1174 #ifdef USE_NATIVE |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
1175 code_ptr native = get_native_address(context->options, address); |
1329
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
1176 if (!native) { |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
1177 return; |
85a90964b557
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents:
1323
diff
changeset
|
1178 } |
673
7f1b5570b2a1
Fix 68K remove_breakpoint
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
1179 code_info tmp = context->options->gen.code; |
7f1b5570b2a1
Fix 68K remove_breakpoint
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
1180 context->options->gen.code.cur = native; |
706
0a6dea8c8083
Fix problem with removing breakpoints
Michael Pavone <pavone@retrodev.com>
parents:
701
diff
changeset
|
1181 context->options->gen.code.last = native + MAX_NATIVE_SIZE; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
1182 check_cycles_int(&context->options->gen, address); |
673
7f1b5570b2a1
Fix 68K remove_breakpoint
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
1183 context->options->gen.code = tmp; |
1507
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1184 #endif |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1185 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1186 |
1507
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1187 m68k_context * sync_components(m68k_context * context, uint32_t address); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1188 void start_68k_context(m68k_context * context, uint32_t address) |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1189 { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1190 m68k_options * options = context->options; |
883
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1191 context->should_return = 0; |
1506
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1192 #ifdef USE_NATIVE |
1507
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1193 code_ptr addr = get_native_address_trans(context, address); |
883
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1194 options->start_context(addr, context); |
1506
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1195 #else |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1196 while (!context->should_return) { |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1197 if (context->current_cycle >= context->target_cycle) { |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1198 context->target_cycle += 4 * options->gen.clock_divider; |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1199 } |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1200 m68k_cpu_execute((m68000_base_device *)context); |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1201 if (!context->should_return) { |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1202 sync_components(context, 0); |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1203 } |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1204 } |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1205 #endif |
883
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1206 } |
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1207 |
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1208 void resume_68k(m68k_context *context) |
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1209 { |
1506
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1210 #ifdef USE_NATIVE |
883
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1211 code_ptr addr = context->resume_pc; |
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1212 context->resume_pc = NULL; |
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1213 m68k_options * options = context->options; |
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1214 context->should_return = 0; |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1215 options->start_context(addr, context); |
1506
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1216 #else |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1217 start_68k_context(context, 0); |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1218 #endif |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1219 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1220 |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1221 void m68k_reset(m68k_context * context) |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1222 { |
1506
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1223 #ifdef USE_NATIVE |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
1224 //TODO: Actually execute the M68K reset vector rather than simulating some of its behavior |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
1225 uint16_t *reset_vec = get_native_pointer(0, (void **)context->mem_pointers, &context->options->gen); |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
1226 context->aregs[7] = reset_vec[0] << 16 | reset_vec[1]; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
1227 uint32_t address = reset_vec[2] << 16 | reset_vec[3]; |
1506
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1228 #else |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1229 m68k_reset_cpu((m68000_base_device *)context); |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1230 uint32_t address = 0; |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1231 #endif |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1232 start_68k_context(context, address); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1233 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1234 |
884
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
883
diff
changeset
|
1235 void m68k_options_free(m68k_options *opts) |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
883
diff
changeset
|
1236 { |
1507
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1237 #ifdef USE_NATIVE |
884
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
883
diff
changeset
|
1238 free(opts->gen.native_code_map); |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
883
diff
changeset
|
1239 free(opts->gen.ram_inst_sizes); |
1507
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1240 #endif |
884
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
883
diff
changeset
|
1241 free(opts); |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
883
diff
changeset
|
1242 } |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
883
diff
changeset
|
1243 |
1507
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1244 #ifndef USE_NATIVE |
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1245 void init_m68k_opts(m68k_options * opts, memmap_chunk * memmap, uint32_t num_chunks, uint32_t clock_divider) |
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1246 { |
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1247 memset(opts, 0, sizeof(*opts)); |
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1248 opts->gen.memmap = memmap; |
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1249 opts->gen.memmap_chunks = num_chunks; |
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1250 opts->gen.address_mask = 0xFFFFFF; |
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1251 opts->gen.byte_swap = 1; |
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1252 opts->gen.max_address = 0x1000000; |
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1253 opts->gen.bus_cycles = 4; |
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1254 opts->gen.clock_divider = clock_divider; |
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1255 } |
2455662378ed
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1506
diff
changeset
|
1256 #endif |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
1257 |
1082
2ec5e6eaf81d
Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents:
1027
diff
changeset
|
1258 m68k_context * init_68k_context(m68k_options * opts, m68k_reset_handler reset_handler) |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
1259 { |
1506
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1260 #ifdef USE_NATIVE |
796
41f73c76b978
Fix some memory issues
=?UTF-8?q?Higor=20Eur=C3=ADpedes?= <heuripedes@gmail.com>
parents:
726
diff
changeset
|
1261 size_t ctx_size = sizeof(m68k_context) + ram_size(&opts->gen) / (1 << opts->gen.ram_flags_shift) / 8; |
41f73c76b978
Fix some memory issues
=?UTF-8?q?Higor=20Eur=C3=ADpedes?= <heuripedes@gmail.com>
parents:
726
diff
changeset
|
1262 m68k_context * context = malloc(ctx_size); |
41f73c76b978
Fix some memory issues
=?UTF-8?q?Higor=20Eur=C3=ADpedes?= <heuripedes@gmail.com>
parents:
726
diff
changeset
|
1263 memset(context, 0, ctx_size); |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
1264 context->options = opts; |
1506
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1265 #else |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1266 m68000_base_device *device = malloc(sizeof(m68000_base_device));; |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1267 memset(device, 0, sizeof(m68000_base_device)); |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1268 m68k_context *context = &device->c; |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1269 context->options = opts; |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1270 m68k_init_cpu_m68000(device); |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1271 |
ded16f3d7eb4
Super hacky integration of the version of Musashi from MAME
Michael Pavone <pavone@retrodev.com>
parents:
1464
diff
changeset
|
1272 #endif |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
688
diff
changeset
|
1273 context->int_cycle = CYCLE_NEVER; |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
1274 context->status = 0x27; |
1082
2ec5e6eaf81d
Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents:
1027
diff
changeset
|
1275 context->reset_handler = (code_ptr)reset_handler; |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
688
diff
changeset
|
1276 return context; |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
1277 } |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1278 |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1279 void m68k_serialize(m68k_context *context, uint32_t pc, serialize_buffer *buf) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1280 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1281 for (int i = 0; i < 8; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1282 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1283 save_int32(buf, context->dregs[i]); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1284 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1285 for (int i = 0; i < 9; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1286 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1287 save_int32(buf, context->aregs[i]); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1288 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1289 save_int32(buf, pc); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1290 uint16_t sr = context->status << 3; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1291 for (int flag = 4; flag >= 0; flag--) { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1292 sr <<= 1; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1293 sr |= context->flags[flag] != 0; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1294 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1295 save_int16(buf, sr); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1296 save_int32(buf, context->current_cycle); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1297 save_int32(buf, context->int_cycle); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1298 save_int8(buf, context->int_num); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1299 save_int8(buf, context->int_pending); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1300 save_int8(buf, context->trace_pending); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1301 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1302 |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1303 void m68k_deserialize(deserialize_buffer *buf, void *vcontext) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1304 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1305 m68k_context *context = vcontext; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1306 for (int i = 0; i < 8; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1307 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1308 context->dregs[i] = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1309 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1310 for (int i = 0; i < 9; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1311 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1312 context->aregs[i] = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1313 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1314 //hack until both PC and IR registers are represented properly |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1315 context->last_prefetch_address = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1316 uint16_t sr = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1317 context->status = sr >> 8; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1318 for (int flag = 0; flag < 5; flag++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1319 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1320 context->flags[flag] = sr & 1; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1321 sr >>= 1; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1322 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1323 context->current_cycle = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1324 context->int_cycle = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1325 context->int_num = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1326 context->int_pending = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1327 context->trace_pending = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1363
diff
changeset
|
1328 } |