Mercurial > repos > blastem
annotate runtime.S @ 281:44f0bbf57b4f
Save context in z80_do_sync
| author | Mike Pavone <pavone@retrodev.com> |
|---|---|
| date | Fri, 03 May 2013 21:22:36 -0700 |
| parents | 4a7ac10ac2d9 |
| children | e5e8b48ad157 |
| rev | line source |
|---|---|
|
17
de0085d4ea40
Add asssembly runtime code stub
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
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1 |
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18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
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2 .global handle_cycle_limit |
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150
3e68e517cc01
Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
changeset
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3 .global do_sync |
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18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
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4 handle_cycle_limit: |
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82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
5 cmp 84(%rsi), %eax |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
6 jb skip_sync |
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150
3e68e517cc01
Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
changeset
|
7 do_sync: |
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54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
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8 call m68k_save_context |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
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9 mov %rsi, %rdi |
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198
209a37eed3e7
Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
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10 xor %esi, %esi |
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54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
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11 call sync_components |
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3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
12 mov %rax, %rsi |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
13 call m68k_load_context |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
14 skip_sync: |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
15 ret |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
16 |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
17 .global handle_cycle_limit_int |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
18 handle_cycle_limit_int: |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
19 cmp 88(%rsi), %eax |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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20 jb skip_int |
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251
4a7ac10ac2d9
Fix target cycle count after 68K interrupt
Mike Pavone <pavone@retrodev.com>
parents:
226
diff
changeset
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21 mov 84(%rsi), %ebp |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
22 /* swap USP and SSP if not already in supervisor mode */ |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
23 bt $5, 5(%rsi) |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
24 jc already_supervisor |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
25 mov 72(%rsi), %edi |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
26 mov %r15d, 72(%rsi) |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
27 mov %edi, %r15d |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
28 already_supervisor: |
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175
7504200cac86
Fix order of SR and PC saved in an exception stack frame
Mike Pavone <pavone@retrodev.com>
parents:
160
diff
changeset
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29 /* save PC */ |
|
7504200cac86
Fix order of SR and PC saved in an exception stack frame
Mike Pavone <pavone@retrodev.com>
parents:
160
diff
changeset
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30 sub $4, %r15d |
|
7504200cac86
Fix order of SR and PC saved in an exception stack frame
Mike Pavone <pavone@retrodev.com>
parents:
160
diff
changeset
|
31 mov %r15d, %edi |
|
7504200cac86
Fix order of SR and PC saved in an exception stack frame
Mike Pavone <pavone@retrodev.com>
parents:
160
diff
changeset
|
32 call m68k_write_long_lowfirst |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
33 /* save status register on stack */ |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
34 sub $2, %r15d |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
35 mov %r15d, %edi |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
36 call get_sr |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
37 call m68k_write_word |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
38 /* update status register */ |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
39 andb $0xF8, 5(%rsi) |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
40 mov 92(%rsi), %cl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
41 or $0x20, %cl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
42 or %cl, 5(%rsi) |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
43 /* calculate interrupt vector address */ |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
44 mov 92(%rsi), %ecx |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
45 shl $2, %ecx |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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46 add $0x60, %ecx |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
47 call m68k_read_long_scratch1 |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
48 call m68k_native_addr_and_sync |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
49 add $24, %eax |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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50 /* discard function return address */ |
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6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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51 pop %rdi |
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6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
52 jmp *%rcx |
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150
3e68e517cc01
Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
changeset
|
53 ret |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
54 skip_int: |
|
150
3e68e517cc01
Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
changeset
|
55 cmp 84(%rsi), %eax |
|
198
209a37eed3e7
Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
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56 jb skip_sync_int |
|
209a37eed3e7
Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
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57 call m68k_save_context |
|
209a37eed3e7
Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
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58 mov %rsi, %rdi |
|
209a37eed3e7
Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
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59 mov %ecx, %esi |
|
209a37eed3e7
Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
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60 call sync_components |
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209a37eed3e7
Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
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61 mov %rax, %rsi |
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209a37eed3e7
Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
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62 call m68k_load_context |
|
209a37eed3e7
Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
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63 skip_sync_int: |
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82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
64 ret |
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87
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
parents:
86
diff
changeset
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65 |
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152
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
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66 .global m68k_trap |
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79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
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67 m68k_trap: |
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79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
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68 push %rdi |
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79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
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69 push %rcx |
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79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
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70 /* swap USP and SSP if not already in supervisor mode */ |
|
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
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71 bt $5, 5(%rsi) |
|
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
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72 jc already_supervisor_trap |
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79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
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73 mov 72(%rsi), %edi |
|
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
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74 mov %r15d, 72(%rsi) |
|
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
|
75 mov %edi, %r15d |
|
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
|
76 already_supervisor_trap: |
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175
7504200cac86
Fix order of SR and PC saved in an exception stack frame
Mike Pavone <pavone@retrodev.com>
parents:
160
diff
changeset
|
77 /* save PC */ |
|
7504200cac86
Fix order of SR and PC saved in an exception stack frame
Mike Pavone <pavone@retrodev.com>
parents:
160
diff
changeset
|
78 sub $4, %r15d |
|
7504200cac86
Fix order of SR and PC saved in an exception stack frame
Mike Pavone <pavone@retrodev.com>
parents:
160
diff
changeset
|
79 mov %r15d, %edi |
|
7504200cac86
Fix order of SR and PC saved in an exception stack frame
Mike Pavone <pavone@retrodev.com>
parents:
160
diff
changeset
|
80 pop %rcx |
|
7504200cac86
Fix order of SR and PC saved in an exception stack frame
Mike Pavone <pavone@retrodev.com>
parents:
160
diff
changeset
|
81 call m68k_write_long_lowfirst |
|
152
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
|
82 /* save status register on stack */ |
|
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
|
83 sub $2, %r15d |
|
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
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84 mov %r15d, %edi |
|
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
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85 call get_sr |
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79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
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86 call m68k_write_word |
|
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
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87 /* update status register */ |
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79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
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88 andb $0xF8, 5(%rsi) |
|
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
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89 mov 92(%rsi), %cl |
|
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
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90 or $0x20, %cl |
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79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
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91 or %cl, 5(%rsi) |
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79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
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92 /* calculate interrupt vector address */ |
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79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
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93 pop %rcx |
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79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
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94 shl $2, %ecx |
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79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
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95 call m68k_read_long_scratch1 |
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79958b95526f
Implement TRAP (untested)
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parents:
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96 call m68k_native_addr_and_sync |
|
226
28a6697e847b
Implement CHK instruction (not fully tested).
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parents:
209
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97 add $18, %eax |
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152
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
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98 jmp *%rcx |
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176
e2918b5208eb
Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents:
175
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99 |
|
e2918b5208eb
Print a message when we try to run an invalid instruction, not when we try to translate it
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parents:
175
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changeset
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100 invalid_msg: |
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e2918b5208eb
Print a message when we try to run an invalid instruction, not when we try to translate it
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parents:
175
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101 .asciz "Invalid instruction at %X\n" |
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e2918b5208eb
Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents:
175
diff
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102 |
|
e2918b5208eb
Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents:
175
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103 .global m68k_invalid |
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104 m68k_invalid: |
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105 lea invalid_msg(%rip), %rdi |
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106 mov %ecx, %esi |
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107 xor %rax, %rax |
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108 call printf |
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109 mov $1, %rdi |
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110 call exit |
|
194
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111 |
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112 .global bcd_add |
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113 bcd_add: |
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114 xchg %rax, %rdi |
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115 |
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116 mov %cl, %ch |
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117 mov %al, %ah |
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118 and $0xF, %ch |
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119 and $0xF, %ah |
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120 and $0xF0, %cl |
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121 and $0xF0, %al |
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122 add %ah, %ch |
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123 cmp $10, %ch |
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124 jb no_adjust |
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125 add $6, %ch |
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126 no_adjust: |
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127 add %ch, %al |
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128 add %al, %cl |
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129 mov $0, %ch |
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130 jc def_adjust |
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131 cmp $0xA0, %cl |
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132 jb no_adjust_h |
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133 def_adjust: |
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134 add $0x60, %cl |
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135 mov $1, %ch |
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136 no_adjust_h: |
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137 |
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138 mov %rdi, %rax |
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139 ret |
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140 |
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141 .global bcd_sub |
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142 bcd_sub: |
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143 xchg %rax, %rdi |
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144 |
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145 mov %cl, %ch |
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146 mov %al, %ah |
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147 and $0xF, %ch |
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148 and $0xF, %ah |
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149 and $0xF0, %cl |
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150 and $0xF0, %al |
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151 sub %ah, %ch |
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152 cmp $10, %ch |
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153 jb no_adjusts |
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154 sub $6, %ch |
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155 no_adjusts: |
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156 add %ch, %cl |
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157 sub %al, %cl |
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158 mov $0, %ch |
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159 jc def_adjusts |
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160 cmp $0xA0, %cl |
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161 jb no_adjust_hs |
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162 def_adjusts: |
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163 sub $0x60, %cl |
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164 mov $1, %ch |
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165 no_adjust_hs: |
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166 |
|
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167 mov %rdi, %rax |
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168 ret |
|
150
3e68e517cc01
Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
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|
169 |
|
87
60b5c9e2f4e0
vertical interrupts now work
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|
170 int_dbg_msg: |
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vertical interrupts now work
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|
171 .asciz "Executing Interrupt!" |
|
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vertical interrupts now work
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172 print_int_dbg: |
|
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vertical interrupts now work
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|
173 call m68k_save_context |
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vertical interrupts now work
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|
174 push %rsi |
|
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|
175 lea int_dbg_msg(%rip), %rdi |
|
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|
176 call puts |
|
60b5c9e2f4e0
vertical interrupts now work
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|
177 pop %rsi |
|
60b5c9e2f4e0
vertical interrupts now work
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|
178 call m68k_load_context |
|
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|
179 ret |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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|
180 |
|
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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181 .global get_sr |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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182 get_sr: |
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183 mov 5(%rsi), %cl |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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184 shl $8, %cx |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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185 mov (%rsi), %cl |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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|
186 shl $1, %cl |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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187 or %bl, %cl |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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188 shl $1, %cl |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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189 or %dl, %cl |
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6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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|
190 shl $1, %cl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
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|
191 or %bh, %cl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
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|
192 shl $1, %cl |
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6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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|
193 or %dh, %cl |
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6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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194 ret |
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6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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195 |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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196 .global set_sr |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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197 set_sr: |
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6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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|
198 mov %cl, %dh |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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|
199 and $1, %dh |
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6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
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|
200 shr $1, %cl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
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changeset
|
201 mov %cl, %bh |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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|
202 and $1, %bh |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
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|
203 shr $1, %cl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
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|
204 mov %cl, %dl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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|
205 and $1, %dl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
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|
206 shr $1, %cl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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|
207 mov %cl, %bl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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|
208 and $1, %bl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
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|
209 shr $1, %cl |
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210 and $1, %cl |
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211 mov %cl, (%rsi) |
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212 shr $8, %cx |
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213 mov %cl, 5(%rsi) |
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214 ret |
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215 |
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216 .global set_ccr |
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217 set_ccr: |
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218 mov %cl, %dh |
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219 and $1, %dh |
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220 shr $1, %cl |
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221 mov %cl, %bh |
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222 and $1, %bh |
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223 shr $1, %cl |
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224 mov %cl, %dl |
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225 and $1, %dl |
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226 shr $1, %cl |
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227 mov %cl, %bl |
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228 and $1, %bl |
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229 shr $1, %cl |
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230 and $1, %cl |
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231 mov %cl, (%rsi) |
|
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232 ret |
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233 |
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234 do_vdp_port_write: |
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235 call m68k_save_context |
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236 mov %rcx, %rdx |
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237 call vdp_port_write |
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238 mov %rax, %rsi |
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239 call m68k_load_context |
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240 ret |
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241 |
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242 do_vdp_port_read: |
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243 mov %ecx, %edi |
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54
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244 call m68k_save_context |
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245 call vdp_port_read |
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246 mov %rax, %rsi |
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247 call m68k_load_context |
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248 mov 136(%rsi), %cx |
|
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249 ret |
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250 |
| 66 | 251 do_io_write: |
| 252 call m68k_save_context | |
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253 and $0x1FFFF, %edi |
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83
2c7267617d71
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254 mov %ecx, %edx |
| 66 | 255 call io_write |
| 256 mov %rax, %rsi | |
| 257 call m68k_load_context | |
| 258 ret | |
| 259 do_io_read: | |
| 260 mov %ecx, %edi | |
|
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261 and $0x1FFFF, %edi |
| 66 | 262 call m68k_save_context |
| 263 call io_read | |
| 264 mov %rax, %rsi | |
| 265 call m68k_load_context | |
|
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266 mov 136(%rsi), %cl |
| 66 | 267 ret |
|
83
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268 |
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269 do_io_write_w: |
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270 call m68k_save_context |
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271 and $0x1FFFF, %edi |
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83
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272 mov %ecx, %edx |
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273 call io_write_w |
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274 mov %rax, %rsi |
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275 call m68k_load_context |
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276 ret |
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277 do_io_read_w: |
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278 mov %ecx, %edi |
|
153
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279 and $0x1FFFF, %edi |
|
83
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280 call m68k_save_context |
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281 call io_read_w |
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|
282 mov %rax, %rsi |
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|
283 call m68k_load_context |
|
84
2d1ae596db7a
Fix long reads from IO ports or long reads that trigger sync cycles by saving rdi. Possibly fix word wide IO reads.
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|
284 mov 136(%rsi), %cx |
|
83
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|
285 ret |
| 66 | 286 |
|
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|
287 bad_access_msg: |
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|
288 .asciz "Program tried to access illegal 68K address %X\n" |
|
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|
289 |
|
18
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290 .global m68k_write_word |
|
57
bc3bc7a60c4e
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
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|
291 .global try_fifo_write |
|
18
3e7bfde7606e
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292 m68k_write_word: |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
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|
293 call inccycles |
|
18
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294 and $0xFFFFFF, %rdi |
|
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295 cmp $0x400000, %edi |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
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|
296 jbe cart_w |
|
18
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297 cmp $0xE00000, %edi |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
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|
298 jae workram_w |
|
54
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|
299 cmp $0xC00000, %edi |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
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|
300 jae vdp_psg_w |
|
153
42c031184e8a
Implement access to Z80 RAM
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|
301 cmp $0xA00000, %edi |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
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changeset
|
302 jb not_io_w |
|
85
1db2a0b655d1
Fix Z80 BUSREQ/RESET implementation.
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84
diff
changeset
|
303 cmp $0xA12000, %edi |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
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changeset
|
304 jae not_io_w |
|
85
1db2a0b655d1
Fix Z80 BUSREQ/RESET implementation.
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84
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changeset
|
305 jmp do_io_write_w |
|
1db2a0b655d1
Fix Z80 BUSREQ/RESET implementation.
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diff
changeset
|
306 not_io_w: |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
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diff
changeset
|
307 ret |
|
18
3e7bfde7606e
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changeset
|
308 workram_w: |
|
193
c66e4636f991
Implement support for self-modifying code
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176
diff
changeset
|
309 and $0xFFFF, %edi |
|
18
3e7bfde7606e
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changeset
|
310 mov %cx, (%r9, %rdi) |
|
193
c66e4636f991
Implement support for self-modifying code
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176
diff
changeset
|
311 mov %edi, %ecx |
|
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Implement support for self-modifying code
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176
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changeset
|
312 shr $10, %ecx |
|
c66e4636f991
Implement support for self-modifying code
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176
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changeset
|
313 bt %ecx, 160(%rsi) |
|
c66e4636f991
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176
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changeset
|
314 jnc not_code |
|
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changeset
|
315 call m68k_save_context |
|
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changeset
|
316 call m68k_handle_code_write |
|
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changeset
|
317 mov %rax, %rsi |
|
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parents:
176
diff
changeset
|
318 call m68k_load_context |
|
c66e4636f991
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176
diff
changeset
|
319 not_code: |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
320 ret |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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17
diff
changeset
|
321 cart_w: |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
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17
diff
changeset
|
322 mov %cx, (%r8, %rdi) |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
323 ret |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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diff
changeset
|
324 vdp_psg_w: |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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diff
changeset
|
325 test $0x2700E0, %edi |
|
3b79cbcf6846
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diff
changeset
|
326 jnz crash |
|
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Get Flavio's color bar demo kind of sort of working
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diff
changeset
|
327 and $0x1F, %edi |
|
3b79cbcf6846
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|
328 cmp $4, %edi |
|
104
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329 jb try_fifo_write |
|
54
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|
330 jmp do_vdp_port_write |
|
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|
331 try_fifo_write: |
|
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332 push %rdx |
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333 push %rbx |
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|
334 /* fetch VDP context pointer from 68K context */ |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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diff
changeset
|
335 mov 128(%rsi), %rdx |
|
149
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
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changeset
|
336 /* check DMA flag */ |
|
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337 bt $6, 19(%rdx) |
|
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Make writes to control and data port block when DMA is in progress
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changeset
|
338 jc fifo_fallback |
|
54
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changeset
|
339 /* get fifo_cur and compare it to fifo_end */ |
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|
340 mov (%rdx), %rbx |
|
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|
341 cmp %rbx, 8(%rdx) |
|
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|
342 /* bail out if fifo is full */ |
|
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|
343 je fifo_fallback |
|
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|
344 /* populate FIFO entry */ |
| 138 | 345 mov %cx, 6(%rbx) /* value */ |
| 346 mov 16(%rdx), %cx | |
| 347 mov %cx, 4(%rbx) /* address */ | |
| 348 mov 18(%rdx), %cl | |
| 349 mov %cl, 8(%rbx) /* cd */ | |
| 350 movb $0, 9(%rbx) /* partial */ | |
|
54
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|
351 mov %eax, %ecx |
|
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|
352 shl $3, %ecx /* multiply by 68K cycle by 7 to get MCLK cycle */ |
|
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353 sub %eax, %ecx |
|
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|
354 mov %ecx, (%rbx) /* cycle */ |
|
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changeset
|
355 /* update fifo_cur and store back in 68K context */ |
| 138 | 356 add $12, %rbx |
|
54
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357 mov %rbx, (%rdx) |
| 138 | 358 /* update address register */ |
| 359 movzbw 35(%rdx), %bx | |
| 360 add %bx, 16(%rdx) | |
|
54
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|
361 /* clear pending flag */ |
|
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|
362 andb $0xEF, 19(%rdx) |
|
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|
363 pop %rbx |
|
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|
364 pop %rdx |
|
64
2b1a65f4b85d
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|
365 ret |
|
54
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|
366 fifo_fallback: |
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367 pop %rbx |
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|
368 pop %rdx |
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|
369 jmp do_vdp_port_write |
|
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|
370 crash: |
|
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|
371 mov %edi, %esi |
|
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|
372 lea bad_access_msg(%rip), %rdi |
|
160
69ac23d42897
Fix crash in printf from "crash" function due to lack of clearing rax
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373 xor %rax, %rax |
|
54
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374 call printf |
|
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|
375 mov $1, %rdi |
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376 call exit |
|
18
3e7bfde7606e
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377 |
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378 .global m68k_write_byte |
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379 m68k_write_byte: |
|
64
2b1a65f4b85d
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Mike Pavone <pavone@retrodev.com>
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|
380 call inccycles |
|
18
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381 and $0xFFFFFF, %rdi |
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382 cmp $0x400000, %edi |
|
104
a0fdaa134964
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383 jbe cart_wb |
|
18
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384 cmp $0xE00000, %edi |
|
104
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|
385 jae workram_wb |
| 66 | 386 cmp $0xC00000, %edi |
|
104
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|
387 jae vdp_psg_wb |
|
153
42c031184e8a
Implement access to Z80 RAM
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152
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388 cmp $0xA00000, %edi |
|
104
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changeset
|
389 jb not_io_wb |
|
85
1db2a0b655d1
Fix Z80 BUSREQ/RESET implementation.
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diff
changeset
|
390 cmp $0xA12000, %edi |
|
104
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changeset
|
391 jae not_io_wb |
| 66 | 392 jmp do_io_write |
| 393 not_io_wb: | |
|
64
2b1a65f4b85d
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changeset
|
394 ret |
|
18
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|
395 workram_wb: |
|
83
2c7267617d71
Implement Z80 reset and bus request registers.
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changeset
|
396 /* deal with byte swapping */ |
|
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Implement Z80 reset and bus request registers.
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82
diff
changeset
|
397 xor $1, %edi |
|
18
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398 and $0xFFFF, %rdi |
|
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changeset
|
399 mov %cl, (%r9, %rdi) |
|
193
c66e4636f991
Implement support for self-modifying code
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176
diff
changeset
|
400 mov %edi, %ecx |
|
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Implement support for self-modifying code
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changeset
|
401 shr $10, %ecx |
|
c66e4636f991
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176
diff
changeset
|
402 bt %ecx, 160(%rsi) |
|
c66e4636f991
Implement support for self-modifying code
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176
diff
changeset
|
403 jnc not_code_b |
|
c66e4636f991
Implement support for self-modifying code
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176
diff
changeset
|
404 xor $1, %edi |
|
c66e4636f991
Implement support for self-modifying code
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176
diff
changeset
|
405 call m68k_save_context |
|
c66e4636f991
Implement support for self-modifying code
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changeset
|
406 call m68k_handle_code_write |
|
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diff
changeset
|
407 mov %rax, %rsi |
|
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176
diff
changeset
|
408 call m68k_load_context |
|
c66e4636f991
Implement support for self-modifying code
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diff
changeset
|
409 not_code_b: |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
410 ret |
|
18
3e7bfde7606e
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17
diff
changeset
|
411 cart_wb: |
|
83
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
412 /* deal with byte swapping */ |
|
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
413 xor $1, %edi |
|
18
3e7bfde7606e
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parents:
17
diff
changeset
|
414 mov %cl, (%r8, %rdi) |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
415 ret |
| 66 | 416 vdp_psg_wb: |
| 417 push %rdx | |
| 418 mov %cl, %dl | |
| 419 and $0xFF, %cx | |
| 420 shl $8, %dx | |
| 421 or %dx, %cx | |
| 422 pop %rdx | |
| 423 jmp vdp_psg_w | |
|
18
3e7bfde7606e
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17
diff
changeset
|
424 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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17
diff
changeset
|
425 .global m68k_write_long_lowfirst |
|
3e7bfde7606e
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17
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changeset
|
426 m68k_write_long_lowfirst: |
|
3e7bfde7606e
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17
diff
changeset
|
427 push %rdi |
|
86
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
428 push %rcx |
|
18
3e7bfde7606e
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parents:
17
diff
changeset
|
429 add $2, %edi |
|
3e7bfde7606e
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parents:
17
diff
changeset
|
430 call m68k_write_word |
|
86
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
431 pop %rcx |
|
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
432 pop %rdi |
|
18
3e7bfde7606e
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Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
433 shr $16, %ecx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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parents:
17
diff
changeset
|
434 jmp m68k_write_word |
|
3e7bfde7606e
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parents:
17
diff
changeset
|
435 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
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17
diff
changeset
|
436 .global m68k_write_long_highfirst |
|
3e7bfde7606e
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17
diff
changeset
|
437 m68k_write_long_highfirst: |
|
3e7bfde7606e
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parents:
17
diff
changeset
|
438 push %rdi |
|
3e7bfde7606e
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parents:
17
diff
changeset
|
439 push %rcx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
440 shr $16, %ecx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
441 call m68k_write_word |
|
3e7bfde7606e
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17
diff
changeset
|
442 pop %rcx |
|
3e7bfde7606e
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parents:
17
diff
changeset
|
443 pop %rdi |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
444 add $2, %rdi |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
445 jmp m68k_write_word |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
446 |
|
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
447 inccycles: |
|
251
4a7ac10ac2d9
Fix target cycle count after 68K interrupt
Mike Pavone <pavone@retrodev.com>
parents:
226
diff
changeset
|
448 cmp %ebp, %eax |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
449 jnb do_limit |
|
251
4a7ac10ac2d9
Fix target cycle count after 68K interrupt
Mike Pavone <pavone@retrodev.com>
parents:
226
diff
changeset
|
450 add $4, %eax |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
451 ret |
|
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
452 do_limit: |
|
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
453 push %rcx |
|
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
454 push %rdi |
|
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
455 call handle_cycle_limit |
|
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
456 pop %rdi |
|
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
457 pop %rcx |
|
251
4a7ac10ac2d9
Fix target cycle count after 68K interrupt
Mike Pavone <pavone@retrodev.com>
parents:
226
diff
changeset
|
458 add $4, %eax |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
459 ret |
|
17
de0085d4ea40
Add asssembly runtime code stub
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
460 |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
461 .global m68k_read_word_scratch1 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
462 m68k_read_word_scratch1: |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
463 call inccycles |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
464 and $0xFFFFFF, %rcx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
465 cmp $0x400000, %ecx |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
466 jbe cart |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
467 cmp $0xE00000, %ecx |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
468 jae workram |
|
57
bc3bc7a60c4e
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
Mike Pavone <pavone@retrodev.com>
parents:
54
diff
changeset
|
469 cmp $0xC00000, %ecx |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
470 jae vdp_psg |
|
153
42c031184e8a
Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents:
152
diff
changeset
|
471 cmp $0xA00000, %ecx |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
472 jb not_io |
|
85
1db2a0b655d1
Fix Z80 BUSREQ/RESET implementation.
Mike Pavone <pavone@retrodev.com>
parents:
84
diff
changeset
|
473 cmp $0xA12000, %ecx |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
474 jae not_io |
|
83
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
475 call do_io_read_w |
|
72
7935cd64d5c8
Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents:
66
diff
changeset
|
476 ret |
|
7935cd64d5c8
Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents:
66
diff
changeset
|
477 not_io: |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
478 xor %cx, %cx |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
479 dec %cx |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
480 ret |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
481 workram: |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
482 and $0xFFFF, %rcx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
483 mov (%r9, %rcx), %cx |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
484 ret |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
485 vdp_psg: |
|
57
bc3bc7a60c4e
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
Mike Pavone <pavone@retrodev.com>
parents:
54
diff
changeset
|
486 test $0x2700E0, %ecx |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
487 jnz crash |
|
57
bc3bc7a60c4e
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
Mike Pavone <pavone@retrodev.com>
parents:
54
diff
changeset
|
488 and $0x1F, %ecx |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
489 jmp do_vdp_port_read |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
490 cart: |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
491 mov (%r8, %rcx), %cx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
492 ret |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
493 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
494 .global m68k_read_long_scratch1 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
495 m68k_read_long_scratch1: |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
496 push %rcx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
497 call m68k_read_word_scratch1 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
498 mov %cx, %di |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
499 pop %rcx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
500 add $2, %ecx |
|
84
2d1ae596db7a
Fix long reads from IO ports or long reads that trigger sync cycles by saving rdi. Possibly fix word wide IO reads.
Mike Pavone <pavone@retrodev.com>
parents:
83
diff
changeset
|
501 push %rdi |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
502 call m68k_read_word_scratch1 |
|
84
2d1ae596db7a
Fix long reads from IO ports or long reads that trigger sync cycles by saving rdi. Possibly fix word wide IO reads.
Mike Pavone <pavone@retrodev.com>
parents:
83
diff
changeset
|
503 pop %rdi |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
504 and $0xFFFF, %ecx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
505 shl $16, %edi |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
506 or %edi, %ecx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
507 ret |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
508 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
509 .global m68k_read_byte_scratch1 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
510 m68k_read_byte_scratch1: |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
511 call inccycles |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
512 and $0xFFFFFF, %rcx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
513 cmp $0x400000, %ecx |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
514 jbe cart_b |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
515 cmp $0xE00000, %ecx |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
516 jae workram_b |
| 137 | 517 cmp $0xC00000, %ecx |
| 518 jae vdp_psg_b | |
|
153
42c031184e8a
Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents:
152
diff
changeset
|
519 cmp $0xA00000, %ecx |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
520 jb not_io_b |
|
85
1db2a0b655d1
Fix Z80 BUSREQ/RESET implementation.
Mike Pavone <pavone@retrodev.com>
parents:
84
diff
changeset
|
521 cmp $0xA12000, %ecx |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
522 jae not_io_b |
| 66 | 523 jmp do_io_read |
| 524 not_io_b: | |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
525 xor %cl, %cl |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
526 dec %cl |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
527 ret |
| 137 | 528 vdp_psg_b: |
| 529 test $0x2700E0, %ecx | |
| 530 jnz crash | |
| 531 and $0x1F, %ecx | |
| 532 bt $0, %ecx | |
| 533 jnc vdp_swap | |
| 534 jmp do_vdp_port_read | |
| 535 vdp_swap: | |
| 536 call do_vdp_port_read | |
| 537 shr $8, %cx | |
| 538 ret | |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
539 workram_b: |
|
83
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
540 /* deal with byte swapping */ |
|
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
541 xor $1, %ecx |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
542 and $0xFFFF, %rcx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
543 mov (%r9, %rcx), %cl |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
544 ret |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
545 cart_b: |
|
83
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
546 /* deal with byte swapping */ |
|
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
547 xor $1, %ecx |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
548 mov (%r8, %rcx), %cl |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
549 ret |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
550 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
551 .global m68k_modified_ret_addr |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
552 m68k_modified_ret_addr: |
|
145
15b8dce19cf4
Implement m68k_modified_ret_addr
Mike Pavone <pavone@retrodev.com>
parents:
138
diff
changeset
|
553 add $16, %rsp |
|
15b8dce19cf4
Implement m68k_modified_ret_addr
Mike Pavone <pavone@retrodev.com>
parents:
138
diff
changeset
|
554 call m68k_native_addr |
|
15b8dce19cf4
Implement m68k_modified_ret_addr
Mike Pavone <pavone@retrodev.com>
parents:
138
diff
changeset
|
555 jmp *%rcx |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
556 |
|
53
44e661913a51
Add preliminary support for JMP
Mike Pavone <pavone@retrodev.com>
parents:
18
diff
changeset
|
557 dyn_addr_msg: |
|
44e661913a51
Add preliminary support for JMP
Mike Pavone <pavone@retrodev.com>
parents:
18
diff
changeset
|
558 .asciz "Program needs dynamically calculated native address\n" |
|
44e661913a51
Add preliminary support for JMP
Mike Pavone <pavone@retrodev.com>
parents:
18
diff
changeset
|
559 |
|
86
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
560 .global m68k_native_addr_and_sync |
|
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
561 m68k_native_addr_and_sync: |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
562 call m68k_save_context |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
563 push %rcx |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
564 mov %rsi, %rdi |
|
198
209a37eed3e7
Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
565 xor %esi, %esi |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
566 call sync_components |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
567 pop %rsi |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
568 push %rax |
|
95
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
569 mov %rax, %rdi |
|
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
570 call get_native_address_trans |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
571 mov %rax, %rcx |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
572 pop %rsi |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
573 call m68k_load_context |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
574 ret |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
575 |
|
86
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
576 .global m68k_native_addr |
|
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
577 m68k_native_addr: |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
578 call m68k_save_context |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
579 push %rsi |
|
95
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
580 mov %rsi, %rdi |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
581 mov %ecx, %esi |
|
95
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
582 call get_native_address_trans |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
583 mov %rax, %rcx |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
584 pop %rsi |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
585 call m68k_load_context |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
586 ret |
|
193
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
587 |
|
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
588 .global m68k_retrans_stub |
|
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
589 m68k_retrans_stub: |
|
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
590 call m68k_save_context |
|
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
591 push %rsi |
|
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
592 call m68k_retranslate_inst |
|
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
593 pop %rsi |
|
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
594 mov %rax, %rcx |
|
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
595 call m68k_load_context |
|
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
596 jmp *%rcx |
|
53
44e661913a51
Add preliminary support for JMP
Mike Pavone <pavone@retrodev.com>
parents:
18
diff
changeset
|
597 |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
598 .global m68k_save_context |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
599 m68k_save_context: |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
600 mov %bl, 1(%rsi) /* N Flag */ |
| 207 | 601 mov %dl, 2(%rsi) /* Z flag */ |
| 602 mov %bh, 3(%rsi) /* V flag */ | |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
603 mov %dh, 4(%rsi) /* C flag */ |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
604 mov %r10d, 8(%rsi) /* d0 */ |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
605 mov %r11d, 12(%rsi) /* d1 */ |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
606 mov %r12d, 16(%rsi) /* d2 */ |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
607 mov %r13d, 40(%rsi) /* a0 */ |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
608 mov %r14d, 44(%rsi) /* a1 */ |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
609 mov %r15d, 68(%rsi) /* a7 */ |
|
72
7935cd64d5c8
Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents:
66
diff
changeset
|
610 mov %eax, 80(%rsi) /* current cycle count */ |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
611 ret |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
612 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
613 .global m68k_load_context |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
614 m68k_load_context: |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
615 mov 1(%rsi), %bl /* N Flag */ |
| 207 | 616 mov 2(%rsi), %dl /* Z flag */ |
| 617 mov 3(%rsi), %bh /* V flag */ | |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
618 mov 4(%rsi), %dh /* C flag */ |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
619 mov 8(%rsi), %r10d /* d0 */ |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
620 mov 12(%rsi), %r11d /* d1 */ |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
621 mov 16(%rsi), %r12d /* d2 */ |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
622 mov 40(%rsi), %r13d /* a0 */ |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
623 mov 44(%rsi), %r14d /* a1 */ |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
624 mov 68(%rsi), %r15d /* a7 */ |
|
72
7935cd64d5c8
Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents:
66
diff
changeset
|
625 mov 76(%rsi), %ebp /* target cycle count */ |
|
7935cd64d5c8
Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents:
66
diff
changeset
|
626 mov 80(%rsi), %eax /* current cycle count */ |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
627 mov 96(%rsi), %r8d /* cartridge address */ |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
628 mov 104(%rsi), %r9d /* work ram address */ |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
629 ret |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
630 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
631 .global m68k_start_context |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
632 m68k_start_context: |
|
208
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
207
diff
changeset
|
633 push %rbp |
|
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
207
diff
changeset
|
634 push %r12 |
|
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
207
diff
changeset
|
635 push %r13 |
|
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
207
diff
changeset
|
636 push %r14 |
|
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
207
diff
changeset
|
637 push %r15 |
|
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
207
diff
changeset
|
638 |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
639 call m68k_load_context |
|
208
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
207
diff
changeset
|
640 call *%rdi |
|
209
922b59c09259
Flag fixes for div, negx and not
Mike Pavone <pavone@retrodev.com>
parents:
208
diff
changeset
|
641 call m68k_save_context |
|
208
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
207
diff
changeset
|
642 |
|
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
207
diff
changeset
|
643 pop %r15 |
|
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
207
diff
changeset
|
644 pop %r14 |
|
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
207
diff
changeset
|
645 pop %r13 |
|
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
207
diff
changeset
|
646 pop %r12 |
|
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
207
diff
changeset
|
647 pop %rbp |
|
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
207
diff
changeset
|
648 |
|
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
207
diff
changeset
|
649 ret |