Mercurial > repos > blastem
annotate vdp.c @ 322:8e2fa485c0f2
Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
| author | Mike Pavone <pavone@retrodev.com> |
|---|---|
| date | Sat, 11 May 2013 22:45:05 -0700 |
| parents | 789f2f5f2277 |
| children | 8c01b4154480 |
| rev | line source |
|---|---|
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1 #include "vdp.h" |
| 75 | 2 #include "blastem.h" |
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3 #include <stdlib.h> |
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4 #include <string.h> |
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5 |
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6 #define NTSC_ACTIVE 225 |
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7 #define PAL_ACTIVE 241 |
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8 #define BUF_BIT_PRIORITY 0x40 |
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9 #define MAP_BIT_PRIORITY 0x8000 |
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10 #define MAP_BIT_H_FLIP 0x800 |
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11 #define MAP_BIT_V_FLIP 0x1000 |
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12 |
| 75 | 13 #define BIT_PAL 0x8 |
| 14 #define BIT_DMA_ENABLE 0x4 | |
| 15 #define BIT_H40 0x1 | |
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16 |
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17 #define BIT_HILIGHT 0x8 |
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18 |
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19 #define SCROLL_BUFFER_SIZE 32 |
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20 #define SCROLL_BUFFER_DRAW 16 |
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21 |
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22 #define FIFO_SIZE 4 |
| 40 | 23 |
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24 void init_vdp_context(vdp_context * context) |
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25 { |
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26 memset(context, 0, sizeof(*context)); |
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27 context->vdpmem = malloc(VRAM_SIZE); |
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28 memset(context->vdpmem, 0, VRAM_SIZE); |
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29 context->framebuf = malloc(FRAMEBUF_SIZE); |
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30 memset(context->framebuf, 0, FRAMEBUF_SIZE); |
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31 context->linebuf = malloc(LINEBUF_SIZE + SCROLL_BUFFER_SIZE*2); |
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32 memset(context->linebuf, 0, LINEBUF_SIZE + SCROLL_BUFFER_SIZE*2); |
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33 context->tmp_buf_a = context->linebuf + LINEBUF_SIZE; |
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34 context->tmp_buf_b = context->tmp_buf_a + SCROLL_BUFFER_SIZE; |
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35 context->sprite_draws = MAX_DRAWS; |
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36 context->fifo_cur = malloc(sizeof(fifo_entry) * FIFO_SIZE); |
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37 context->fifo_end = context->fifo_cur + FIFO_SIZE; |
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38 } |
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39 |
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40 void render_sprite_cells(vdp_context * context) |
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41 { |
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42 if (context->cur_slot >= context->sprite_draws) { |
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43 sprite_draw * d = context->sprite_draw_list + context->cur_slot; |
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44 |
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45 uint16_t dir; |
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46 int16_t x; |
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47 if (d->h_flip) { |
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48 x = d->x_pos + 7; |
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49 dir = -1; |
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50 } else { |
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51 x = d->x_pos; |
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52 dir = 1; |
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53 } |
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54 //printf("Draw Slot %d of %d, Rendering sprite cell from %X to x: %d\n", context->cur_slot, context->sprite_draws, d->address, x); |
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55 context->cur_slot--; |
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56 for (uint16_t address = d->address; address != ((d->address+4) & 0xFFFF); address++) { |
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57 if (x >= 0 && x < 320 && !(context->linebuf[x] & 0xF)) { |
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58 context->linebuf[x] = (context->vdpmem[address] >> 4) | d->pal_priority; |
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59 } |
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60 x += dir; |
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61 if (x >= 0 && x < 320 && !(context->linebuf[x] & 0xF)) { |
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62 context->linebuf[x] = (context->vdpmem[address] & 0xF) | d->pal_priority; |
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63 } |
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64 x += dir; |
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65 } |
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66 } |
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67 } |
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68 |
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69 void vdp_print_sprite_table(vdp_context * context) |
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70 { |
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71 uint16_t sat_address = (context->regs[REG_SAT] & 0x7F) << 9; |
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72 uint16_t current_index = 0; |
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73 uint8_t count = 0; |
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74 do { |
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75 uint16_t address = current_index * 8 + sat_address; |
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76 uint8_t height = ((context->vdpmem[address+2] & 0x3) + 1) * 8; |
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77 uint8_t width = (((context->vdpmem[address+2] >> 2) & 0x3) + 1) * 8; |
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78 int16_t y = ((context->vdpmem[address] & 0x3) << 8 | context->vdpmem[address+1]) & 0x1FF; |
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79 int16_t x = ((context->vdpmem[address+ 2] & 0x3) << 8 | context->vdpmem[address + 3]) & 0x1FF; |
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80 uint16_t link = context->vdpmem[address+3] & 0x7F; |
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81 printf("Sprite %d: X=%d, Y=%d, Width=%u, Height=%u, Link=%u\n", current_index, x, y, width, height, link); |
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82 current_index = link; |
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83 count++; |
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84 } while (current_index != 0 && count < 80); |
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85 } |
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86 |
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87 void scan_sprite_table(uint32_t line, vdp_context * context) |
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88 { |
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89 if (context->sprite_index && context->slot_counter) { |
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90 line += 1; |
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91 line &= 0xFF; |
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92 context->sprite_index &= 0x7F; |
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93 if (context->latched_mode & BIT_H40) { |
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94 if (context->sprite_index >= MAX_SPRITES_FRAME) { |
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95 context->sprite_index = 0; |
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96 return; |
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97 } |
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98 } else if(context->sprite_index >= MAX_SPRITES_FRAME_H32) { |
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99 context->sprite_index = 0; |
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100 return; |
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101 } |
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102 //TODO: Read from SAT cache rather than from VRAM |
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103 uint16_t sat_address = (context->regs[REG_SAT] & 0x7F) << 9; |
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104 uint16_t address = context->sprite_index * 8 + sat_address; |
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105 line += 128; |
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106 uint16_t y = ((context->vdpmem[address] & 0x3) << 8 | context->vdpmem[address+1]); |
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107 uint8_t height = ((context->vdpmem[address+2] & 0x3) + 1) * 8; |
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108 //printf("Sprite %d | y: %d, height: %d\n", context->sprite_index, y, height); |
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109 if (y <= line && line < (y + height)) { |
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110 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line); |
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111 context->sprite_info_list[--(context->slot_counter)].size = context->vdpmem[address+2]; |
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112 context->sprite_info_list[context->slot_counter].index = context->sprite_index; |
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113 context->sprite_info_list[context->slot_counter].y = y-128; |
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114 } |
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115 context->sprite_index = context->vdpmem[address+3] & 0x7F; |
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116 if (context->sprite_index && context->slot_counter) |
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117 { |
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118 address = context->sprite_index * 8 + sat_address; |
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119 y = ((context->vdpmem[address] & 0x3) << 8 | context->vdpmem[address+1]); |
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120 height = ((context->vdpmem[address+2] & 0x3) + 1) * 8; |
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121 if (y <= line && line < (y + height)) { |
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122 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line); |
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123 context->sprite_info_list[--(context->slot_counter)].size = context->vdpmem[address+2]; |
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124 context->sprite_info_list[context->slot_counter].index = context->sprite_index; |
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125 context->sprite_info_list[context->slot_counter].y = y-128; |
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126 } |
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127 context->sprite_index = context->vdpmem[address+3] & 0x7F; |
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128 } |
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129 } |
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130 } |
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131 |
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132 void read_sprite_x(uint32_t line, vdp_context * context) |
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133 { |
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134 if (context->cur_slot >= context->slot_counter) { |
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135 if (context->sprite_draws) { |
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136 line += 1; |
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137 line &= 0xFF; |
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138 //in tiles |
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139 uint8_t width = ((context->sprite_info_list[context->cur_slot].size >> 2) & 0x3) + 1; |
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140 //in pixels |
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141 uint8_t height = ((context->sprite_info_list[context->cur_slot].size & 0x3) + 1) * 8; |
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142 uint16_t att_addr = ((context->regs[REG_SAT] & 0x7F) << 9) + context->sprite_info_list[context->cur_slot].index * 8 + 4; |
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143 uint16_t tileinfo = (context->vdpmem[att_addr] << 8) | context->vdpmem[att_addr+1]; |
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144 uint8_t pal_priority = (tileinfo >> 9) & 0x70; |
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145 uint8_t row; |
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146 if (tileinfo & MAP_BIT_V_FLIP) { |
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147 row = (context->sprite_info_list[context->cur_slot].y + height - 1) - line; |
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148 } else { |
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149 row = line-context->sprite_info_list[context->cur_slot].y; |
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150 } |
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151 uint16_t address = ((tileinfo & 0x7FF) << 5) + row * 4; |
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152 int16_t x = ((context->vdpmem[att_addr+ 2] & 0x3) << 8) | context->vdpmem[att_addr + 3]; |
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153 if (x) { |
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154 context->flags |= FLAG_CAN_MASK; |
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155 } else if(context->flags & (FLAG_CAN_MASK | FLAG_DOT_OFLOW)) { |
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156 context->flags |= FLAG_MASKED; |
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157 } |
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158 |
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159 context->flags &= ~FLAG_DOT_OFLOW; |
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160 int16_t i; |
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161 if (context->flags & FLAG_MASKED) { |
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162 for (i=0; i < width && context->sprite_draws; i++) { |
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163 --context->sprite_draws; |
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164 context->sprite_draw_list[context->sprite_draws].x_pos = -128; |
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165 } |
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166 } else { |
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167 x -= 128; |
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168 int16_t base_x = x; |
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169 int16_t dir; |
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170 if (tileinfo & MAP_BIT_H_FLIP) { |
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171 x += (width-1) * 8; |
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172 dir = -8; |
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173 } else { |
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174 dir = 8; |
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175 } |
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176 //printf("Sprite %d | x: %d, y: %d, width: %d, height: %d, pal_priority: %X, row: %d, tile addr: %X\n", context->sprite_info_list[context->cur_slot].index, x, context->sprite_info_list[context->cur_slot].y, width, height, pal_priority, row, address); |
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177 for (i=0; i < width && context->sprite_draws; i++, x += dir) { |
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178 --context->sprite_draws; |
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179 context->sprite_draw_list[context->sprite_draws].address = address + i * height * 4; |
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180 context->sprite_draw_list[context->sprite_draws].x_pos = x; |
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181 context->sprite_draw_list[context->sprite_draws].pal_priority = pal_priority; |
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182 context->sprite_draw_list[context->sprite_draws].h_flip = (tileinfo & MAP_BIT_H_FLIP) ? 1 : 0; |
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183 } |
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184 } |
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185 if (i < width) { |
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186 context->flags |= FLAG_DOT_OFLOW; |
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187 } |
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188 context->cur_slot--; |
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189 } else { |
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190 context->flags |= FLAG_DOT_OFLOW; |
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191 } |
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192 } |
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193 } |
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194 |
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195 #define VRAM_READ 0 |
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196 #define VRAM_WRITE 1 |
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197 #define CRAM_READ 8 |
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198 #define CRAM_WRITE 3 |
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199 #define VSRAM_READ 4 |
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200 #define VSRAM_WRITE 5 |
| 75 | 201 #define DMA_START 0x20 |
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202 |
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203 void external_slot(vdp_context * context) |
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204 { |
| 75 | 205 //TODO: Figure out what happens if CD bit 4 is not set in DMA copy mode |
| 206 //TODO: Figure out what happens when CD:0-3 is not set to a write mode in DMA operations | |
| 207 //TODO: Figure out what happens if DMA gets disabled part way through a DMA fill or DMA copy | |
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208 if(context->flags & FLAG_DMA_RUN) { |
| 75 | 209 uint16_t dma_len; |
| 210 switch(context->regs[REG_DMASRC_H] & 0xC0) | |
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211 { |
| 75 | 212 //68K -> VDP |
| 213 case 0: | |
| 214 case 0x40: | |
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215 switch(context->dma_cd & 0xF) |
| 75 | 216 { |
| 217 case VRAM_WRITE: | |
| 218 if (context->flags & FLAG_DMA_PROG) { | |
| 219 context->vdpmem[context->address ^ 1] = context->dma_val; | |
| 220 context->flags &= ~FLAG_DMA_PROG; | |
| 221 } else { | |
| 222 context->dma_val = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); | |
| 223 context->vdpmem[context->address] = context->dma_val >> 8; | |
| 224 context->flags |= FLAG_DMA_PROG; | |
| 225 } | |
| 226 break; | |
| 227 case CRAM_WRITE: | |
| 228 context->cram[(context->address/2) & (CRAM_SIZE-1)] = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); | |
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229 //printf("CRAM DMA | %X set to %X from %X at %d\n", (context->address/2) & (CRAM_SIZE-1), context->cram[(context->address/2) & (CRAM_SIZE-1)], (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->cycles); |
| 75 | 230 break; |
| 231 case VSRAM_WRITE: | |
| 232 if (((context->address/2) & 63) < VSRAM_SIZE) { | |
| 233 context->vsram[(context->address/2) & 63] = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); | |
| 234 } | |
| 235 break; | |
|
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236 } |
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237 break; |
| 75 | 238 //Fill |
| 239 case 0x80: | |
|
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240 switch(context->dma_cd & 0xF) |
| 75 | 241 { |
| 242 case VRAM_WRITE: | |
| 243 //Charles MacDonald's VDP doc says that the low byte gets written first | |
| 142 | 244 context->vdpmem[context->address] = context->dma_val; |
| 245 context->dma_val = (context->dma_val << 8) | ((context->dma_val >> 8) & 0xFF); | |
| 75 | 246 break; |
| 247 case CRAM_WRITE: | |
| 248 context->cram[(context->address/2) & (CRAM_SIZE-1)] = context->dma_val; | |
| 249 break; | |
| 250 case VSRAM_WRITE: | |
| 251 if (((context->address/2) & 63) < VSRAM_SIZE) { | |
| 252 context->vsram[(context->address/2) & 63] = context->dma_val; | |
| 253 } | |
| 254 break; | |
| 255 } | |
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256 break; |
| 75 | 257 //Copy |
| 258 case 0xC0: | |
| 259 if (context->flags & FLAG_DMA_PROG) { | |
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260 switch(context->dma_cd & 0xF) |
| 75 | 261 { |
| 262 case VRAM_WRITE: | |
| 263 context->vdpmem[context->address] = context->dma_val; | |
| 264 break; | |
| 265 case CRAM_WRITE: | |
| 266 context->cram[(context->address/2) & (CRAM_SIZE-1)] = context->dma_val; | |
| 267 break; | |
| 268 case VSRAM_WRITE: | |
| 269 if (((context->address/2) & 63) < VSRAM_SIZE) { | |
| 270 context->vsram[(context->address/2) & 63] = context->dma_val; | |
| 271 } | |
| 272 break; | |
| 273 } | |
| 274 context->flags &= ~FLAG_DMA_PROG; | |
| 275 } else { | |
| 276 //I assume, that DMA copy copies from the same RAM as the destination | |
| 277 //but it's possible I'm mistaken | |
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278 switch(context->dma_cd & 0xF) |
| 75 | 279 { |
| 280 case VRAM_WRITE: | |
| 281 context->dma_val = context->vdpmem[(context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]]; | |
| 282 break; | |
| 283 case CRAM_WRITE: | |
| 284 context->dma_val = context->cram[context->regs[REG_DMASRC_L] & (CRAM_SIZE-1)]; | |
| 285 break; | |
| 286 case VSRAM_WRITE: | |
| 287 if ((context->regs[REG_DMASRC_L] & 63) < VSRAM_SIZE) { | |
| 288 context->dma_val = context->vsram[context->regs[REG_DMASRC_L] & 63]; | |
| 289 } else { | |
| 290 context->dma_val = 0; | |
| 291 } | |
| 292 break; | |
| 293 } | |
| 294 context->flags |= FLAG_DMA_PROG; | |
|
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295 } |
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296 break; |
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297 } |
| 75 | 298 if (!(context->flags & FLAG_DMA_PROG)) { |
| 299 context->address += context->regs[REG_AUTOINC]; | |
| 300 context->regs[REG_DMASRC_L] += 1; | |
| 135 | 301 if (!context->regs[REG_DMASRC_L]) { |
| 302 context->regs[REG_DMASRC_M] += 1; | |
| 303 } | |
| 75 | 304 dma_len = ((context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L]) - 1; |
| 305 context->regs[REG_DMALEN_H] = dma_len >> 8; | |
| 306 context->regs[REG_DMALEN_L] = dma_len; | |
| 307 if (!dma_len) { | |
| 308 context->flags &= ~FLAG_DMA_RUN; | |
| 309 } | |
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310 } |
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311 } else { |
| 75 | 312 fifo_entry * start = (context->fifo_end - FIFO_SIZE); |
| 313 if (context->fifo_cur != start && start->cycle <= context->cycles) { | |
| 314 if ((context->regs[REG_MODE_2] & BIT_DMA_ENABLE) && (context->cd & DMA_START)) { | |
| 315 context->flags |= FLAG_DMA_RUN; | |
| 316 context->dma_val = start->value; | |
| 138 | 317 context->address = start->address; //undo auto-increment |
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318 context->dma_cd = context->cd; |
| 75 | 319 } else { |
| 138 | 320 switch (start->cd & 0xF) |
| 75 | 321 { |
| 322 case VRAM_WRITE: | |
| 323 if (start->partial) { | |
| 324 //printf("VRAM Write: %X to %X\n", start->value, context->address ^ 1); | |
| 138 | 325 context->vdpmem[start->address ^ 1] = start->value; |
| 75 | 326 } else { |
| 327 //printf("VRAM Write High: %X to %X\n", start->value >> 8, context->address); | |
| 138 | 328 context->vdpmem[start->address] = start->value >> 8; |
| 75 | 329 start->partial = 1; |
| 330 //skip auto-increment and removal of entry from fifo | |
| 331 return; | |
| 332 } | |
| 333 break; | |
| 334 case CRAM_WRITE: | |
|
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335 //printf("CRAM Write | %X to %X\n", start->value, (start->address/2) & (CRAM_SIZE-1)); |
| 138 | 336 context->cram[(start->address/2) & (CRAM_SIZE-1)] = start->value; |
| 75 | 337 break; |
| 338 case VSRAM_WRITE: | |
| 138 | 339 if (((start->address/2) & 63) < VSRAM_SIZE) { |
| 75 | 340 //printf("VSRAM Write: %X to %X\n", start->value, context->address); |
| 138 | 341 context->vsram[(start->address/2) & 63] = start->value; |
| 75 | 342 } |
| 343 break; | |
| 344 } | |
| 138 | 345 //context->address += context->regs[REG_AUTOINC]; |
| 75 | 346 } |
| 347 fifo_entry * cur = start+1; | |
| 348 if (cur < context->fifo_cur) { | |
| 349 memmove(start, cur, sizeof(fifo_entry) * (context->fifo_cur - cur)); | |
| 350 } | |
| 351 context->fifo_cur -= 1; | |
| 352 } else { | |
| 353 context->flags |= FLAG_UNUSED_SLOT; | |
| 354 } | |
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355 } |
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356 } |
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357 |
| 40 | 358 #define WINDOW_RIGHT 0x80 |
| 359 #define WINDOW_DOWN 0x80 | |
| 360 | |
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361 void read_map_scroll(uint16_t column, uint16_t vsram_off, uint32_t line, uint16_t address, uint16_t hscroll_val, vdp_context * context) |
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362 { |
| 40 | 363 if (!vsram_off) { |
| 364 uint16_t left_col, right_col; | |
| 365 if (context->regs[REG_WINDOW_H] & WINDOW_RIGHT) { | |
|
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366 left_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2; |
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367 right_col = 42; |
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368 } else { |
| 40 | 369 left_col = 0; |
| 370 right_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2; | |
| 371 if (right_col) { | |
| 372 right_col += 2; | |
| 373 } | |
| 374 } | |
|
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375 uint16_t top_line, bottom_line; |
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376 if (context->regs[REG_WINDOW_V] & WINDOW_DOWN) { |
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377 top_line = (context->regs[REG_WINDOW_V] & 0x1F) * 8; |
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378 bottom_line = 241; |
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379 } else { |
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380 top_line = 0; |
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381 bottom_line = (context->regs[REG_WINDOW_V] & 0x1F) * 8; |
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382 } |
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383 if ((column >= left_col && column < right_col) || (line >= top_line && line < bottom_line)) { |
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384 uint16_t address = context->regs[REG_WINDOW] << 10; |
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385 uint16_t line_offset, offset, mask; |
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386 if (context->latched_mode & BIT_H40) { |
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387 address &= 0xF000; |
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388 line_offset = (((line) / 8) * 64 * 2) & 0xFFF; |
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389 mask = 0x7F; |
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390 |
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391 } else { |
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392 address &= 0xF800; |
|
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393 line_offset = (((line) / 8) * 32 * 2) & 0xFFF; |
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394 mask = 0x3F; |
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395 } |
|
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396 offset = address + line_offset + (((column - 2) * 2) & mask); |
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397 context->col_1 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
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398 //printf("Window | top: %d, bot: %d, left: %d, right: %d, base: %X, line: %X offset: %X, tile: %X, reg: %X\n", top_line, bottom_line, left_col, right_col, address, line_offset, offset, ((context->col_1 & 0x3FF) << 5), context->regs[REG_WINDOW]); |
|
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399 offset = address + line_offset + (((column - 1) * 2) & mask); |
|
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400 context->col_2 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
|
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401 context->v_offset = (line) & 0x7; |
|
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402 context->flags |= FLAG_WINDOW; |
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403 return; |
| 40 | 404 } |
| 405 context->flags &= ~FLAG_WINDOW; | |
| 406 } | |
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407 uint16_t vscroll; |
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408 switch(context->regs[REG_SCROLL] & 0x30) |
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409 { |
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410 case 0: |
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411 vscroll = 0xFF; |
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412 break; |
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413 case 0x10: |
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414 vscroll = 0x1FF; |
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415 break; |
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416 case 0x20: |
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417 //TODO: Verify this behavior |
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418 vscroll = 0; |
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419 break; |
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420 case 0x30: |
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421 vscroll = 0x3FF; |
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422 break; |
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423 } |
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424 vscroll &= (context->vsram[(context->regs[REG_MODE_3] & 0x4 ? column : 0) + vsram_off] + line); |
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425 context->v_offset = vscroll & 0x7; |
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426 //printf("%s | line %d, vsram: %d, vscroll: %d, v_offset: %d\n",(vsram_off ? "B" : "A"), line, context->vsram[context->regs[REG_MODE_3] & 0x4 ? column : 0], vscroll, context->v_offset); |
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427 vscroll /= 8; |
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428 uint16_t hscroll_mask; |
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429 uint16_t v_mul; |
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430 switch(context->regs[REG_SCROLL] & 0x3) |
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431 { |
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432 case 0: |
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433 hscroll_mask = 0x1F; |
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434 v_mul = 64; |
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435 break; |
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436 case 0x1: |
|
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437 hscroll_mask = 0x3F; |
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438 v_mul = 128; |
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439 break; |
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440 case 0x2: |
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441 //TODO: Verify this behavior |
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442 hscroll_mask = 0; |
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443 v_mul = 0; |
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444 break; |
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445 case 0x3: |
|
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446 hscroll_mask = 0x7F; |
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447 v_mul = 256; |
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448 break; |
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449 } |
| 28 | 450 uint16_t hscroll, offset; |
| 451 for (int i = 0; i < 2; i++) { | |
|
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452 hscroll = (column - 2 + i - ((hscroll_val/8) & 0xFFFE)) & hscroll_mask; |
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453 offset = address + ((vscroll * v_mul + hscroll*2) & 0x1FFF); |
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454 //printf("%s | line: %d, col: %d, x: %d, hs_mask %X, scr reg: %X, tbl addr: %X\n", (vsram_off ? "B" : "A"), line, (column-2+i), hscroll, hscroll_mask, context->regs[REG_SCROLL], offset); |
| 28 | 455 uint16_t col_val = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
| 456 if (i) { | |
| 457 context->col_2 = col_val; | |
| 458 } else { | |
| 459 context->col_1 = col_val; | |
| 460 } | |
| 461 } | |
|
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462 } |
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463 |
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464 void read_map_scroll_a(uint16_t column, uint32_t line, vdp_context * context) |
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465 { |
|
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466 read_map_scroll(column, 0, line, (context->regs[REG_SCROLL_A] & 0x38) << 10, context->hscroll_a, context); |
|
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467 } |
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468 |
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469 void read_map_scroll_b(uint16_t column, uint32_t line, vdp_context * context) |
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470 { |
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471 read_map_scroll(column, 1, line, (context->regs[REG_SCROLL_B] & 0x7) << 13, context->hscroll_b, context); |
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472 } |
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473 |
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474 void render_map(uint16_t col, uint8_t * tmp_buf, vdp_context * context) |
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475 { |
|
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476 uint16_t address = ((col & 0x7FF) << 5); |
|
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477 if (col & MAP_BIT_V_FLIP) { |
|
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478 address += 28 - 4 * context->v_offset; |
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479 } else { |
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480 address += 4 * context->v_offset; |
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481 } |
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482 uint16_t pal_priority = (col >> 9) & 0x70; |
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483 int32_t dir; |
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484 if (col & MAP_BIT_H_FLIP) { |
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485 tmp_buf += 7; |
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486 dir = -1; |
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487 } else { |
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488 dir = 1; |
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489 } |
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490 for (uint32_t i=0; i < 4; i++, address++) |
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491 { |
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492 *tmp_buf = pal_priority | (context->vdpmem[address] >> 4); |
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493 tmp_buf += dir; |
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494 *tmp_buf = pal_priority | (context->vdpmem[address] & 0xF); |
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495 tmp_buf += dir; |
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496 } |
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497 } |
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498 |
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499 void render_map_1(vdp_context * context) |
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500 { |
|
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501 render_map(context->col_1, context->tmp_buf_a+SCROLL_BUFFER_DRAW, context); |
|
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502 } |
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503 |
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504 void render_map_2(vdp_context * context) |
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505 { |
|
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506 render_map(context->col_2, context->tmp_buf_a+SCROLL_BUFFER_DRAW+8, context); |
|
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507 } |
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508 |
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509 void render_map_3(vdp_context * context) |
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510 { |
|
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511 render_map(context->col_1, context->tmp_buf_b+SCROLL_BUFFER_DRAW, context); |
|
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512 } |
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513 |
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514 void render_map_output(uint32_t line, int32_t col, vdp_context * context) |
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515 { |
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516 if (line >= 240) { |
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517 return; |
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518 } |
|
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519 render_map(context->col_2, context->tmp_buf_b+SCROLL_BUFFER_DRAW+8, context); |
|
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520 uint16_t *dst, *end; |
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521 uint8_t *sprite_buf, *plane_a, *plane_b; |
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522 if (col) |
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523 { |
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524 col-=2; |
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525 dst = context->framebuf + line * 320 + col * 8; |
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526 sprite_buf = context->linebuf + col * 8; |
|
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527 uint16_t a_src; |
| 40 | 528 if (context->flags & FLAG_WINDOW) { |
| 529 plane_a = context->tmp_buf_a + SCROLL_BUFFER_DRAW; | |
|
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|
530 a_src = FBUF_SRC_W; |
| 40 | 531 } else { |
| 532 plane_a = context->tmp_buf_a + SCROLL_BUFFER_DRAW - (context->hscroll_a & 0xF); | |
|
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533 a_src = FBUF_SRC_A; |
| 40 | 534 } |
|
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|
535 plane_b = context->tmp_buf_b + SCROLL_BUFFER_DRAW - (context->hscroll_b & 0xF); |
| 30 | 536 end = dst + 16; |
|
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537 uint16_t src; |
| 30 | 538 //printf("A | tmp_buf offset: %d\n", 8 - (context->hscroll_a & 0x7)); |
|
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|
539 |
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540 if (context->regs[REG_MODE_4] & BIT_HILIGHT) { |
|
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541 for (; dst < end; ++plane_a, ++plane_b, ++sprite_buf, ++dst) { |
|
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542 uint8_t pixel; |
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543 |
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544 src = 0; |
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545 uint8_t sprite_color = *sprite_buf & 0x3F; |
|
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546 if (sprite_color == 0x3E || sprite_color == 0x3F) { |
|
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547 if (sprite_color == 0x3F) { |
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548 src = FBUF_SHADOW; |
|
230
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549 } else { |
|
232
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550 src = FBUF_HILIGHT; |
|
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551 } |
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552 if (*plane_a & BUF_BIT_PRIORITY && *plane_a & 0xF) { |
|
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553 pixel = *plane_a; |
|
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554 src |= a_src; |
|
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555 } else if (*plane_b & BUF_BIT_PRIORITY && *plane_b & 0xF) { |
|
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556 pixel = *plane_b; |
|
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557 src |= FBUF_SRC_B; |
|
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558 } else if (*plane_a & 0xF) { |
|
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559 pixel = *plane_a; |
|
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560 src |= a_src; |
|
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561 } else if (*plane_b & 0xF){ |
|
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|
562 pixel = *plane_b; |
|
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Mike Pavone <pavone@retrodev.com>
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191
diff
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|
563 src |= FBUF_SRC_B; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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191
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|
564 } else { |
|
d3266cee02c9
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Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
565 pixel = context->regs[REG_BG_COLOR] & 0x3F; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
566 src |= FBUF_SRC_BG; |
|
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Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
567 } |
|
d3266cee02c9
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Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
568 } else { |
|
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Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
569 if (*sprite_buf & BUF_BIT_PRIORITY && *sprite_buf & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
570 pixel = *sprite_buf; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
571 src = FBUF_SRC_S; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
572 } else if (*plane_a & BUF_BIT_PRIORITY && *plane_a & 0xF) { |
|
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Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
573 pixel = *plane_a; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
574 src = a_src; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
575 } else if (*plane_b & BUF_BIT_PRIORITY && *plane_b & 0xF) { |
|
d3266cee02c9
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parents:
191
diff
changeset
|
576 pixel = *plane_b; |
|
d3266cee02c9
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parents:
191
diff
changeset
|
577 src = FBUF_SRC_B; |
|
233
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232
diff
changeset
|
578 } else { |
|
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232
diff
changeset
|
579 if (!(*plane_a & BUF_BIT_PRIORITY || *plane_a & BUF_BIT_PRIORITY)) { |
|
9d10669f2579
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232
diff
changeset
|
580 src = FBUF_SHADOW; |
|
230
d3266cee02c9
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parents:
191
diff
changeset
|
581 } |
|
233
9d10669f2579
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232
diff
changeset
|
582 if (*sprite_buf & 0xF) { |
|
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232
diff
changeset
|
583 pixel = *sprite_buf; |
|
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Mike Pavone <pavone@retrodev.com>
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232
diff
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|
584 if (*sprite_buf & 0xF == 0xE) { |
|
9d10669f2579
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changeset
|
585 src = FBUF_SRC_S; |
|
9d10669f2579
Less broken implementation of shadow/highlight
Mike Pavone <pavone@retrodev.com>
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232
diff
changeset
|
586 } else { |
|
9d10669f2579
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Mike Pavone <pavone@retrodev.com>
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232
diff
changeset
|
587 src |= FBUF_SRC_S; |
|
9d10669f2579
Less broken implementation of shadow/highlight
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232
diff
changeset
|
588 } |
|
9d10669f2579
Less broken implementation of shadow/highlight
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232
diff
changeset
|
589 } else if (*plane_a & 0xF) { |
|
9d10669f2579
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parents:
232
diff
changeset
|
590 pixel = *plane_a; |
|
9d10669f2579
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parents:
232
diff
changeset
|
591 src |= a_src; |
|
9d10669f2579
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Mike Pavone <pavone@retrodev.com>
parents:
232
diff
changeset
|
592 } else if (*plane_b & 0xF){ |
|
9d10669f2579
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Mike Pavone <pavone@retrodev.com>
parents:
232
diff
changeset
|
593 pixel = *plane_b; |
|
9d10669f2579
Less broken implementation of shadow/highlight
Mike Pavone <pavone@retrodev.com>
parents:
232
diff
changeset
|
594 src |= FBUF_SRC_B; |
|
9d10669f2579
Less broken implementation of shadow/highlight
Mike Pavone <pavone@retrodev.com>
parents:
232
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changeset
|
595 } else { |
|
9d10669f2579
Less broken implementation of shadow/highlight
Mike Pavone <pavone@retrodev.com>
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232
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changeset
|
596 pixel = context->regs[REG_BG_COLOR] & 0x3F; |
|
9d10669f2579
Less broken implementation of shadow/highlight
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parents:
232
diff
changeset
|
597 src |= FBUF_SRC_BG; |
|
9d10669f2579
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parents:
232
diff
changeset
|
598 } |
|
230
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
599 } |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
600 } |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
601 *dst = (context->cram[pixel & 0x3F] & 0xEEE) | ((pixel & BUF_BIT_PRIORITY) ? FBUF_BIT_PRIORITY : 0) | src; |
|
20
f664eeb55cb4
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parents:
diff
changeset
|
602 } |
|
230
d3266cee02c9
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parents:
191
diff
changeset
|
603 } else { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
604 for (; dst < end; ++plane_a, ++plane_b, ++sprite_buf, ++dst) { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
605 uint8_t pixel; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
606 if (*sprite_buf & BUF_BIT_PRIORITY && *sprite_buf & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
607 pixel = *sprite_buf; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
608 src = FBUF_SRC_S; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
609 } else if (*plane_a & BUF_BIT_PRIORITY && *plane_a & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
610 pixel = *plane_a; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
611 src = a_src; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
612 } else if (*plane_b & BUF_BIT_PRIORITY && *plane_b & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
613 pixel = *plane_b; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
614 src = FBUF_SRC_B; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
615 } else if (*sprite_buf & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
616 pixel = *sprite_buf; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
617 src = FBUF_SRC_S; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
618 } else if (*plane_a & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
619 pixel = *plane_a; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
620 src = a_src; |
|
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Implemented shadow hilight mode.
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191
diff
changeset
|
621 } else if (*plane_b & 0xF){ |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
622 pixel = *plane_b; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
623 src = FBUF_SRC_B; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
624 } else { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
625 pixel = context->regs[REG_BG_COLOR] & 0x3F; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
626 src = FBUF_SRC_BG; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
627 } |
|
291
eea3b118940d
Make sure all rendering operations mask CRAM with 0xEEE before using it
Mike Pavone <pavone@retrodev.com>
parents:
233
diff
changeset
|
628 *dst = (context->cram[pixel & 0x3F] & 0xEEE) | ((pixel & BUF_BIT_PRIORITY) ? FBUF_BIT_PRIORITY : 0) | src; |
|
230
d3266cee02c9
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191
diff
changeset
|
629 } |
|
20
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Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
630 } |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
631 } else { |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
632 //dst = context->framebuf + line * 320; |
|
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Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
633 //sprite_buf = context->linebuf + col * 8; |
|
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parents:
diff
changeset
|
634 //plane_a = context->tmp_buf_a + 16 - (context->hscroll_a & 0x7); |
|
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Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
635 //plane_b = context->tmp_buf_b + 16 - (context->hscroll_b & 0x7); |
|
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parents:
diff
changeset
|
636 //end = dst + 8; |
|
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parents:
diff
changeset
|
637 } |
|
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parents:
diff
changeset
|
638 |
| 40 | 639 uint16_t remaining; |
| 640 if (!(context->flags & FLAG_WINDOW)) { | |
| 641 remaining = context->hscroll_a & 0xF; | |
| 642 memcpy(context->tmp_buf_a + SCROLL_BUFFER_DRAW - remaining, context->tmp_buf_a + SCROLL_BUFFER_SIZE - remaining, remaining); | |
| 643 } | |
|
39
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
changeset
|
644 remaining = context->hscroll_b & 0xF; |
|
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
changeset
|
645 memcpy(context->tmp_buf_b + SCROLL_BUFFER_DRAW - remaining, context->tmp_buf_b + SCROLL_BUFFER_SIZE - remaining, remaining); |
|
20
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parents:
diff
changeset
|
646 } |
|
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parents:
diff
changeset
|
647 |
|
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parents:
diff
changeset
|
648 #define COLUMN_RENDER_BLOCK(column, startcyc) \ |
|
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parents:
diff
changeset
|
649 case startcyc:\ |
|
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parents:
diff
changeset
|
650 read_map_scroll_a(column, line, context);\ |
|
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Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
651 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
652 case (startcyc+1):\ |
|
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parents:
diff
changeset
|
653 external_slot(context);\ |
|
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Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
654 break;\ |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
655 case (startcyc+2):\ |
|
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Mostly broken VDP core and savestate viewer
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diff
changeset
|
656 render_map_1(context);\ |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
657 break;\ |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
658 case (startcyc+3):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
659 render_map_2(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
660 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
661 case (startcyc+4):\ |
|
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Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
662 read_map_scroll_b(column, line, context);\ |
|
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Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
663 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
664 case (startcyc+5):\ |
|
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Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
665 read_sprite_x(line, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
666 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
667 case (startcyc+6):\ |
|
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parents:
diff
changeset
|
668 render_map_3(context);\ |
|
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Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
669 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
670 case (startcyc+7):\ |
|
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Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
671 render_map_output(line, column, context);\ |
|
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Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
672 break; |
|
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Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
673 |
|
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parents:
diff
changeset
|
674 #define COLUMN_RENDER_BLOCK_REFRESH(column, startcyc) \ |
|
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parents:
diff
changeset
|
675 case startcyc:\ |
|
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parents:
diff
changeset
|
676 read_map_scroll_a(column, line, context);\ |
|
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Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
677 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
678 case (startcyc+1):\ |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
679 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
680 case (startcyc+2):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
681 render_map_1(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
682 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
683 case (startcyc+3):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
684 render_map_2(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
685 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
686 case (startcyc+4):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
687 read_map_scroll_b(column, line, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
688 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
689 case (startcyc+5):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
690 read_sprite_x(line, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
691 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
692 case (startcyc+6):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
693 render_map_3(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
694 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
695 case (startcyc+7):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
696 render_map_output(line, column, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
697 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
698 |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
699 void vdp_h40(uint32_t line, uint32_t linecyc, vdp_context * context) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
700 { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
701 uint16_t address; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
702 uint32_t mask; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
703 switch(linecyc) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
704 { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
705 //sprite render to line buffer starts |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
706 case 0: |
|
26
a7c2b92d8056
Fix management of context->sprite_draws so the sprite layer only draws when it should
Mike Pavone <pavone@retrodev.com>
parents:
25
diff
changeset
|
707 context->cur_slot = MAX_DRAWS-1; |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
708 memset(context->linebuf, 0, LINEBUF_SIZE); |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
709 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
710 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
711 case 1: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
712 case 2: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
713 case 3: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
714 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
715 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
716 //sprite attribute table scan starts |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
717 case 4: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
718 render_sprite_cells( context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
719 context->sprite_index = 0x80; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
720 context->slot_counter = MAX_SPRITES_LINE; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
721 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
722 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
723 case 5: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
724 case 6: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
725 case 7: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
726 case 8: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
727 case 9: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
728 case 10: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
729 case 11: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
730 case 12: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
731 case 13: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
732 case 14: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
733 case 15: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
734 case 16: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
735 case 17: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
736 case 18: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
737 case 19: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
738 case 20: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
739 //!HSYNC asserted |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
740 case 21: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
741 case 22: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
742 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
743 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
744 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
745 case 23: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
746 external_slot(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
747 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
748 case 24: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
749 case 25: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
750 case 26: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
751 case 27: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
752 case 28: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
753 case 29: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
754 case 30: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
755 case 31: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
756 case 32: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
757 case 33: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
758 case 34: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
759 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
760 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
761 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
762 case 35: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
763 address = (context->regs[REG_HSCROLL] & 0x3F) << 10; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
764 mask = 0; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
765 if (context->regs[REG_MODE_3] & 0x2) { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
766 mask |= 0xF8; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
767 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
768 if (context->regs[REG_MODE_3] & 0x1) { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
769 mask |= 0x7; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
770 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
771 line &= mask; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
772 address += line * 4; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
773 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1]; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
774 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3]; |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
775 //printf("%d: HScroll A: %d, HScroll B: %d\n", line, context->hscroll_a, context->hscroll_b); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
776 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
777 case 36: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
778 //!HSYNC high |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
779 case 37: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
780 case 38: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
781 case 39: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
782 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
783 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
784 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
785 case 40: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
786 read_map_scroll_a(0, line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
787 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
788 case 41: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
789 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
790 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
791 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
792 case 42: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
793 render_map_1(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
794 scan_sprite_table(line, context);//Just a guess |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
795 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
796 case 43: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
797 render_map_2(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
798 scan_sprite_table(line, context);//Just a guess |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
799 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
800 case 44: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
801 read_map_scroll_b(0, line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
802 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
803 case 45: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
804 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
805 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
806 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
807 case 46: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
808 render_map_3(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
809 scan_sprite_table(line, context);//Just a guess |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
810 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
811 case 47: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
812 render_map_output(line, 0, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
813 scan_sprite_table(line, context);//Just a guess |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
814 //reverse context slot counter so it counts the number of sprite slots |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
815 //filled rather than the number of available slots |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
816 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter; |
|
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
817 context->cur_slot = MAX_SPRITES_LINE-1; |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
818 context->sprite_draws = MAX_DRAWS; |
|
36
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
819 context->flags &= (~FLAG_CAN_MASK & ~FLAG_MASKED); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
820 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
821 COLUMN_RENDER_BLOCK(2, 48) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
822 COLUMN_RENDER_BLOCK(4, 56) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
823 COLUMN_RENDER_BLOCK(6, 64) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
824 COLUMN_RENDER_BLOCK_REFRESH(8, 72) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
825 COLUMN_RENDER_BLOCK(10, 80) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
826 COLUMN_RENDER_BLOCK(12, 88) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
827 COLUMN_RENDER_BLOCK(14, 96) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
828 COLUMN_RENDER_BLOCK_REFRESH(16, 104) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
829 COLUMN_RENDER_BLOCK(18, 112) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
830 COLUMN_RENDER_BLOCK(20, 120) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
831 COLUMN_RENDER_BLOCK(22, 128) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
832 COLUMN_RENDER_BLOCK_REFRESH(24, 136) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
833 COLUMN_RENDER_BLOCK(26, 144) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
834 COLUMN_RENDER_BLOCK(28, 152) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
835 COLUMN_RENDER_BLOCK(30, 160) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
836 COLUMN_RENDER_BLOCK_REFRESH(32, 168) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
837 COLUMN_RENDER_BLOCK(34, 176) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
838 COLUMN_RENDER_BLOCK(36, 184) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
839 COLUMN_RENDER_BLOCK(38, 192) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
840 COLUMN_RENDER_BLOCK_REFRESH(40, 200) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
841 case 208: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
842 case 209: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
843 external_slot(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
844 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
845 default: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
846 //leftovers from HSYNC clock change nonsense |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
847 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
848 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
849 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
850 |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
851 void vdp_h32(uint32_t line, uint32_t linecyc, vdp_context * context) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
852 { |
| 37 | 853 uint16_t address; |
| 854 uint32_t mask; | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
855 switch(linecyc) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
856 { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
857 //sprite render to line buffer starts |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
858 case 0: |
| 37 | 859 context->cur_slot = MAX_DRAWS_H32-1; |
| 860 memset(context->linebuf, 0, LINEBUF_SIZE); | |
| 861 render_sprite_cells(context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
862 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
863 case 1: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
864 case 2: |
| 37 | 865 case 3: |
| 866 render_sprite_cells(context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
867 break; |
| 37 | 868 //sprite attribute table scan starts |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
869 case 4: |
| 37 | 870 render_sprite_cells( context); |
| 871 context->sprite_index = 0x80; | |
| 872 context->slot_counter = MAX_SPRITES_LINE_H32; | |
| 873 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
874 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
875 case 5: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
876 case 6: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
877 case 7: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
878 case 8: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
879 case 9: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
880 case 10: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
881 case 11: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
882 case 12: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
883 case 13: |
| 37 | 884 render_sprite_cells(context); |
| 885 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
886 case 14: |
| 37 | 887 external_slot(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
888 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
889 case 15: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
890 case 16: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
891 case 17: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
892 case 18: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
893 case 19: |
| 37 | 894 //HSYNC start |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
895 case 20: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
896 case 21: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
897 case 22: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
898 case 23: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
899 case 24: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
900 case 25: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
901 case 26: |
| 37 | 902 render_sprite_cells(context); |
| 903 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
904 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
905 case 27: |
| 37 | 906 external_slot(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
907 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
908 case 28: |
| 37 | 909 address = (context->regs[REG_HSCROLL] & 0x3F) << 10; |
| 910 mask = 0; | |
| 911 if (context->regs[REG_MODE_3] & 0x2) { | |
| 912 mask |= 0xF8; | |
| 913 } | |
| 914 if (context->regs[REG_MODE_3] & 0x1) { | |
| 915 mask |= 0x7; | |
| 916 } | |
| 917 line &= mask; | |
| 918 address += line * 4; | |
| 919 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1]; | |
| 920 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3]; | |
| 921 //printf("%d: HScroll A: %d, HScroll B: %d\n", line, context->hscroll_a, context->hscroll_b); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
922 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
923 case 29: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
924 case 30: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
925 case 31: |
| 37 | 926 case 32: |
| 927 render_sprite_cells(context); | |
| 928 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
929 break; |
| 37 | 930 //!HSYNC high |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
931 case 33: |
| 37 | 932 read_map_scroll_a(0, line, context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
933 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
934 case 34: |
| 37 | 935 render_sprite_cells(context); |
| 936 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
937 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
938 case 35: |
| 37 | 939 render_map_1(context); |
| 940 scan_sprite_table(line, context);//Just a guess | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
941 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
942 case 36: |
| 37 | 943 render_map_2(context); |
| 944 scan_sprite_table(line, context);//Just a guess | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
945 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
946 case 37: |
| 37 | 947 read_map_scroll_b(0, line, context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
948 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
949 case 38: |
| 37 | 950 render_sprite_cells(context); |
| 951 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
952 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
953 case 39: |
| 37 | 954 render_map_3(context); |
| 955 scan_sprite_table(line, context);//Just a guess | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
956 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
957 case 40: |
| 37 | 958 render_map_output(line, 0, context); |
| 959 scan_sprite_table(line, context);//Just a guess | |
| 960 //reverse context slot counter so it counts the number of sprite slots | |
| 961 //filled rather than the number of available slots | |
| 962 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter; | |
| 963 context->cur_slot = MAX_SPRITES_LINE_H32-1; | |
| 964 context->sprite_draws = MAX_DRAWS_H32; | |
| 965 context->flags &= (~FLAG_CAN_MASK & ~FLAG_MASKED); | |
|
20
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966 break; |
| 37 | 967 COLUMN_RENDER_BLOCK(2, 41) |
| 968 COLUMN_RENDER_BLOCK(4, 49) | |
| 969 COLUMN_RENDER_BLOCK(6, 57) | |
| 970 COLUMN_RENDER_BLOCK_REFRESH(8, 65) | |
| 971 COLUMN_RENDER_BLOCK(10, 73) | |
| 972 COLUMN_RENDER_BLOCK(12, 81) | |
| 973 COLUMN_RENDER_BLOCK(14, 89) | |
| 974 COLUMN_RENDER_BLOCK_REFRESH(16, 97) | |
| 975 COLUMN_RENDER_BLOCK(18, 105) | |
| 976 COLUMN_RENDER_BLOCK(20, 113) | |
| 977 COLUMN_RENDER_BLOCK(22, 121) | |
| 978 COLUMN_RENDER_BLOCK_REFRESH(24, 129) | |
| 979 COLUMN_RENDER_BLOCK(26, 137) | |
| 980 COLUMN_RENDER_BLOCK(28, 145) | |
| 981 COLUMN_RENDER_BLOCK(30, 153) | |
| 982 COLUMN_RENDER_BLOCK_REFRESH(32, 161) | |
|
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983 case 169: |
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984 case 170: |
| 37 | 985 external_slot(context); |
|
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986 break; |
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987 } |
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988 } |
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989 void latch_mode(vdp_context * context) |
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990 { |
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991 context->latched_mode = (context->regs[REG_MODE_4] & 0x81) | (context->regs[REG_MODE_2] & BIT_PAL); |
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992 } |
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993 |
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994 int is_refresh(vdp_context * context) |
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995 { |
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996 uint32_t linecyc = context->cycles % MCLKS_LINE; |
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997 if (context->latched_mode & BIT_H40) { |
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998 linecyc = linecyc/16; |
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999 //TODO: Figure out the exact behavior that reduces DMA slots for direct color DMA demos |
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1000 return (linecyc == 37 || linecyc == 69 || linecyc == 102 || linecyc == 133 || linecyc == 165 || linecyc == 197 || linecyc >= 210 || (linecyc < 6 && (context->flags & FLAG_DMA_RUN) && ((context->dma_cd & 0xF) == CRAM_WRITE))); |
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1001 } else { |
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1002 linecyc = linecyc/20; |
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1003 //TODO: Figure out which slots are refresh when display is off in 32-cell mode |
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1004 //These numbers are guesses based on H40 numbers |
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1005 return (linecyc == 24 || linecyc == 56 || linecyc == 88 || linecyc == 120 || linecyc == 152 || (linecyc < 5 && (context->flags & FLAG_DMA_RUN) && ((context->dma_cd & 0xF) == CRAM_WRITE))); |
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1006 //The numbers below are the refresh slots during active display |
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1007 //return (linecyc == 66 || linecyc == 98 || linecyc == 130 || linecyc == 162); |
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1008 } |
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1009 } |
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1010 |
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1011 void check_render_bg(vdp_context * context, int32_t line) |
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1012 { |
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1013 if (line > 0) { |
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1014 line -= 1; |
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1015 uint16_t * start = NULL, *end = NULL; |
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1016 uint32_t linecyc = (context->cycles % MCLKS_LINE); |
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1017 if (context->latched_mode & BIT_H40) { |
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1018 linecyc /= 16; |
|
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1019 if (linecyc >= 50 && linecyc < 210) { |
|
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1020 uint32_t x = (linecyc-50)*2; |
|
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1021 start = context->framebuf + line * 320 + x; |
|
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1022 end = start + 2; |
|
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1023 } |
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1024 } else { |
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1025 linecyc /= 20; |
|
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1026 if (linecyc >= 43 && linecyc < 171) { |
|
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1027 uint32_t x = (linecyc-43)*2; |
|
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1028 start = context->framebuf + line * 320 + x; |
|
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1029 end = start + 2; |
|
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1030 } |
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1031 } |
|
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1032 uint16_t color = (context->cram[context->regs[REG_BG_COLOR] & 0x3F] & 0xEEE); |
|
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1033 while (start != end) { |
|
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1034 *start = color; |
|
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1035 ++start; |
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1036 } |
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1037 } |
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1038 } |
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1039 |
|
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1040 void vdp_run_context(vdp_context * context, uint32_t target_cycles) |
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1041 { |
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1042 while(context->cycles < target_cycles) |
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1043 { |
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1044 uint32_t line = context->cycles / MCLKS_LINE; |
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1045 uint32_t active_lines = context->latched_mode & BIT_PAL ? PAL_ACTIVE : NTSC_ACTIVE; |
|
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1046 if (!line) { |
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1047 latch_mode(context); |
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1048 } |
|
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1049 uint32_t linecyc = context->cycles % MCLKS_LINE; |
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1050 if (linecyc == 0) { |
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1051 if (line <= 1 || line >= active_lines) { |
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1052 context->hint_counter = context->regs[REG_HINT]; |
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1053 } else if (context->hint_counter) { |
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1054 context->hint_counter--; |
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1055 } else { |
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1056 context->flags2 |= FLAG2_HINT_PENDING; |
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1057 context->hint_counter = context->regs[REG_HINT]; |
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1058 } |
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1059 } else if(line == active_lines) { |
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1060 uint32_t intcyc = context->latched_mode & BIT_H40 ? (148 + 40) * 4 : (132 + 28) * 5;; |
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1061 if (linecyc == intcyc) { |
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1062 context->flags2 |= FLAG2_VINT_PENDING; |
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1063 } |
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1064 } |
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1065 if (line < active_lines && context->regs[REG_MODE_2] & DISPLAY_ENABLE) { |
|
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1066 //first sort-of active line is treated as 255 internally |
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1067 //it's used for gathering sprite info for line |
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1068 line = (line - 1) & 0xFF; |
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1069 |
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1070 //Convert to slot number |
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1071 if (context->latched_mode & BIT_H40){ |
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1072 //TODO: Deal with nasty clock switching during HBLANK |
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1073 uint32_t clock_inc = MCLKS_LINE-linecyc < 16 ? MCLKS_LINE-linecyc : 16; |
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1074 linecyc = linecyc/16; |
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1075 vdp_h40(line, linecyc, context); |
|
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1076 context->cycles += clock_inc; |
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1077 } else { |
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|
1078 linecyc = linecyc/20; |
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1079 vdp_h32(line, linecyc, context); |
|
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1080 context->cycles += 20; |
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1081 } |
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1082 } else { |
|
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1083 if (!is_refresh(context)) { |
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1084 external_slot(context); |
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1085 } |
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1086 if (line < active_lines) { |
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1087 check_render_bg(context, line); |
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1088 } |
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1089 if (context->latched_mode & BIT_H40){ |
|
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1090 uint32_t clock_inc = MCLKS_LINE-linecyc < 16 ? MCLKS_LINE-linecyc : 16; |
|
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1091 //TODO: Deal with nasty clock switching during HBLANK |
|
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1092 context->cycles += clock_inc; |
|
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1093 } else { |
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1094 context->cycles += 20; |
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1095 } |
|
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1096 } |
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1097 } |
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1098 } |
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1099 |
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1100 uint32_t vdp_run_to_vblank(vdp_context * context) |
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1101 { |
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1102 uint32_t target_cycles = ((context->latched_mode & BIT_PAL) ? PAL_ACTIVE : NTSC_ACTIVE) * MCLKS_LINE; |
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1103 vdp_run_context(context, target_cycles); |
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1104 return context->cycles; |
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1105 } |
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1106 |
| 75 | 1107 void vdp_run_dma_done(vdp_context * context, uint32_t target_cycles) |
| 1108 { | |
| 1109 for(;;) { | |
| 1110 uint32_t dmalen = (context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L]; | |
| 1111 if (!dmalen) { | |
| 1112 dmalen = 0x10000; | |
| 1113 } | |
| 1114 uint32_t min_dma_complete = dmalen * (context->latched_mode & BIT_H40 ? 16 : 20); | |
| 1115 if ((context->regs[REG_DMASRC_H] & 0xC0) == 0xC0 || (context->cd & 0xF) == VRAM_WRITE) { | |
| 1116 //DMA copies take twice as long to complete since they require a read and a write | |
| 1117 //DMA Fills and transfers to VRAM also take twice as long as it requires 2 writes for a single word | |
| 1118 min_dma_complete *= 2; | |
| 1119 } | |
| 1120 min_dma_complete += context->cycles; | |
| 1121 if (target_cycles < min_dma_complete) { | |
| 1122 vdp_run_context(context, target_cycles); | |
| 1123 return; | |
| 1124 } else { | |
| 1125 vdp_run_context(context, min_dma_complete); | |
| 1126 if (!(context->flags & FLAG_DMA_RUN)) { | |
| 1127 return; | |
| 1128 } | |
| 1129 } | |
| 1130 } | |
| 1131 } | |
| 1132 | |
| 1133 int vdp_control_port_write(vdp_context * context, uint16_t value) | |
|
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1134 { |
|
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1135 //printf("control port write: %X\n", value); |
|
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1136 if (context->flags & FLAG_DMA_RUN) { |
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1137 return -1; |
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1138 } |
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1139 if (context->flags & FLAG_PENDING) { |
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1140 context->address = (context->address & 0x3FFF) | (value << 14); |
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1141 context->cd = (context->cd & 0x3) | ((value >> 2) & 0x3C); |
| 75 | 1142 context->flags &= ~FLAG_PENDING; |
|
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1143 //printf("New Address: %X, New CD: %X\n", context->address, context->cd); |
| 75 | 1144 if (context->cd & 0x20) { |
| 1145 if((context->regs[REG_DMASRC_H] & 0xC0) != 0x80) { | |
| 1146 //DMA copy or 68K -> VDP, transfer starts immediately | |
| 1147 context->flags |= FLAG_DMA_RUN; | |
|
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1148 context->dma_cd = context->cd; |
| 75 | 1149 if (!(context->regs[REG_DMASRC_H] & 0x80)) { |
| 1150 return 1; | |
| 1151 } | |
| 1152 } | |
|
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1153 } |
|
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1154 } else { |
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1155 if ((value & 0xC000) == 0x8000) { |
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1156 //Register write |
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1157 uint8_t reg = (value >> 8) & 0x1F; |
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1158 if (reg < VDP_REGS) { |
|
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1159 //printf("register %d set to %X\n", reg, value & 0xFF); |
|
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1160 context->regs[reg] = value; |
|
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1161 if (reg == REG_MODE_2) { |
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1162 //printf("Display is now %s\n", (context->regs[REG_MODE_2] & DISPLAY_ENABLE) ? "enabled" : "disabled"); |
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1163 } |
|
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1164 } |
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1165 } else { |
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1166 context->flags |= FLAG_PENDING; |
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1167 context->address = (context->address &0xC000) | (value & 0x3FFF); |
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1168 context->cd = (context->cd &0x3C) | (value >> 14); |
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1169 } |
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1170 } |
| 75 | 1171 return 0; |
|
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1172 } |
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1173 |
|
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1174 int vdp_data_port_write(vdp_context * context, uint16_t value) |
|
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1175 { |
|
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1176 //printf("data port write: %X\n", value); |
|
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1177 if (context->flags & FLAG_DMA_RUN) { |
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1178 return -1; |
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1179 } |
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1180 if (!(context->cd & 1)) { |
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1181 //ignore writes when cd is configured for read |
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1182 return 0; |
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1183 } |
|
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1184 context->flags &= ~FLAG_PENDING; |
|
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1185 /*if (context->fifo_cur == context->fifo_end) { |
|
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1186 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles); |
|
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1187 }*/ |
|
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1188 while (context->fifo_cur == context->fifo_end) { |
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1189 vdp_run_context(context, context->cycles + ((context->latched_mode & BIT_H40) ? 16 : 20)); |
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1190 } |
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1191 context->fifo_cur->cycle = context->cycles; |
| 138 | 1192 context->fifo_cur->address = context->address; |
|
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1193 context->fifo_cur->value = value; |
| 138 | 1194 context->fifo_cur->cd = context->cd; |
|
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1195 context->fifo_cur->partial = 0; |
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1196 context->fifo_cur++; |
| 138 | 1197 context->address += context->regs[REG_AUTOINC]; |
|
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1198 return 0; |
|
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1199 } |
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1200 |
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1201 uint16_t vdp_control_port_read(vdp_context * context) |
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1202 { |
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1203 context->flags &= ~FLAG_PENDING; |
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1204 uint16_t value = 0x3400; |
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1205 if (context->fifo_cur == (context->fifo_end - FIFO_SIZE)) { |
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1206 value |= 0x200; |
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1207 } |
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1208 if (context->fifo_cur == context->fifo_end) { |
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1209 value |= 0x100; |
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1210 } |
|
317
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1211 if (context->flags2 & FLAG2_VINT_PENDING) { |
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1212 value |- 0x80; |
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1213 } |
|
318
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1214 uint32_t line= context->cycles / MCLKS_LINE; |
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1215 uint32_t linecyc = context->cycles % MCLKS_LINE; |
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1216 if (line >= (context->latched_mode & BIT_PAL ? PAL_ACTIVE : NTSC_ACTIVE)) { |
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1217 value |= 0x8; |
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1218 } |
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1219 if (linecyc < (context->latched_mode & BIT_H40 ? (148 + 61) * 4 : ( + 46) * 5)) { |
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|
1220 value |= 0x4; |
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1221 } |
|
149
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|
1222 if (context->flags & FLAG_DMA_RUN) { |
|
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|
1223 value |= 0x2; |
| 75 | 1224 } |
|
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|
1225 if (context->latched_mode & BIT_PAL) {//Not sure about this, need to verify |
|
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1226 value |= 0x1; |
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|
1227 } |
|
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|
1228 //TODO: Sprite overflow, sprite collision, odd frame flag |
|
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|
1229 return value; |
|
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|
1230 } |
|
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1231 |
|
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|
1232 uint16_t vdp_data_port_read(vdp_context * context) |
|
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1233 { |
|
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|
1234 context->flags &= ~FLAG_PENDING; |
| 138 | 1235 if (context->cd & 1) { |
|
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1236 return 0; |
|
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1237 } |
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1238 //Not sure if the FIFO should be drained before processing a read or not, but it would make sense |
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1239 context->flags &= ~FLAG_UNUSED_SLOT; |
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1240 while (!(context->flags & FLAG_UNUSED_SLOT)) { |
|
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1241 vdp_run_context(context, context->cycles + ((context->latched_mode & BIT_H40) ? 16 : 20)); |
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1242 } |
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1243 uint16_t value = 0; |
| 138 | 1244 switch (context->cd & 0xF) |
|
54
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1245 { |
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|
1246 case VRAM_READ: |
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1247 value = context->vdpmem[context->address] << 8; |
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1248 context->flags &= ~FLAG_UNUSED_SLOT; |
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1249 while (!(context->flags & FLAG_UNUSED_SLOT)) { |
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1250 vdp_run_context(context, context->cycles + ((context->latched_mode & BIT_H40) ? 16 : 20)); |
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1251 } |
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1252 value |= context->vdpmem[context->address ^ 1]; |
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|
1253 break; |
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1254 case CRAM_READ: |
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1255 value = context->cram[(context->address/2) & (CRAM_SIZE-1)]; |
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|
1256 break; |
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1257 case VSRAM_READ: |
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1258 if (((context->address / 2) & 63) < VSRAM_SIZE) { |
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1259 value = context->vsram[context->address & 63]; |
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1260 } |
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|
1261 break; |
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1262 } |
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1263 context->address += context->regs[REG_AUTOINC]; |
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1264 return value; |
|
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|
1265 } |
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1266 |
| 137 | 1267 uint16_t vdp_hv_counter_read(vdp_context * context) |
| 1268 { | |
| 1269 uint32_t line= context->cycles / MCLKS_LINE; | |
| 1270 if (!line) { | |
| 1271 line = 0xFF; | |
| 1272 } else { | |
| 1273 line--; | |
| 1274 if (line > 0xEA) { | |
| 1275 line = (line + 0xFA) & 0xFF; | |
| 1276 } | |
| 1277 } | |
| 1278 uint32_t linecyc = context->cycles % MCLKS_LINE; | |
| 1279 if (context->latched_mode & BIT_H40) { | |
| 1280 linecyc /= 8; | |
| 1281 if (linecyc >= 86) { | |
| 1282 linecyc -= 86; | |
| 1283 } else { | |
| 1284 linecyc += 334; | |
| 1285 } | |
| 1286 if (linecyc > 0x16C) { | |
| 1287 linecyc += 92; | |
| 1288 } | |
| 1289 } else { | |
| 1290 linecyc /= 10; | |
| 1291 if (linecyc >= 74) { | |
| 1292 linecyc -= 74; | |
| 1293 } else { | |
| 1294 linecyc += 268; | |
| 1295 } | |
| 1296 if (linecyc > 0x127) { | |
| 1297 linecyc += 170; | |
| 1298 } | |
| 1299 } | |
| 1300 linecyc &= 0xFF; | |
| 1301 return (line << 8) | linecyc; | |
| 1302 } | |
| 1303 | |
|
65
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1304 void vdp_adjust_cycles(vdp_context * context, uint32_t deduction) |
|
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1305 { |
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1306 context->cycles -= deduction; |
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1307 for(fifo_entry * start = (context->fifo_end - FIFO_SIZE); start < context->fifo_cur; start++) { |
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1308 if (start->cycle >= deduction) { |
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1309 start->cycle -= deduction; |
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1310 } else { |
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|
1311 start->cycle = 0; |
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|
1312 } |
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1313 } |
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1314 } |
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1315 |
|
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1316 uint32_t vdp_next_hint(vdp_context * context) |
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1317 { |
|
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1318 if (!(context->regs[REG_MODE_1] & 0x10)) { |
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1319 return 0xFFFFFFFF; |
|
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1320 } |
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1321 if (context->flags2 & FLAG2_HINT_PENDING) { |
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1322 return context->cycles; |
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1323 } |
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1324 uint32_t active_lines = context->latched_mode & BIT_PAL ? PAL_ACTIVE : NTSC_ACTIVE; |
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1325 uint32_t line = context->cycles / MCLKS_LINE; |
|
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1326 if (line >= active_lines) { |
|
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|
1327 return 0xFFFFFFFF; |
|
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1328 } |
|
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1329 uint32_t linecyc = context->cycles % MCLKS_LINE; |
|
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1330 uint32_t hcycle = context->cycles + context->hint_counter * MCLKS_LINE + MCLKS_LINE - linecyc; |
|
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|
1331 if (!line) { |
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|
1332 hcycle += MCLKS_LINE; |
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1333 } |
|
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|
1334 return hcycle; |
|
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|
1335 } |
|
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1336 |
|
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1337 uint32_t vdp_next_vint(vdp_context * context) |
|
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1338 { |
|
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1339 if (!(context->regs[REG_MODE_2] & 0x20)) { |
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1340 return 0xFFFFFFFF; |
|
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1341 } |
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1342 if (context->flags2 & FLAG2_VINT_PENDING) { |
|
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1343 return context->cycles; |
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1344 } |
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1345 uint32_t active_lines = context->latched_mode & BIT_PAL ? PAL_ACTIVE : NTSC_ACTIVE; |
|
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|
1346 uint32_t vcycle = MCLKS_LINE * active_lines; |
|
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|
1347 if (context->latched_mode & BIT_H40) { |
|
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|
1348 vcycle += (148 + 40) * 4; |
|
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|
1349 } else { |
|
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|
1350 vcycle += (132 + 28) * 5; |
|
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|
1351 } |
|
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|
1352 if (vcycle < context->cycles) { |
|
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|
1353 return 0xFFFFFFFF; |
|
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1354 } |
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291
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|
1355 return vcycle; |
|
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1356 } |
|
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|
1357 |
|
e5e8b48ad157
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291
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|
1358 void vdp_int_ack(vdp_context * context, uint16_t int_num) |
|
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Mike Pavone <pavone@retrodev.com>
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|
1359 { |
|
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|
1360 if (int_num == 6) { |
|
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|
1361 context->flags2 &= ~FLAG2_VINT_PENDING; |
|
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291
diff
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|
1362 } else if(int_num ==4) { |
|
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Mike Pavone <pavone@retrodev.com>
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291
diff
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|
1363 context->flags2 &= ~FLAG2_HINT_PENDING; |
|
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Mike Pavone <pavone@retrodev.com>
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|
1364 } |
|
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|
1365 } |
|
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|
1366 |
|
20
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diff
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|
1367 #define GST_VDP_REGS 0xFA |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1368 #define GST_VDP_MEM 0x12478 |
|
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Mike Pavone <pavone@retrodev.com>
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diff
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|
1369 |
|
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diff
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|
1370 void vdp_load_savestate(vdp_context * context, FILE * state_file) |
|
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diff
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|
1371 { |
|
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|
1372 uint8_t tmp_buf[CRAM_SIZE*2]; |
|
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Mostly broken VDP core and savestate viewer
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diff
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|
1373 fseek(state_file, GST_VDP_REGS, SEEK_SET); |
|
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Mostly broken VDP core and savestate viewer
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diff
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|
1374 fread(context->regs, 1, VDP_REGS, state_file); |
|
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diff
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|
1375 latch_mode(context); |
|
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Mostly broken VDP core and savestate viewer
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diff
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|
1376 fread(tmp_buf, 1, sizeof(tmp_buf), state_file); |
|
f664eeb55cb4
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Mike Pavone <pavone@retrodev.com>
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diff
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|
1377 for (int i = 0; i < CRAM_SIZE; i++) { |
|
f664eeb55cb4
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Mike Pavone <pavone@retrodev.com>
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diff
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|
1378 context->cram[i] = (tmp_buf[i*2+1] << 8) | tmp_buf[i*2]; |
|
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diff
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|
1379 } |
|
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Mike Pavone <pavone@retrodev.com>
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diff
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|
1380 fread(tmp_buf, 2, VSRAM_SIZE, state_file); |
|
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diff
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|
1381 for (int i = 0; i < VSRAM_SIZE; i++) { |
|
23
3e924bb56560
Fix endianness of VSRAM when read from Genecyst save state
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22
diff
changeset
|
1382 context->vsram[i] = (tmp_buf[i*2+1] << 8) | tmp_buf[i*2]; |
|
20
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diff
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|
1383 } |
|
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diff
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|
1384 fseek(state_file, GST_VDP_MEM, SEEK_SET); |
|
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Mostly broken VDP core and savestate viewer
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diff
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|
1385 fread(context->vdpmem, 1, VRAM_SIZE, state_file); |
|
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Mostly broken VDP core and savestate viewer
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diff
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|
1386 } |
|
54
3b79cbcf6846
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diff
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|
1387 |
|
56
a28b1dfe1af2
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diff
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|
1388 void vdp_save_state(vdp_context * context, FILE * outfile) |
|
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diff
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|
1389 { |
|
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diff
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|
1390 uint8_t tmp_buf[CRAM_SIZE*2]; |
|
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diff
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|
1391 fseek(outfile, GST_VDP_REGS, SEEK_SET); |
|
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diff
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|
1392 fwrite(context->regs, 1, VDP_REGS, outfile); |
|
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diff
changeset
|
1393 for (int i = 0; i < CRAM_SIZE; i++) { |
|
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diff
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|
1394 tmp_buf[i*2] = context->cram[i]; |
|
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diff
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|
1395 tmp_buf[i*2+1] = context->cram[i] >> 8; |
|
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diff
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|
1396 } |
|
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diff
changeset
|
1397 fwrite(tmp_buf, 1, sizeof(tmp_buf), outfile); |
|
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diff
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|
1398 for (int i = 0; i < VSRAM_SIZE; i++) { |
|
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54
diff
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|
1399 tmp_buf[i*2] = context->vsram[i]; |
|
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diff
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|
1400 tmp_buf[i*2+1] = context->vsram[i] >> 8; |
|
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diff
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|
1401 } |
|
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54
diff
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|
1402 fwrite(tmp_buf, 2, VSRAM_SIZE, outfile); |
|
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diff
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|
1403 fseek(outfile, GST_VDP_MEM, SEEK_SET); |
|
a28b1dfe1af2
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54
diff
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|
1404 fwrite(context->vdpmem, 1, VRAM_SIZE, outfile); |
|
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54
diff
changeset
|
1405 } |
|
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diff
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|
1406 |