repos/blastem: m68k_core.c annotate

annotate m68k_core.c @ 1696:956c1cce05e2 mame_interp

Merge from default

author	Michael Pavone <pavone@retrodev.com>
date	Thu, 24 Jan 2019 19:15:59 -0800
parents	b7ecd0d6a77b
children	75172d440900

rev	line source
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1 /*
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	2 Copyright 2014 Michael Pavone
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	3 This file is part of BlastEm.
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	5 */
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	6 #include "m68k_core.h"
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	7 #ifdef USE_NATIVE
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	8 #include "m68k_internal.h"
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	9 #endif
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	10 #include "68kinst.h"
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	11 #include "backend.h"
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	12 #ifdef USE_NATIVE
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	13 #include "gen.h"
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	14 #endif
792 724bbec47f86 Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows). Michael Pavone <pavone@retrodev.com> parents: 726 diff changeset	15 #include "util.h"
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	16 #include "serialize.h"
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	17 #ifndef USE_NATIVE
1506 ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	18 #include "musashi/m68kcpu.h"
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	19 #endif
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	20 #include <stdio.h>
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	21 #include <stddef.h>
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	22 #include <stdlib.h>
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	23 #include <string.h>
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	24
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	25 char disasm_buf[1024];
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	26 #ifdef USE_NATIVE
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	27 int8_t native_reg(m68k_op_info * op, m68k_options * opts)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	28 {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	29 if (op->addr_mode == MODE_REG) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	30 return opts->dregs[op->params.regs.pri];
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	31 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	32 if (op->addr_mode == MODE_AREG) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	33 return opts->aregs[op->params.regs.pri];
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	34 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	35 return -1;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	36 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	37
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	38 size_t dreg_offset(uint8_t reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	39 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	40 return offsetof(m68k_context, dregs) + sizeof(uint32_t) * reg;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	41 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	42
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	43 size_t areg_offset(uint8_t reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	44 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	45 return offsetof(m68k_context, aregs) + sizeof(uint32_t) * reg;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	46 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	47
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	48 //must be called with an m68k_op_info that uses a register
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	49 size_t reg_offset(m68k_op_info *op)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	50 {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	51 return op->addr_mode == MODE_REG ? dreg_offset(op->params.regs.pri) : areg_offset(op->params.regs.pri);
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	52 }
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	53 #endif
1082 2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution. Michael Pavone <pavone@retrodev.com> parents: 1027 diff changeset	54 void m68k_print_regs(m68k_context * context)
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	55 {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	56 printf("XNZVC\n%d%d%d%d%d\n", context->flags[0], context->flags[1], context->flags[2], context->flags[3], context->flags[4]);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	57 for (int i = 0; i < 8; i++) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	58 printf("d%d: %X\n", i, context->dregs[i]);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	59 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	60 for (int i = 0; i < 8; i++) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	61 printf("a%d: %X\n", i, context->aregs[i]);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	62 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	63 }
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	64 #ifdef USE_NATIVE
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	65 void m68k_read_size(m68k_options *opts, uint8_t size)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	66 {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	67 switch (size)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	68 {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	69 case OPSIZE_BYTE:
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	70 call(&opts->gen.code, opts->read_8);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	71 break;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	72 case OPSIZE_WORD:
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	73 call(&opts->gen.code, opts->read_16);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	74 break;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	75 case OPSIZE_LONG:
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	76 call(&opts->gen.code, opts->read_32);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	77 break;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	78 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	79 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	80
979 771875b5f519 Fix order of writes for move.l with a predec destination Michael Pavone <pavone@retrodev.com> parents: 902 diff changeset	81 void m68k_write_size(m68k_options *opts, uint8_t size, uint8_t lowfirst)
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	82 {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	83 switch (size)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	84 {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	85 case OPSIZE_BYTE:
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	86 call(&opts->gen.code, opts->write_8);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	87 break;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	88 case OPSIZE_WORD:
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	89 call(&opts->gen.code, opts->write_16);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	90 break;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	91 case OPSIZE_LONG:
979 771875b5f519 Fix order of writes for move.l with a predec destination Michael Pavone <pavone@retrodev.com> parents: 902 diff changeset	92 if (lowfirst) {
771875b5f519 Fix order of writes for move.l with a predec destination Michael Pavone <pavone@retrodev.com> parents: 902 diff changeset	93 call(&opts->gen.code, opts->write_32_lowfirst);
771875b5f519 Fix order of writes for move.l with a predec destination Michael Pavone <pavone@retrodev.com> parents: 902 diff changeset	94 } else {
771875b5f519 Fix order of writes for move.l with a predec destination Michael Pavone <pavone@retrodev.com> parents: 902 diff changeset	95 call(&opts->gen.code, opts->write_32_highfirst);
771875b5f519 Fix order of writes for move.l with a predec destination Michael Pavone <pavone@retrodev.com> parents: 902 diff changeset	96 }
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	97 break;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	98 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	99 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	100
688 8c546bc1d773 Moved m68k_save_result to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 687 diff changeset	101 void m68k_save_result(m68kinst * inst, m68k_options * opts)
8c546bc1d773 Moved m68k_save_result to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 687 diff changeset	102 {
8c546bc1d773 Moved m68k_save_result to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 687 diff changeset	103 if (inst->dst.addr_mode != MODE_REG && inst->dst.addr_mode != MODE_AREG && inst->dst.addr_mode != MODE_UNUSED) {
1461 aa945f1bdd71 Properly clear trace mode on interrupt or other exception. Fix NBCD with memory destination Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	104 if (inst->dst.addr_mode == MODE_AREG_PREDEC &&
aa945f1bdd71 Properly clear trace mode on interrupt or other exception. Fix NBCD with memory destination Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	105 ((inst->src.addr_mode == MODE_AREG_PREDEC && inst->op != M68K_MOVE) \|\| (inst->op == M68K_NBCD))
aa945f1bdd71 Properly clear trace mode on interrupt or other exception. Fix NBCD with memory destination Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	106 ) {
688 8c546bc1d773 Moved m68k_save_result to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 687 diff changeset	107 areg_to_native(opts, inst->dst.params.regs.pri, opts->gen.scratch2);
8c546bc1d773 Moved m68k_save_result to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 687 diff changeset	108 }
979 771875b5f519 Fix order of writes for move.l with a predec destination Michael Pavone <pavone@retrodev.com> parents: 902 diff changeset	109 m68k_write_size(opts, inst->extra.size, 1);
688 8c546bc1d773 Moved m68k_save_result to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 687 diff changeset	110 }
8c546bc1d773 Moved m68k_save_result to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 687 diff changeset	111 }
8c546bc1d773 Moved m68k_save_result to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 687 diff changeset	112
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1082 diff changeset	113 static void translate_m68k_lea_pea(m68k_options * opts, m68kinst * inst)
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	114 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	115 code_info *code = &opts->gen.code;
581 9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	116 int8_t dst_reg = inst->op == M68K_PEA ? opts->gen.scratch1 : native_reg(&(inst->dst), opts);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	117 switch(inst->src.addr_mode)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	118 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	119 case MODE_AREG_INDIRECT:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	120 cycles(&opts->gen, BUS);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	121 if (dst_reg >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	122 areg_to_native(opts, inst->src.params.regs.pri, dst_reg);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	123 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	124 if (opts->aregs[inst->src.params.regs.pri] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	125 native_to_areg(opts, opts->aregs[inst->src.params.regs.pri], inst->dst.params.regs.pri);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	126 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	127 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	128 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	129 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	130 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	131 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	132 case MODE_AREG_DISPLACE:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	133 cycles(&opts->gen, 8);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	134 calc_areg_displace(opts, &inst->src, dst_reg >= 0 ? dst_reg : opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	135 if (dst_reg < 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	136 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	137 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	138 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	139 case MODE_AREG_INDEX_DISP8:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	140 cycles(&opts->gen, 12);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	141 if (dst_reg < 0 \|\| inst->dst.params.regs.pri == inst->src.params.regs.pri \|\| inst->dst.params.regs.pri == (inst->src.params.regs.sec >> 1 & 0x7)) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	142 dst_reg = opts->gen.scratch1;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	143 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	144 calc_areg_index_disp8(opts, &inst->src, dst_reg);
581 9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	145 if (dst_reg == opts->gen.scratch1 && inst->op != M68K_PEA) {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	146 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	147 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	148 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	149 case MODE_PC_DISPLACE:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	150 cycles(&opts->gen, 8);
581 9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	151 if (inst->op == M68K_PEA) {
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	152 ldi_native(opts, inst->src.params.regs.displacement + inst->address+2, dst_reg);
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	153 } else {
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	154 ldi_areg(opts, inst->src.params.regs.displacement + inst->address+2, inst->dst.params.regs.pri);
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	155 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	156 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	157 case MODE_PC_INDEX_DISP8:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	158 cycles(&opts->gen, BUS*3);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	159 if (dst_reg < 0 \|\| inst->dst.params.regs.pri == (inst->src.params.regs.sec >> 1 & 0x7)) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	160 dst_reg = opts->gen.scratch1;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	161 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	162 ldi_native(opts, inst->address+2, dst_reg);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	163 calc_index_disp8(opts, &inst->src, dst_reg);
581 9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	164 if (dst_reg == opts->gen.scratch1 && inst->op != M68K_PEA) {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	165 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	166 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	167 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	168 case MODE_ABSOLUTE:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	169 case MODE_ABSOLUTE_SHORT:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	170 cycles(&opts->gen, (inst->src.addr_mode == MODE_ABSOLUTE) ? BUS * 3 : BUS * 2);
581 9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	171 if (inst->op == M68K_PEA) {
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	172 ldi_native(opts, inst->src.params.immed, dst_reg);
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	173 } else {
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	174 ldi_areg(opts, inst->src.params.immed, inst->dst.params.regs.pri);
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	175 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	176 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	177 default:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	178 m68k_disasm(inst, disasm_buf);
792 724bbec47f86 Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows). Michael Pavone <pavone@retrodev.com> parents: 726 diff changeset	179 fatal_error("%X: %s\naddress mode %d not implemented (lea src)\n", inst->address, disasm_buf, inst->src.addr_mode);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	180 }
581 9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	181 if (inst->op == M68K_PEA) {
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	182 subi_areg(opts, 4, 7);
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	183 areg_to_native(opts, 7, opts->gen.scratch2);
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	184 call(code, opts->write_32_lowfirst);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	185 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	186 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	187
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1082 diff changeset	188 static void push_const(m68k_options *opts, int32_t value)
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	189 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	190 ldi_native(opts, value, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	191 subi_areg(opts, 4, 7);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	192 areg_to_native(opts, 7, opts->gen.scratch2);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	193 call(&opts->gen.code, opts->write_32_highfirst);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	194 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	195
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	196 void jump_m68k_abs(m68k_options * opts, uint32_t address)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	197 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	198 code_info *code = &opts->gen.code;
726 7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96 Michael Pavone <pavone@retrodev.com> parents: 725 diff changeset	199 code_ptr dest_addr = get_native_address(opts, address);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	200 if (!dest_addr) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	201 opts->gen.deferred = defer_address(opts->gen.deferred, address, code->cur + 1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	202 //dummy address to be replaced later, make sure it generates a 4-byte displacement
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	203 dest_addr = code->cur + 256;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	204 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	205 jmp(code, dest_addr);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	206 //this used to call opts->native_addr for destinations in RAM, but that shouldn't be needed
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	207 //since instruction retranslation patches the original native instruction location
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	208 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	209
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1082 diff changeset	210 static void translate_m68k_bsr(m68k_options * opts, m68kinst * inst)
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	211 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	212 code_info *code = &opts->gen.code;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	213 int32_t disp = inst->src.params.immed;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	214 uint32_t after = inst->address + (inst->variant == VAR_BYTE ? 2 : 4);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	215 //TODO: Add cycles in the right place relative to pushing the return address on the stack
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	216 cycles(&opts->gen, 10);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	217 push_const(opts, after);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	218 jump_m68k_abs(opts, inst->address + 2 + disp);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	219 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	220
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1082 diff changeset	221 static void translate_m68k_jmp_jsr(m68k_options * opts, m68kinst * inst)
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	222 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	223 uint8_t is_jsr = inst->op == M68K_JSR;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	224 code_info *code = &opts->gen.code;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	225 code_ptr dest_addr;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	226 uint8_t sec_reg;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	227 uint32_t after;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	228 uint32_t m68k_addr;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	229 switch(inst->src.addr_mode)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	230 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	231 case MODE_AREG_INDIRECT:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	232 cycles(&opts->gen, BUS*2);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	233 if (is_jsr) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	234 push_const(opts, inst->address+2);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	235 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	236 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	237 call(code, opts->native_addr);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	238 jmp_r(code, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	239 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	240 case MODE_AREG_DISPLACE:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	241 cycles(&opts->gen, BUS*2);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	242 if (is_jsr) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	243 push_const(opts, inst->address+4);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	244 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	245 calc_areg_displace(opts, &inst->src, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	246 call(code, opts->native_addr);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	247 jmp_r(code, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	248 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	249 case MODE_AREG_INDEX_DISP8:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	250 cycles(&opts->gen, BUS*3);//TODO: CHeck that this is correct
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	251 if (is_jsr) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	252 push_const(opts, inst->address+4);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	253 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	254 calc_areg_index_disp8(opts, &inst->src, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	255 call(code, opts->native_addr);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	256 jmp_r(code, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	257 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	258 case MODE_PC_DISPLACE:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	259 //TODO: Add cycles in the right place relative to pushing the return address on the stack
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	260 cycles(&opts->gen, 10);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	261 if (is_jsr) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	262 push_const(opts, inst->address+4);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	263 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	264 jump_m68k_abs(opts, inst->src.params.regs.displacement + inst->address + 2);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	265 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	266 case MODE_PC_INDEX_DISP8:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	267 cycles(&opts->gen, BUS*3);//TODO: CHeck that this is correct
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	268 if (is_jsr) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	269 push_const(opts, inst->address+4);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	270 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	271 ldi_native(opts, inst->address+2, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	272 calc_index_disp8(opts, &inst->src, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	273 call(code, opts->native_addr);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	274 jmp_r(code, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	275 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	276 case MODE_ABSOLUTE:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	277 case MODE_ABSOLUTE_SHORT:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	278 //TODO: Add cycles in the right place relative to pushing the return address on the stack
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	279 cycles(&opts->gen, inst->src.addr_mode == MODE_ABSOLUTE ? 12 : 10);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	280 if (is_jsr) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	281 push_const(opts, inst->address + (inst->src.addr_mode == MODE_ABSOLUTE ? 6 : 4));
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	282 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	283 jump_m68k_abs(opts, inst->src.params.immed);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	284 break;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	285 default:
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	286 m68k_disasm(inst, disasm_buf);
792 724bbec47f86 Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows). Michael Pavone <pavone@retrodev.com> parents: 726 diff changeset	287 fatal_error("%s\naddress mode %d not yet supported (%s)\n", disasm_buf, inst->src.addr_mode, is_jsr ? "jsr" : "jmp");
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	288 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	289 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	290
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1082 diff changeset	291 static void translate_m68k_unlk(m68k_options * opts, m68kinst * inst)
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	292 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	293 cycles(&opts->gen, BUS);
1464 ffe45c5b8390 Fix unlk for the a7 case Michael Pavone <pavone@retrodev.com> parents: 1461 diff changeset	294 if (inst->dst.params.regs.pri != 7) {
ffe45c5b8390 Fix unlk for the a7 case Michael Pavone <pavone@retrodev.com> parents: 1461 diff changeset	295 areg_to_native(opts, inst->dst.params.regs.pri, opts->aregs[7]);
ffe45c5b8390 Fix unlk for the a7 case Michael Pavone <pavone@retrodev.com> parents: 1461 diff changeset	296 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	297 areg_to_native(opts, 7, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	298 call(&opts->gen.code, opts->read_32);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	299 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri);
1464 ffe45c5b8390 Fix unlk for the a7 case Michael Pavone <pavone@retrodev.com> parents: 1461 diff changeset	300 if (inst->dst.params.regs.pri != 7) {
ffe45c5b8390 Fix unlk for the a7 case Michael Pavone <pavone@retrodev.com> parents: 1461 diff changeset	301 addi_areg(opts, 4, 7);
ffe45c5b8390 Fix unlk for the a7 case Michael Pavone <pavone@retrodev.com> parents: 1461 diff changeset	302 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	303 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	304
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1082 diff changeset	305 static void translate_m68k_link(m68k_options * opts, m68kinst * inst)
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	306 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	307 //compensate for displacement word
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	308 cycles(&opts->gen, BUS);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	309 subi_areg(opts, 4, 7);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	310 areg_to_native(opts, 7, opts->gen.scratch2);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	311 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	312 call(&opts->gen.code, opts->write_32_highfirst);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	313 native_to_areg(opts, opts->aregs[7], inst->src.params.regs.pri);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	314 addi_areg(opts, inst->dst.params.immed, 7);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	315 //prefetch
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	316 cycles(&opts->gen, BUS);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	317 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	318
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1082 diff changeset	319 static void translate_m68k_rts(m68k_options * opts, m68kinst * inst)
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	320 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	321 code_info *code = &opts->gen.code;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	322 areg_to_native(opts, 7, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	323 addi_areg(opts, 4, 7);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	324 call(code, opts->read_32);
1323 c9dc2603b087 Fixed timing for RTS and RTE Michael Pavone <pavone@retrodev.com> parents: 1298 diff changeset	325 cycles(&opts->gen, 2*BUS);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	326 call(code, opts->native_addr);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	327 jmp_r(code, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	328 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	329
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1082 diff changeset	330 static void translate_m68k_rtr(m68k_options opts, m68kinst inst)
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	331 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	332 code_info *code = &opts->gen.code;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	333 //Read saved CCR
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	334 areg_to_native(opts, 7, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	335 call(code, opts->read_16);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	336 addi_areg(opts, 2, 7);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	337 call(code, opts->set_ccr);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	338 //Read saved PC
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	339 areg_to_native(opts, 7, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	340 call(code, opts->read_32);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	341 addi_areg(opts, 4, 7);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	342 //Get native address and jump to it
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	343 call(code, opts->native_addr);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	344 jmp_r(code, opts->gen.scratch1);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	345 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	346
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1082 diff changeset	347 static void translate_m68k_trap(m68k_options opts, m68kinst inst)
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	348 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	349 code_info *code = &opts->gen.code;
1027 276cd582b728 Fix PC value pushed to stack for A and F line traps Michael Pavone <pavone@retrodev.com> parents: 992 diff changeset	350 uint32_t vector, pc = inst->address;
992 261995d06897 Implemented A line and F line traps. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	351 switch (inst->op)
261995d06897 Implemented A line and F line traps. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	352 {
261995d06897 Implemented A line and F line traps. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	353 case M68K_TRAP:
261995d06897 Implemented A line and F line traps. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	354 vector = inst->src.params.immed + VECTOR_TRAP_0;
1027 276cd582b728 Fix PC value pushed to stack for A and F line traps Michael Pavone <pavone@retrodev.com> parents: 992 diff changeset	355 pc += 2;
992 261995d06897 Implemented A line and F line traps. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	356 break;
261995d06897 Implemented A line and F line traps. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	357 case M68K_A_LINE_TRAP:
261995d06897 Implemented A line and F line traps. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	358 vector = VECTOR_LINE_1010;
261995d06897 Implemented A line and F line traps. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	359 break;
261995d06897 Implemented A line and F line traps. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	360 case M68K_F_LINE_TRAP:
261995d06897 Implemented A line and F line traps. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	361 vector = VECTOR_LINE_1111;
261995d06897 Implemented A line and F line traps. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	362 break;
261995d06897 Implemented A line and F line traps. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	363 }
261995d06897 Implemented A line and F line traps. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	364 ldi_native(opts, vector, opts->gen.scratch2);
1027 276cd582b728 Fix PC value pushed to stack for A and F line traps Michael Pavone <pavone@retrodev.com> parents: 992 diff changeset	365 ldi_native(opts, pc, opts->gen.scratch1);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	366 jmp(code, opts->trap);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	367 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	368
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1082 diff changeset	369 static void translate_m68k_illegal(m68k_options opts, m68kinst inst)
986 f680fe746a7d Implement illegal instruction trap Michael Pavone <pavone@retrodev.com> parents: 985 diff changeset	370 {
f680fe746a7d Implement illegal instruction trap Michael Pavone <pavone@retrodev.com> parents: 985 diff changeset	371 code_info *code = &opts->gen.code;
f680fe746a7d Implement illegal instruction trap Michael Pavone <pavone@retrodev.com> parents: 985 diff changeset	372 cycles(&opts->gen, BUS);
f680fe746a7d Implement illegal instruction trap Michael Pavone <pavone@retrodev.com> parents: 985 diff changeset	373 ldi_native(opts, VECTOR_ILLEGAL_INST, opts->gen.scratch2);
f680fe746a7d Implement illegal instruction trap Michael Pavone <pavone@retrodev.com> parents: 985 diff changeset	374 ldi_native(opts, inst->address, opts->gen.scratch1);
f680fe746a7d Implement illegal instruction trap Michael Pavone <pavone@retrodev.com> parents: 985 diff changeset	375 jmp(code, opts->trap);
f680fe746a7d Implement illegal instruction trap Michael Pavone <pavone@retrodev.com> parents: 985 diff changeset	376 }
f680fe746a7d Implement illegal instruction trap Michael Pavone <pavone@retrodev.com> parents: 985 diff changeset	377
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1082 diff changeset	378 static void translate_m68k_move_usp(m68k_options opts, m68kinst inst)
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	379 {
990 33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	380 m68k_trap_if_not_supervisor(opts, inst);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	381 cycles(&opts->gen, BUS);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	382 int8_t reg;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	383 if (inst->src.addr_mode == MODE_UNUSED) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	384 reg = native_reg(&inst->dst, opts);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	385 if (reg < 0) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	386 reg = opts->gen.scratch1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	387 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	388 areg_to_native(opts, 8, reg);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	389 if (reg == opts->gen.scratch1) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	390 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	391 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	392 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	393 reg = native_reg(&inst->src, opts);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	394 if (reg < 0) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	395 reg = opts->gen.scratch1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	396 areg_to_native(opts, inst->src.params.regs.pri, reg);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	397 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	398 native_to_areg(opts, reg, 8);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	399 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	400 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	401
1298 d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	402 static void translate_movem_regtomem_reglist(m68k_options * opts, m68kinst *inst)
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	403 {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	404 code_info *code = &opts->gen.code;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	405 int8_t bit,reg,dir;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	406 if (inst->dst.addr_mode == MODE_AREG_PREDEC) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	407 reg = 15;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	408 dir = -1;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	409 } else {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	410 reg = 0;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	411 dir = 1;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	412 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	413 for(bit=0; reg < 16 && reg >= 0; reg += dir, bit++) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	414 if (inst->src.params.immed & (1 << bit)) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	415 if (inst->dst.addr_mode == MODE_AREG_PREDEC) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	416 subi_native(opts, (inst->extra.size == OPSIZE_LONG) ? 4 : 2, opts->gen.scratch2);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	417 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	418 push_native(opts, opts->gen.scratch2);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	419 if (reg > 7) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	420 areg_to_native(opts, reg-8, opts->gen.scratch1);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	421 } else {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	422 dreg_to_native(opts, reg, opts->gen.scratch1);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	423 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	424 if (inst->extra.size == OPSIZE_LONG) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	425 call(code, opts->write_32_lowfirst);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	426 } else {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	427 call(code, opts->write_16);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	428 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	429 pop_native(opts, opts->gen.scratch2);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	430 if (inst->dst.addr_mode != MODE_AREG_PREDEC) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	431 addi_native(opts, (inst->extra.size == OPSIZE_LONG) ? 4 : 2, opts->gen.scratch2);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	432 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	433 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	434 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	435 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	436
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	437 static void translate_movem_memtoreg_reglist(m68k_options * opts, m68kinst *inst)
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	438 {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	439 code_info *code = &opts->gen.code;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	440 for(uint8_t reg = 0; reg < 16; reg ++) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	441 if (inst->dst.params.immed & (1 << reg)) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	442 push_native(opts, opts->gen.scratch1);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	443 if (inst->extra.size == OPSIZE_LONG) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	444 call(code, opts->read_32);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	445 } else {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	446 call(code, opts->read_16);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	447 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	448 if (inst->extra.size == OPSIZE_WORD) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	449 sign_extend16_native(opts, opts->gen.scratch1);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	450 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	451 if (reg > 7) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	452 native_to_areg(opts, opts->gen.scratch1, reg-8);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	453 } else {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	454 native_to_dreg(opts, opts->gen.scratch1, reg);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	455 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	456 pop_native(opts, opts->gen.scratch1);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	457 addi_native(opts, (inst->extra.size == OPSIZE_LONG) ? 4 : 2, opts->gen.scratch1);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	458 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	459 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	460 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	461
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	462 static code_ptr get_movem_impl(m68k_options opts, m68kinst inst)
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	463 {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	464 uint8_t reg_to_mem = inst->src.addr_mode == MODE_REG;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	465 uint8_t size = inst->extra.size;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	466 int8_t dir = reg_to_mem && inst->dst.addr_mode == MODE_AREG_PREDEC ? -1 : 1;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	467 uint16_t reglist = reg_to_mem ? inst->src.params.immed : inst->dst.params.immed;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	468 for (uint32_t i = 0; i < opts->num_movem; i++)
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	469 {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	470 if (
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	471 opts->big_movem[i].reglist == reglist && opts->big_movem[i].reg_to_mem == reg_to_mem
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	472 && opts->big_movem[i].size == size && opts->big_movem[i].dir == dir
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	473 ) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	474 return opts->big_movem[i].impl;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	475 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	476 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	477 if (opts->num_movem == opts->movem_storage) {
1593 24508cb54f87 Fix a number of other memory errors (mostly leaks again) identified by valgrind Michael Pavone <pavone@retrodev.com> parents: 1592 diff changeset	478 if (!opts->movem_storage) {
24508cb54f87 Fix a number of other memory errors (mostly leaks again) identified by valgrind Michael Pavone <pavone@retrodev.com> parents: 1592 diff changeset	479 opts->movem_storage = 4;
24508cb54f87 Fix a number of other memory errors (mostly leaks again) identified by valgrind Michael Pavone <pavone@retrodev.com> parents: 1592 diff changeset	480 } else {
24508cb54f87 Fix a number of other memory errors (mostly leaks again) identified by valgrind Michael Pavone <pavone@retrodev.com> parents: 1592 diff changeset	481 opts->movem_storage *= 2;
24508cb54f87 Fix a number of other memory errors (mostly leaks again) identified by valgrind Michael Pavone <pavone@retrodev.com> parents: 1592 diff changeset	482 }
1298 d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	483 opts->big_movem = realloc(opts->big_movem, sizeof(movem_fun) * opts->movem_storage);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	484 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	485 if (!opts->extra_code.cur) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	486 init_code_info(&opts->extra_code);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	487 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	488 check_alloc_code(&opts->extra_code, 512);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	489 code_ptr impl = opts->extra_code.cur;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	490 code_info tmp = opts->gen.code;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	491 opts->gen.code = opts->extra_code;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	492 if (reg_to_mem) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	493 translate_movem_regtomem_reglist(opts, inst);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	494 } else {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	495 translate_movem_memtoreg_reglist(opts, inst);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	496 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	497 opts->extra_code = opts->gen.code;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	498 opts->gen.code = tmp;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	499
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	500 rts(&opts->extra_code);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	501 return impl;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	502 }
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	503
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1082 diff changeset	504 static void translate_m68k_movem(m68k_options * opts, m68kinst * inst)
588 963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	505 {
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	506 code_info *code = &opts->gen.code;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	507 uint8_t early_cycles;
1298 d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	508 uint16_t num_regs = inst->src.addr_mode == MODE_REG ? inst->src.params.immed : inst->dst.params.immed;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	509 {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	510 //TODO: Move this popcount alg to a utility function
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	511 uint16_t a = (num_regs & 0b1010101010101010) >> 1;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	512 uint16_t b = num_regs & 0b0101010101010101;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	513 num_regs = a + b;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	514 a = (num_regs & 0b1100110011001100) >> 2;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	515 b = num_regs & 0b0011001100110011;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	516 num_regs = a + b;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	517 a = (num_regs & 0b1111000011110000) >> 4;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	518 b = num_regs & 0b0000111100001111;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	519 num_regs = a + b;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	520 a = (num_regs & 0b1111111100000000) >> 8;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	521 b = num_regs & 0b0000000011111111;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	522 num_regs = a + b;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	523 }
588 963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	524 if(inst->src.addr_mode == MODE_REG) {
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	525 //reg to mem
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	526 early_cycles = 8;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	527 switch (inst->dst.addr_mode)
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	528 {
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	529 case MODE_AREG_INDIRECT:
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	530 case MODE_AREG_PREDEC:
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	531 areg_to_native(opts, inst->dst.params.regs.pri, opts->gen.scratch2);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	532 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	533 case MODE_AREG_DISPLACE:
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	534 early_cycles += BUS;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	535 calc_areg_displace(opts, &inst->dst, opts->gen.scratch2);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	536 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	537 case MODE_AREG_INDEX_DISP8:
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	538 early_cycles += 6;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	539 calc_areg_index_disp8(opts, &inst->dst, opts->gen.scratch2);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	540 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	541 case MODE_PC_DISPLACE:
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	542 early_cycles += BUS;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	543 ldi_native(opts, inst->dst.params.regs.displacement + inst->address+2, opts->gen.scratch2);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	544 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	545 case MODE_PC_INDEX_DISP8:
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	546 early_cycles += 6;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	547 ldi_native(opts, inst->address+2, opts->gen.scratch2);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	548 calc_index_disp8(opts, &inst->dst, opts->gen.scratch2);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	549 case MODE_ABSOLUTE:
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	550 early_cycles += 4;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	551 case MODE_ABSOLUTE_SHORT:
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	552 early_cycles += 4;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	553 ldi_native(opts, inst->dst.params.immed, opts->gen.scratch2);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	554 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	555 default:
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	556 m68k_disasm(inst, disasm_buf);
792 724bbec47f86 Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows). Michael Pavone <pavone@retrodev.com> parents: 726 diff changeset	557 fatal_error("%X: %s\naddress mode %d not implemented (movem dst)\n", inst->address, disasm_buf, inst->dst.addr_mode);
588 963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	558 }
1298 d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	559
588 963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	560 cycles(&opts->gen, early_cycles);
1298 d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	561 if (num_regs <= 9) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	562 translate_movem_regtomem_reglist(opts, inst);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	563 } else {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	564 call(code, get_movem_impl(opts, inst));
588 963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	565 }
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	566 if (inst->dst.addr_mode == MODE_AREG_PREDEC) {
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	567 native_to_areg(opts, opts->gen.scratch2, inst->dst.params.regs.pri);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	568 }
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	569 } else {
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	570 //mem to reg
1212 191ac490fb3d Implement extra read and fix movem timing generally Michael Pavone <pavone@retrodev.com> parents: 1130 diff changeset	571 early_cycles = 8; //includes prefetch
588 963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	572 switch (inst->src.addr_mode)
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	573 {
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	574 case MODE_AREG_INDIRECT:
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	575 case MODE_AREG_POSTINC:
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	576 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	577 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	578 case MODE_AREG_DISPLACE:
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	579 early_cycles += BUS;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	580 calc_areg_displace(opts, &inst->src, opts->gen.scratch1);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	581 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	582 case MODE_AREG_INDEX_DISP8:
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	583 early_cycles += 6;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	584 calc_areg_index_disp8(opts, &inst->src, opts->gen.scratch1);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	585 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	586 case MODE_PC_DISPLACE:
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	587 early_cycles += BUS;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	588 ldi_native(opts, inst->src.params.regs.displacement + inst->address+2, opts->gen.scratch1);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	589 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	590 case MODE_PC_INDEX_DISP8:
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	591 early_cycles += 6;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	592 ldi_native(opts, inst->address+2, opts->gen.scratch1);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	593 calc_index_disp8(opts, &inst->src, opts->gen.scratch1);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	594 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	595 case MODE_ABSOLUTE:
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	596 early_cycles += 4;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	597 case MODE_ABSOLUTE_SHORT:
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	598 early_cycles += 4;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	599 ldi_native(opts, inst->src.params.immed, opts->gen.scratch1);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	600 break;
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	601 default:
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	602 m68k_disasm(inst, disasm_buf);
792 724bbec47f86 Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows). Michael Pavone <pavone@retrodev.com> parents: 726 diff changeset	603 fatal_error("%X: %s\naddress mode %d not implemented (movem src)\n", inst->address, disasm_buf, inst->src.addr_mode);
588 963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	604 }
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	605 cycles(&opts->gen, early_cycles);
1298 d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	606
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	607 if (num_regs <= 9) {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	608 translate_movem_memtoreg_reglist(opts, inst);
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	609 } else {
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds Michael Pavone <pavone@retrodev.com> parents: 1282 diff changeset	610 call(code, get_movem_impl(opts, inst));
588 963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	611 }
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	612 if (inst->src.addr_mode == MODE_AREG_POSTINC) {
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	613 native_to_areg(opts, opts->gen.scratch1, inst->src.params.regs.pri);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	614 }
1212 191ac490fb3d Implement extra read and fix movem timing generally Michael Pavone <pavone@retrodev.com> parents: 1130 diff changeset	615 //Extra read
191ac490fb3d Implement extra read and fix movem timing generally Michael Pavone <pavone@retrodev.com> parents: 1130 diff changeset	616 call(code, opts->read_16);
588 963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	617 }
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	618 }
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	619
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1082 diff changeset	620 static void translate_m68k_nop(m68k_options opts, m68kinst inst)
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	621 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	622 cycles(&opts->gen, BUS);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	623 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	624
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	625 void swap_ssp_usp(m68k_options * opts)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	626 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	627 areg_to_native(opts, 7, opts->gen.scratch2);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	628 areg_to_native(opts, 8, opts->aregs[7]);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	629 native_to_areg(opts, opts->gen.scratch2, 8);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	630 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	631
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1082 diff changeset	632 static void translate_m68k_rte(m68k_options opts, m68kinst inst)
687 a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 681 diff changeset	633 {
990 33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	634 m68k_trap_if_not_supervisor(opts, inst);
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	635
687 a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 681 diff changeset	636 code_info *code = &opts->gen.code;
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 681 diff changeset	637 //Read saved SR
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 681 diff changeset	638 areg_to_native(opts, 7, opts->gen.scratch1);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 681 diff changeset	639 call(code, opts->read_16);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 681 diff changeset	640 addi_areg(opts, 2, 7);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 681 diff changeset	641 call(code, opts->set_sr);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 681 diff changeset	642 //Read saved PC
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 681 diff changeset	643 areg_to_native(opts, 7, opts->gen.scratch1);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 681 diff changeset	644 call(code, opts->read_32);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 681 diff changeset	645 addi_areg(opts, 4, 7);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 681 diff changeset	646 check_user_mode_swap_ssp_usp(opts);
1323 c9dc2603b087 Fixed timing for RTS and RTE Michael Pavone <pavone@retrodev.com> parents: 1298 diff changeset	647 cycles(&opts->gen, 2*BUS);
687 a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 681 diff changeset	648 //Get native address, sync components, recalculate integer points and jump to returned address
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 681 diff changeset	649 call(code, opts->native_addr_and_sync);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 681 diff changeset	650 jmp_r(code, opts->gen.scratch1);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 681 diff changeset	651 }
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 681 diff changeset	652
726 7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96 Michael Pavone <pavone@retrodev.com> parents: 725 diff changeset	653 code_ptr get_native_address(m68k_options *opts, uint32_t address)
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	654 {
726 7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96 Michael Pavone <pavone@retrodev.com> parents: 725 diff changeset	655 native_map_slot * native_code_map = opts->gen.native_code_map;
987 1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	656
1130 8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	657 memmap_chunk const *mem_chunk = find_map_chunk(address, &opts->gen, 0, NULL);
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	658 if (mem_chunk) {
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	659 //calculate the lowest alias for this address
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	660 address = mem_chunk->start + ((address - mem_chunk->start) & mem_chunk->mask);
1214 afa3d0a227ae Fix regression in handling of unmapped memory addresses Michael Pavone <pavone@retrodev.com> parents: 1212 diff changeset	661 } else {
afa3d0a227ae Fix regression in handling of unmapped memory addresses Michael Pavone <pavone@retrodev.com> parents: 1212 diff changeset	662 address &= opts->gen.address_mask;
985 751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	663 }
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	664 uint32_t chunk = address / NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	665 if (!native_code_map[chunk].base) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	666 return NULL;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	667 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	668 uint32_t offset = address % NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	669 if (native_code_map[chunk].offsets[offset] == INVALID_OFFSET \|\| native_code_map[chunk].offsets[offset] == EXTENSION_WORD) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	670 return NULL;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	671 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	672 return native_code_map[chunk].base + native_code_map[chunk].offsets[offset];
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	673 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	674
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	675 code_ptr get_native_from_context(m68k_context * context, uint32_t address)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	676 {
726 7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96 Michael Pavone <pavone@retrodev.com> parents: 725 diff changeset	677 return get_native_address(context->options, address);
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	678 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	679
1130 8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	680 uint32_t get_instruction_start(m68k_options *opts, uint32_t address)
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	681 {
1130 8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	682 native_map_slot * native_code_map = opts->gen.native_code_map;
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	683 memmap_chunk const *mem_chunk = find_map_chunk(address, &opts->gen, 0, NULL);
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	684 if (mem_chunk) {
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	685 //calculate the lowest alias for this address
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	686 address = mem_chunk->start + ((address - mem_chunk->start) & mem_chunk->mask);
1214 afa3d0a227ae Fix regression in handling of unmapped memory addresses Michael Pavone <pavone@retrodev.com> parents: 1212 diff changeset	687 } else {
afa3d0a227ae Fix regression in handling of unmapped memory addresses Michael Pavone <pavone@retrodev.com> parents: 1212 diff changeset	688 address &= opts->gen.address_mask;
985 751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	689 }
751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	690
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	691 uint32_t chunk = address / NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	692 if (!native_code_map[chunk].base) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	693 return 0;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	694 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	695 uint32_t offset = address % NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	696 if (native_code_map[chunk].offsets[offset] == INVALID_OFFSET) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	697 return 0;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	698 }
1130 8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	699 while (native_code_map[chunk].offsets[offset] == EXTENSION_WORD)
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	700 {
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	701 --address;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	702 chunk = address / NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	703 offset = address % NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	704 }
988 ce9df7a5fdf2 Fix changes made to get_instruction_start and map_native_address to cope with being able to translate at odd addresses. Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	705 return address;
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	706 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	707
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1082 diff changeset	708 static void map_native_address(m68k_context * context, uint32_t address, code_ptr native_addr, uint8_t size, uint8_t native_size)
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	709 {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	710 m68k_options * opts = context->options;
1130 8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	711 native_map_slot * native_code_map = opts->gen.native_code_map;
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	712 uint32_t meta_off;
1228 2e6dcb5c11a2 WIP support for XBAND mapper hardware Michael Pavone <pavone@retrodev.com> parents: 1214 diff changeset	713 memmap_chunk const *mem_chunk = find_map_chunk(address, &opts->gen, MMAP_CODE, &meta_off);
1130 8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	714 if (mem_chunk) {
1228 2e6dcb5c11a2 WIP support for XBAND mapper hardware Michael Pavone <pavone@retrodev.com> parents: 1214 diff changeset	715 if (mem_chunk->flags & MMAP_CODE) {
2e6dcb5c11a2 WIP support for XBAND mapper hardware Michael Pavone <pavone@retrodev.com> parents: 1214 diff changeset	716 uint32_t masked = (address - mem_chunk->start) & mem_chunk->mask;
1130 8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	717 uint32_t final_off = masked + meta_off;
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	718 uint32_t ram_flags_off = final_off >> (opts->gen.ram_flags_shift + 3);
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	719 context->ram_code_flags[ram_flags_off] \|= 1 << ((final_off >> opts->gen.ram_flags_shift) & 7);
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 688 diff changeset	720
1130 8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	721 uint32_t slot = final_off / 1024;
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	722 if (!opts->gen.ram_inst_sizes[slot]) {
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	723 opts->gen.ram_inst_sizes[slot] = malloc(sizeof(uint8_t) * 512);
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	724 }
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	725 opts->gen.ram_inst_sizes[slot][(final_off/2) & 511] = native_size;
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 688 diff changeset	726
1130 8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	727 //TODO: Deal with case in which end of instruction is in a different memory chunk
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	728 masked = (address + size - 1) & mem_chunk->mask;
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	729 final_off = masked + meta_off;
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	730 ram_flags_off = final_off >> (opts->gen.ram_flags_shift + 3);
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	731 context->ram_code_flags[ram_flags_off] \|= 1 << ((final_off >> opts->gen.ram_flags_shift) & 7);
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	732 }
1130 8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	733 //calculate the lowest alias for this address
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	734 address = mem_chunk->start + ((address - mem_chunk->start) & mem_chunk->mask);
1214 afa3d0a227ae Fix regression in handling of unmapped memory addresses Michael Pavone <pavone@retrodev.com> parents: 1212 diff changeset	735 } else {
afa3d0a227ae Fix regression in handling of unmapped memory addresses Michael Pavone <pavone@retrodev.com> parents: 1212 diff changeset	736 address &= opts->gen.address_mask;
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	737 }
987 1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	738
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	739 uint32_t chunk = address / NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	740 if (!native_code_map[chunk].base) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	741 native_code_map[chunk].base = native_addr;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	742 native_code_map[chunk].offsets = malloc(sizeof(int32_t) * NATIVE_CHUNK_SIZE);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	743 memset(native_code_map[chunk].offsets, 0xFF, sizeof(int32_t) * NATIVE_CHUNK_SIZE);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	744 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	745 uint32_t offset = address % NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	746 native_code_map[chunk].offsets[offset] = native_addr-native_code_map[chunk].base;
988 ce9df7a5fdf2 Fix changes made to get_instruction_start and map_native_address to cope with being able to translate at odd addresses. Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	747 for(address++,size-=1; size; address++,size-=1) {
ce9df7a5fdf2 Fix changes made to get_instruction_start and map_native_address to cope with being able to translate at odd addresses. Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	748 address &= opts->gen.address_mask;
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	749 chunk = address / NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	750 offset = address % NATIVE_CHUNK_SIZE;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	751 if (!native_code_map[chunk].base) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	752 native_code_map[chunk].base = native_addr;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	753 native_code_map[chunk].offsets = malloc(sizeof(int32_t) * NATIVE_CHUNK_SIZE);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	754 memset(native_code_map[chunk].offsets, 0xFF, sizeof(int32_t) * NATIVE_CHUNK_SIZE);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	755 }
713 f9b80a78d9a6 Don't overwrite an instruction offset mapping with an extension word value. I really need the ability for a word to be mapped to more than one instruction, but this will be more correct for now Michael Pavone <pavone@retrodev.com> parents: 706 diff changeset	756 if (native_code_map[chunk].offsets[offset] == INVALID_OFFSET) {
f9b80a78d9a6 Don't overwrite an instruction offset mapping with an extension word value. I really need the ability for a word to be mapped to more than one instruction, but this will be more correct for now Michael Pavone <pavone@retrodev.com> parents: 706 diff changeset	757 //TODO: Better handling of overlapping instructions
f9b80a78d9a6 Don't overwrite an instruction offset mapping with an extension word value. I really need the ability for a word to be mapped to more than one instruction, but this will be more correct for now Michael Pavone <pavone@retrodev.com> parents: 706 diff changeset	758 native_code_map[chunk].offsets[offset] = EXTENSION_WORD;
f9b80a78d9a6 Don't overwrite an instruction offset mapping with an extension word value. I really need the ability for a word to be mapped to more than one instruction, but this will be more correct for now Michael Pavone <pavone@retrodev.com> parents: 706 diff changeset	759 }
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	760 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	761 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	762
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1082 diff changeset	763 static uint8_t get_native_inst_size(m68k_options * opts, uint32_t address)
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	764 {
1130 8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	765 uint32_t meta_off;
1228 2e6dcb5c11a2 WIP support for XBAND mapper hardware Michael Pavone <pavone@retrodev.com> parents: 1214 diff changeset	766 memmap_chunk const *chunk = find_map_chunk(address, &opts->gen, MMAP_CODE, &meta_off);
1130 8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	767 if (chunk) {
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	768 meta_off += (address - chunk->start) & chunk->mask;
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	769 }
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 688 diff changeset	770 uint32_t slot = meta_off/1024;
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 688 diff changeset	771 return opts->gen.ram_inst_sizes[slot][(meta_off/2)%512];
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	772 }
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	773 #endif
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	774
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	775 uint8_t m68k_is_terminal(m68kinst * inst)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	776 {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	777 return inst->op == M68K_RTS \|\| inst->op == M68K_RTE \|\| inst->op == M68K_RTR \|\| inst->op == M68K_JMP
1279 996eb76d6da1 RESET is not a terminal instruction on the 68K. Fixes a crash bug in Chavez II and possibly other games Michael Pavone <pavone@retrodev.com> parents: 1275 diff changeset	778 \|\| inst->op == M68K_TRAP \|\| inst->op == M68K_ILLEGAL \|\| inst->op == M68K_INVALID
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	779 \|\| (inst->op == M68K_BCC && inst->extra.cond == COND_TRUE);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	780 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	781
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	782 #ifdef USE_NATIVE
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1082 diff changeset	783 static void m68k_handle_deferred(m68k_context * context)
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	784 {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	785 m68k_options * opts = context->options;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	786 process_deferred(&opts->gen.deferred, context, (native_addr_func)get_native_from_context);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	787 if (opts->gen.deferred) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	788 translate_m68k_stream(opts->gen.deferred->address, context);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	789 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	790 }
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	791 #endif
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	792
989 d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 988 diff changeset	793 uint16_t m68k_get_ir(m68k_context *context)
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 988 diff changeset	794 {
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	795 #ifdef USE_NATIVE
1130 8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	796 uint32_t inst_addr = get_instruction_start(context->options, context->last_prefetch_address-2);
989 d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 988 diff changeset	797 uint16_t native_addr = get_native_pointer(inst_addr, (void *)context->mem_pointers, &context->options->gen);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 988 diff changeset	798 if (native_addr) {
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 988 diff changeset	799 return *native_addr;
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 988 diff changeset	800 }
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 988 diff changeset	801 fprintf(stderr, "M68K: Failed to calculate value of IR. Last prefetch address: %X\n", context->last_prefetch_address);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 988 diff changeset	802 return 0xFFFF;
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	803 #else
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	804 return ((m68000_base_device *)context)->ir;
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	805 #endif
989 d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 988 diff changeset	806 }
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 988 diff changeset	807
1329 85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	808 static m68k_debug_handler find_breakpoint(m68k_context *context, uint32_t address)
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	809 {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	810 for (uint32_t i = 0; i < context->num_breakpoints; i++)
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	811 {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	812 if (context->breakpoints[i].address == address) {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	813 return context->breakpoints[i].handler;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	814 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	815 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	816 return NULL;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	817 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	818
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	819 void insert_breakpoint(m68k_context * context, uint32_t address, m68k_debug_handler bp_handler)
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	820 {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	821 if (!find_breakpoint(context, address)) {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	822 if (context->bp_storage == context->num_breakpoints) {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	823 context->bp_storage *= 2;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	824 if (context->bp_storage < 4) {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	825 context->bp_storage = 4;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	826 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	827 context->breakpoints = realloc(context->breakpoints, context->bp_storage * sizeof(m68k_breakpoint));
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	828 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	829 context->breakpoints[context->num_breakpoints++] = (m68k_breakpoint){
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	830 .handler = bp_handler,
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	831 .address = address
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	832 };
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	833 #ifdef USE_NATIVE
1329 85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	834 m68k_breakpoint_patch(context, address, bp_handler, NULL);
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	835 #endif
1329 85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	836 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	837 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	838
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	839 m68k_context m68k_bp_dispatcher(m68k_context context, uint32_t address)
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	840 {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	841 m68k_debug_handler handler = find_breakpoint(context, address);
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	842 if (handler) {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	843 handler(context, address);
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	844 } else {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	845 //spurious breakoint?
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	846 warning("Spurious breakpoing at %X\n", address);
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	847 remove_breakpoint(context, address);
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	848 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	849
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	850 return context;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	851 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	852
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	853 #ifdef USE_NATIVE
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	854 typedef enum {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	855 RAW_FUNC = 1,
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	856 BINARY_ARITH,
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	857 UNARY_ARITH,
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	858 OP_FUNC
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	859 } impl_type;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	860
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	861 typedef void (raw_fun)(m68k_options opts, m68kinst *inst);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	862 typedef void (op_fun)(m68k_options opts, m68kinst inst, host_ea src_op, host_ea *dst_op);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	863
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	864 typedef struct {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	865 union {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	866 raw_fun raw;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	867 uint32_t flag_mask;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	868 op_fun op;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	869 } impl;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	870 impl_type itype;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	871 } impl_info;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	872
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	873 #define RAW_IMPL(inst, fun) [inst] = { .impl = { .raw = fun }, .itype = RAW_FUNC }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	874 #define OP_IMPL(inst, fun) [inst] = { .impl = { .op = fun }, .itype = OP_FUNC }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	875 #define UNARY_IMPL(inst, mask) [inst] = { .impl = { .flag_mask = mask }, .itype = UNARY_ARITH }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	876 #define BINARY_IMPL(inst, mask) [inst] = { .impl = { .flag_mask = mask}, .itype = BINARY_ARITH }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	877
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1082 diff changeset	878 static impl_info m68k_impls[] = {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	879 //math
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	880 BINARY_IMPL(M68K_ADD, X\|N\|Z\|V\|C),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	881 BINARY_IMPL(M68K_SUB, X\|N\|Z\|V\|C),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	882 //z flag is special cased for ADDX/SUBX
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	883 BINARY_IMPL(M68K_ADDX, X\|N\|V\|C),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	884 BINARY_IMPL(M68K_SUBX, X\|N\|V\|C),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	885 OP_IMPL(M68K_ABCD, translate_m68k_abcd_sbcd),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	886 OP_IMPL(M68K_SBCD, translate_m68k_abcd_sbcd),
834 65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 799 diff changeset	887 OP_IMPL(M68K_NBCD, translate_m68k_abcd_sbcd),
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	888 BINARY_IMPL(M68K_AND, N\|Z\|V0\|C0),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	889 BINARY_IMPL(M68K_EOR, N\|Z\|V0\|C0),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	890 BINARY_IMPL(M68K_OR, N\|Z\|V0\|C0),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	891 RAW_IMPL(M68K_CMP, translate_m68k_cmp),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	892 OP_IMPL(M68K_DIVS, translate_m68k_div),
1282 c5821f9de325 Cycle accurate implementation of divs Michael Pavone <pavone@retrodev.com> parents: 1279 diff changeset	893 OP_IMPL(M68K_DIVU, translate_m68k_div),
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	894 OP_IMPL(M68K_MULS, translate_m68k_mul),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	895 OP_IMPL(M68K_MULU, translate_m68k_mul),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	896 RAW_IMPL(M68K_EXT, translate_m68k_ext),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	897 UNARY_IMPL(M68K_NEG, X\|N\|Z\|V\|C),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	898 OP_IMPL(M68K_NEGX, translate_m68k_negx),
614 60a06c025103 Fix flag mask for m68k not Michael Pavone <pavone@retrodev.com> parents: 588 diff changeset	899 UNARY_IMPL(M68K_NOT, N\|Z\|V\|C),
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	900 UNARY_IMPL(M68K_TST, N\|Z\|V0\|C0),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	901
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	902 //shift/rotate
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	903 OP_IMPL(M68K_ASL, translate_m68k_sl),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	904 OP_IMPL(M68K_LSL, translate_m68k_sl),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	905 OP_IMPL(M68K_ASR, translate_m68k_asr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	906 OP_IMPL(M68K_LSR, translate_m68k_lsr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	907 OP_IMPL(M68K_ROL, translate_m68k_rot),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	908 OP_IMPL(M68K_ROR, translate_m68k_rot),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	909 OP_IMPL(M68K_ROXL, translate_m68k_rot),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	910 OP_IMPL(M68K_ROXR, translate_m68k_rot),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	911 UNARY_IMPL(M68K_SWAP, N\|Z\|V0\|C0),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	912
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	913 //bit
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	914 OP_IMPL(M68K_BCHG, translate_m68k_bit),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	915 OP_IMPL(M68K_BCLR, translate_m68k_bit),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	916 OP_IMPL(M68K_BSET, translate_m68k_bit),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	917 OP_IMPL(M68K_BTST, translate_m68k_bit),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	918
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	919 //data movement
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	920 RAW_IMPL(M68K_MOVE, translate_m68k_move),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	921 RAW_IMPL(M68K_MOVEM, translate_m68k_movem),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	922 RAW_IMPL(M68K_MOVEP, translate_m68k_movep),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	923 RAW_IMPL(M68K_MOVE_USP, translate_m68k_move_usp),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	924 RAW_IMPL(M68K_LEA, translate_m68k_lea_pea),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	925 RAW_IMPL(M68K_PEA, translate_m68k_lea_pea),
1584 e01adbe1a75b Fix instruction timing for a number of instructions with only a single operand Michael Pavone <pavone@retrodev.com> parents: 1475 diff changeset	926 UNARY_IMPL(M68K_CLR, N0\|V0\|C0\|Z1),
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	927 OP_IMPL(M68K_EXG, translate_m68k_exg),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	928 RAW_IMPL(M68K_SCC, translate_m68k_scc),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	929
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	930 //function calls and branches
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	931 RAW_IMPL(M68K_BCC, translate_m68k_bcc),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	932 RAW_IMPL(M68K_BSR, translate_m68k_bsr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	933 RAW_IMPL(M68K_DBCC, translate_m68k_dbcc),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	934 RAW_IMPL(M68K_JMP, translate_m68k_jmp_jsr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	935 RAW_IMPL(M68K_JSR, translate_m68k_jmp_jsr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	936 RAW_IMPL(M68K_RTS, translate_m68k_rts),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	937 RAW_IMPL(M68K_RTE, translate_m68k_rte),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	938 RAW_IMPL(M68K_RTR, translate_m68k_rtr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	939 RAW_IMPL(M68K_LINK, translate_m68k_link),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	940 RAW_IMPL(M68K_UNLK, translate_m68k_unlk),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	941
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	942 //SR/CCR stuff
584 b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 582 diff changeset	943 RAW_IMPL(M68K_ANDI_CCR, translate_m68k_andi_ori_ccr_sr),
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 582 diff changeset	944 RAW_IMPL(M68K_ANDI_SR, translate_m68k_andi_ori_ccr_sr),
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	945 RAW_IMPL(M68K_EORI_CCR, translate_m68k_eori_ccr_sr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	946 RAW_IMPL(M68K_EORI_SR, translate_m68k_eori_ccr_sr),
584 b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 582 diff changeset	947 RAW_IMPL(M68K_ORI_CCR, translate_m68k_andi_ori_ccr_sr),
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 582 diff changeset	948 RAW_IMPL(M68K_ORI_SR, translate_m68k_andi_ori_ccr_sr),
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	949 OP_IMPL(M68K_MOVE_CCR, translate_m68k_move_ccr_sr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	950 OP_IMPL(M68K_MOVE_SR, translate_m68k_move_ccr_sr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	951 OP_IMPL(M68K_MOVE_FROM_SR, translate_m68k_move_from_sr),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	952 RAW_IMPL(M68K_STOP, translate_m68k_stop),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	953
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	954 //traps
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	955 OP_IMPL(M68K_CHK, translate_m68k_chk),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	956 RAW_IMPL(M68K_TRAP, translate_m68k_trap),
992 261995d06897 Implemented A line and F line traps. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	957 RAW_IMPL(M68K_A_LINE_TRAP, translate_m68k_trap),
261995d06897 Implemented A line and F line traps. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	958 RAW_IMPL(M68K_F_LINE_TRAP, translate_m68k_trap),
839 4556818b6847 Implement TRAPV Michael Pavone <pavone@retrodev.com> parents: 837 diff changeset	959 RAW_IMPL(M68K_TRAPV, translate_m68k_trapv),
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	960 RAW_IMPL(M68K_ILLEGAL, translate_m68k_illegal),
986 f680fe746a7d Implement illegal instruction trap Michael Pavone <pavone@retrodev.com> parents: 985 diff changeset	961 RAW_IMPL(M68K_INVALID, translate_m68k_illegal),
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	962
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	963 //misc
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	964 RAW_IMPL(M68K_NOP, translate_m68k_nop),
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	965 RAW_IMPL(M68K_RESET, translate_m68k_reset),
837 f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	966 RAW_IMPL(M68K_TAS, translate_m68k_tas),
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	967 };
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	968
1329 85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	969 static void translate_m68k(m68k_context context, m68kinst inst)
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	970 {
1329 85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	971 m68k_options * opts = context->options;
987 1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	972 if (inst->address & 1) {
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	973 translate_m68k_odd(opts, inst);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	974 return;
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	975 }
1329 85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	976 code_ptr start = opts->gen.code.cur;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	977 check_cycles_int(&opts->gen, inst->address);
1329 85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	978
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	979 m68k_debug_handler bp;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	980 if ((bp = find_breakpoint(context, inst->address))) {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	981 m68k_breakpoint_patch(context, inst->address, bp, start);
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	982 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	983
701 200ee73c7210 Remove/comment verbose logging added for tracking down sync bug Michael Pavone <pavone@retrodev.com> parents: 697 diff changeset	984 //log_address(&opts->gen, inst->address, "M68K: %X @ %d\n");
981 902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 979 diff changeset	985 if (
902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 979 diff changeset	986 (inst->src.addr_mode > MODE_AREG && inst->src.addr_mode < MODE_IMMEDIATE)
902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 979 diff changeset	987 \|\| (inst->dst.addr_mode > MODE_AREG && inst->dst.addr_mode < MODE_IMMEDIATE)
989 d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 988 diff changeset	988 \|\| (inst->op == M68K_BCC && (inst->src.params.immed & 1))
981 902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 979 diff changeset	989 ) {
902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 979 diff changeset	990 //Not accurate for all cases, but probably good enough for now
902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 979 diff changeset	991 m68k_set_last_prefetch(opts, inst->address + inst->bytes);
902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 979 diff changeset	992 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	993 impl_info * info = m68k_impls + inst->op;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	994 if (info->itype == RAW_FUNC) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	995 info->impl.raw(opts, inst);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	996 return;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	997 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	998
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	999 host_ea src_op, dst_op;
1363 df6af7187b36 Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move Michael Pavone <pavone@retrodev.com> parents: 1341 diff changeset	1000 uint8_t needs_int_latch = 0;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1001 if (inst->src.addr_mode != MODE_UNUSED) {
1363 df6af7187b36 Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move Michael Pavone <pavone@retrodev.com> parents: 1341 diff changeset	1002 needs_int_latch \|= translate_m68k_op(inst, &src_op, opts, 0);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1003 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1004 if (inst->dst.addr_mode != MODE_UNUSED) {
1363 df6af7187b36 Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move Michael Pavone <pavone@retrodev.com> parents: 1341 diff changeset	1005 needs_int_latch \|= translate_m68k_op(inst, &dst_op, opts, 1);
df6af7187b36 Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move Michael Pavone <pavone@retrodev.com> parents: 1341 diff changeset	1006 }
df6af7187b36 Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move Michael Pavone <pavone@retrodev.com> parents: 1341 diff changeset	1007 if (needs_int_latch) {
df6af7187b36 Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move Michael Pavone <pavone@retrodev.com> parents: 1341 diff changeset	1008 m68k_check_cycles_int_latch(opts);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1009 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1010 if (info->itype == OP_FUNC) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1011 info->impl.op(opts, inst, &src_op, &dst_op);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1012 } else if (info->itype == BINARY_ARITH) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1013 translate_m68k_arith(opts, inst, info->impl.flag_mask, &src_op, &dst_op);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1014 } else if (info->itype == UNARY_ARITH) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1015 translate_m68k_unary(opts, inst, info->impl.flag_mask, inst->dst.addr_mode != MODE_UNUSED ? &dst_op : &src_op);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1016 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1017 m68k_disasm(inst, disasm_buf);
792 724bbec47f86 Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows). Michael Pavone <pavone@retrodev.com> parents: 726 diff changeset	1018 fatal_error("%X: %s\ninstruction %d not yet implemented\n", inst->address, disasm_buf, inst->op);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1019 }
894 a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted. Michael Pavone <pavone@retrodev.com> parents: 884 diff changeset	1020 if (opts->gen.code.stack_off) {
a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted. Michael Pavone <pavone@retrodev.com> parents: 884 diff changeset	1021 m68k_disasm(inst, disasm_buf);
a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted. Michael Pavone <pavone@retrodev.com> parents: 884 diff changeset	1022 fatal_error("Stack offset is %X after %X: %s\n", opts->gen.code.stack_off, inst->address, disasm_buf);
a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted. Michael Pavone <pavone@retrodev.com> parents: 884 diff changeset	1023 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1024 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1025
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1026 void translate_m68k_stream(uint32_t address, m68k_context * context)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1027 {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1028 m68kinst instbuf;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1029 m68k_options * opts = context->options;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1030 code_info *code = &opts->gen.code;
726 7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96 Michael Pavone <pavone@retrodev.com> parents: 725 diff changeset	1031 if(get_native_address(opts, address)) {
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1032 return;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1033 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1034 uint16_t encoded, next;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1035 do {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1036 if (opts->address_log) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1037 fprintf(opts->address_log, "%X\n", address);
654 98927f1b005b Fix some issues with 68K instruction retranslation Michael Pavone <pavone@retrodev.com> parents: 653 diff changeset	1038 fflush(opts->address_log);
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1039 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1040 do {
653 a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores Michael Pavone <pavone@retrodev.com> parents: 614 diff changeset	1041 encoded = get_native_pointer(address, (void **)context->mem_pointers, &opts->gen);
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores Michael Pavone <pavone@retrodev.com> parents: 614 diff changeset	1042 if (!encoded) {
1228 2e6dcb5c11a2 WIP support for XBAND mapper hardware Michael Pavone <pavone@retrodev.com> parents: 1214 diff changeset	1043 code_ptr start = code->cur;
1082 2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution. Michael Pavone <pavone@retrodev.com> parents: 1027 diff changeset	1044 translate_out_of_bounds(opts, address);
1228 2e6dcb5c11a2 WIP support for XBAND mapper hardware Michael Pavone <pavone@retrodev.com> parents: 1214 diff changeset	1045 code_ptr after = code->cur;
1275 f36ef4847ef2 Fix bug in handling of translating unmapped addresses Michael Pavone <pavone@retrodev.com> parents: 1262 diff changeset	1046 map_native_address(context, address, start, 2, after-start);
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1047 break;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1048 }
726 7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96 Michael Pavone <pavone@retrodev.com> parents: 725 diff changeset	1049 code_ptr existing = get_native_address(opts, address);
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1050 if (existing) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1051 jmp(code, existing);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1052 break;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1053 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1054 next = m68k_decode(encoded, &instbuf, address);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1055 if (instbuf.op == M68K_INVALID) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1056 instbuf.src.params.immed = *encoded;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1057 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1058 uint16_t m68k_size = (next-encoded)*2;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1059 address += m68k_size;
653 a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores Michael Pavone <pavone@retrodev.com> parents: 614 diff changeset	1060 //char disbuf[1024];
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1061 //m68k_disasm(&instbuf, disbuf);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1062 //printf("%X: %s\n", instbuf.address, disbuf);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1063
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1064 //make sure the beginning of the code for an instruction is contiguous
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1065 check_code_prologue(code);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1066 code_ptr start = code->cur;
1329 85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	1067 translate_m68k(context, &instbuf);
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1068 code_ptr after = code->cur;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1069 map_native_address(context, instbuf.address, start, m68k_size, after-start);
987 1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	1070 } while(!m68k_is_terminal(&instbuf) && !(address & 1));
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1071 process_deferred(&opts->gen.deferred, context, (native_addr_func)get_native_from_context);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1072 if (opts->gen.deferred) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1073 address = opts->gen.deferred->address;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1074 }
653 a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores Michael Pavone <pavone@retrodev.com> parents: 614 diff changeset	1075 } while(opts->gen.deferred);
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1076 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1077
587 55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1078 void * m68k_retranslate_inst(uint32_t address, m68k_context * context)
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1079 {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1080 m68k_options * opts = context->options;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1081 code_info *code = &opts->gen.code;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1082 uint8_t orig_size = get_native_inst_size(opts, address);
726 7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96 Michael Pavone <pavone@retrodev.com> parents: 725 diff changeset	1083 code_ptr orig_start = get_native_address(context->options, address);
587 55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1084 uint32_t orig = address;
902 6011409ded0d Fix a few lingering stack alignment rework bugs Michael Pavone <pavone@retrodev.com> parents: 894 diff changeset	1085 code_info orig_code = {orig_start, orig_start + orig_size + 5, 0};
653 a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores Michael Pavone <pavone@retrodev.com> parents: 614 diff changeset	1086 uint16_t after, inst = get_native_pointer(address, (void **)context->mem_pointers, &opts->gen);
587 55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1087 m68kinst instbuf;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1088 after = m68k_decode(inst, &instbuf, orig);
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1089 if (orig_size != MAX_NATIVE_SIZE) {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1090 deferred_addr * orig_deferred = opts->gen.deferred;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1091
654 98927f1b005b Fix some issues with 68K instruction retranslation Michael Pavone <pavone@retrodev.com> parents: 653 diff changeset	1092 //make sure we have enough code space for the max size instruction
98927f1b005b Fix some issues with 68K instruction retranslation Michael Pavone <pavone@retrodev.com> parents: 653 diff changeset	1093 check_alloc_code(code, MAX_NATIVE_SIZE);
587 55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1094 code_ptr native_start = code->cur;
1329 85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	1095 translate_m68k(context, &instbuf);
587 55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1096 code_ptr native_end = code->cur;
654 98927f1b005b Fix some issues with 68K instruction retranslation Michael Pavone <pavone@retrodev.com> parents: 653 diff changeset	1097 /*uint8_t is_terminal = m68k_is_terminal(&instbuf);
587 55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1098 if ((native_end - native_start) <= orig_size) {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1099 code_ptr native_next;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1100 if (!is_terminal) {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1101 native_next = get_native_address(context->native_code_map, orig + (after-inst)*2);
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1102 }
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1103 if (is_terminal \|\| (native_next && ((native_next == orig_start + orig_size) \|\| (orig_size - (native_end - native_start)) > 5))) {
654 98927f1b005b Fix some issues with 68K instruction retranslation Michael Pavone <pavone@retrodev.com> parents: 653 diff changeset	1104 printf("Using original location: %p\n", orig_code.cur);
587 55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1105 remove_deferred_until(&opts->gen.deferred, orig_deferred);
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1106 code_info tmp;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1107 tmp.cur = code->cur;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1108 tmp.last = code->last;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1109 code->cur = orig_code.cur;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1110 code->last = orig_code.last;
1329 85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	1111 translate_m68k(context, &instbuf);
587 55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1112 native_end = orig_code.cur = code->cur;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1113 code->cur = tmp.cur;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1114 code->last = tmp.last;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1115 if (!is_terminal) {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1116 nop_fill_or_jmp_next(&orig_code, orig_start + orig_size, native_next);
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1117 }
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1118 m68k_handle_deferred(context);
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1119 return orig_start;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1120 }
654 98927f1b005b Fix some issues with 68K instruction retranslation Michael Pavone <pavone@retrodev.com> parents: 653 diff changeset	1121 }*/
587 55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1122
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1123 map_native_address(context, instbuf.address, native_start, (after-inst)*2, MAX_NATIVE_SIZE);
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1124
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1125 jmp(&orig_code, native_start);
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1126 if (!m68k_is_terminal(&instbuf)) {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1127 code_ptr native_end = code->cur;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1128 code->cur = native_start + MAX_NATIVE_SIZE;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1129 code_ptr rest = get_native_address_trans(context, orig + (after-inst)*2);
1341 f1607874dbee Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation Michael Pavone <pavone@retrodev.com> parents: 1329 diff changeset	1130 code_info tmp_code = {
f1607874dbee Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation Michael Pavone <pavone@retrodev.com> parents: 1329 diff changeset	1131 .cur = native_end,
f1607874dbee Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation Michael Pavone <pavone@retrodev.com> parents: 1329 diff changeset	1132 .last = native_start + MAX_NATIVE_SIZE,
f1607874dbee Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation Michael Pavone <pavone@retrodev.com> parents: 1329 diff changeset	1133 .stack_off = code->stack_off
f1607874dbee Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation Michael Pavone <pavone@retrodev.com> parents: 1329 diff changeset	1134 };
f1607874dbee Fix intermittent crash due to an inadvertent executable memory allocation in m68k instruction retranslation Michael Pavone <pavone@retrodev.com> parents: 1329 diff changeset	1135 jmp(&tmp_code, rest);
587 55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1136 } else {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1137 code->cur = native_start + MAX_NATIVE_SIZE;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1138 }
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1139 m68k_handle_deferred(context);
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1140 return native_start;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1141 } else {
654 98927f1b005b Fix some issues with 68K instruction retranslation Michael Pavone <pavone@retrodev.com> parents: 653 diff changeset	1142 code_info tmp = *code;
98927f1b005b Fix some issues with 68K instruction retranslation Michael Pavone <pavone@retrodev.com> parents: 653 diff changeset	1143 *code = orig_code;
1329 85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	1144 translate_m68k(context, &instbuf);
654 98927f1b005b Fix some issues with 68K instruction retranslation Michael Pavone <pavone@retrodev.com> parents: 653 diff changeset	1145 orig_code = *code;
98927f1b005b Fix some issues with 68K instruction retranslation Michael Pavone <pavone@retrodev.com> parents: 653 diff changeset	1146 *code = tmp;
587 55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1147 if (!m68k_is_terminal(&instbuf)) {
654 98927f1b005b Fix some issues with 68K instruction retranslation Michael Pavone <pavone@retrodev.com> parents: 653 diff changeset	1148 jmp(&orig_code, get_native_address_trans(context, orig + (after-inst)*2));
587 55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1149 }
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1150 m68k_handle_deferred(context);
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1151 return orig_start;
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1152 }
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1153 }
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	1154
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1155 code_ptr get_native_address_trans(m68k_context * context, uint32_t address)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1156 {
726 7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96 Michael Pavone <pavone@retrodev.com> parents: 725 diff changeset	1157 code_ptr ret = get_native_address(context->options, address);
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1158 if (!ret) {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1159 translate_m68k_stream(address, context);
726 7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96 Michael Pavone <pavone@retrodev.com> parents: 725 diff changeset	1160 ret = get_native_address(context->options, address);
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1161 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1162 return ret;
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1163 }
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1164 #endif
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1165
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1166 void remove_breakpoint(m68k_context * context, uint32_t address)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1167 {
1329 85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	1168 for (uint32_t i = 0; i < context->num_breakpoints; i++)
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	1169 {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	1170 if (context->breakpoints[i].address == address) {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	1171 if (i != (context->num_breakpoints-1)) {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	1172 context->breakpoints[i] = context->breakpoints[context->num_breakpoints-1];
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	1173 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	1174 context->num_breakpoints--;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	1175 break;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	1176 }
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	1177 }
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1178 #ifdef USE_NATIVE
726 7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96 Michael Pavone <pavone@retrodev.com> parents: 725 diff changeset	1179 code_ptr native = get_native_address(context->options, address);
1329 85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	1180 if (!native) {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	1181 return;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching Michael Pavone <pavone@retrodev.com> parents: 1323 diff changeset	1182 }
673 7f1b5570b2a1 Fix 68K remove_breakpoint Michael Pavone <pavone@retrodev.com> parents: 654 diff changeset	1183 code_info tmp = context->options->gen.code;
7f1b5570b2a1 Fix 68K remove_breakpoint Michael Pavone <pavone@retrodev.com> parents: 654 diff changeset	1184 context->options->gen.code.cur = native;
706 0a6dea8c8083 Fix problem with removing breakpoints Michael Pavone <pavone@retrodev.com> parents: 701 diff changeset	1185 context->options->gen.code.last = native + MAX_NATIVE_SIZE;
653 a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores Michael Pavone <pavone@retrodev.com> parents: 614 diff changeset	1186 check_cycles_int(&context->options->gen, address);
673 7f1b5570b2a1 Fix 68K remove_breakpoint Michael Pavone <pavone@retrodev.com> parents: 654 diff changeset	1187 context->options->gen.code = tmp;
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1188 #endif
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1189 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1190
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1191 m68k_context * sync_components(m68k_context * context, uint32_t address);
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1192 void start_68k_context(m68k_context * context, uint32_t address)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1193 {
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1194 m68k_options * options = context->options;
1506 ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1195 #ifdef USE_NATIVE
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1196 code_ptr addr = get_native_address_trans(context, address);
883 9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	1197 options->start_context(addr, context);
1506 ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1198 #else
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1199 while (!context->should_return) {
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1200 if (context->current_cycle >= context->target_cycle) {
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1201 context->target_cycle += 4 * options->gen.clock_divider;
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1202 }
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1203 m68k_cpu_execute((m68000_base_device *)context);
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1204 if (!context->should_return) {
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1205 sync_components(context, 0);
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1206 }
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1207 }
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1208 #endif
883 9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	1209 }
9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	1210
9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	1211 void resume_68k(m68k_context *context)
9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	1212 {
1506 ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1213 #ifdef USE_NATIVE
883 9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	1214 code_ptr addr = context->resume_pc;
9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	1215 context->resume_pc = NULL;
9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	1216 m68k_options * options = context->options;
9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	1217 context->should_return = 0;
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1218 options->start_context(addr, context);
1506 ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1219 #else
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1220 start_68k_context(context, 0);
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1221 #endif
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1222 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1223
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1224 void m68k_reset(m68k_context * context)
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1225 {
1506 ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1226 #ifdef USE_NATIVE
653 a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores Michael Pavone <pavone@retrodev.com> parents: 614 diff changeset	1227 //TODO: Actually execute the M68K reset vector rather than simulating some of its behavior
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores Michael Pavone <pavone@retrodev.com> parents: 614 diff changeset	1228 uint16_t reset_vec = get_native_pointer(0, (void *)context->mem_pointers, &context->options->gen);
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores Michael Pavone <pavone@retrodev.com> parents: 614 diff changeset	1229 context->aregs[7] = reset_vec[0] << 16 \| reset_vec[1];
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores Michael Pavone <pavone@retrodev.com> parents: 614 diff changeset	1230 uint32_t address = reset_vec[2] << 16 \| reset_vec[3];
1506 ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1231 #else
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1232 m68k_reset_cpu((m68000_base_device *)context);
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1233 uint32_t address = 0;
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1234 #endif
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1235 start_68k_context(context, address);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1236 }
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: diff changeset	1237
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 883 diff changeset	1238 void m68k_options_free(m68k_options *opts)
252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 883 diff changeset	1239 {
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1240 #ifdef USE_NATIVE
1592 31effaadf877 Fix some memory errors (mostly leaks) identified by valgrind Michael Pavone <pavone@retrodev.com> parents: 1584 diff changeset	1241 for (uint32_t address = 0; address < opts->gen.address_mask; address += NATIVE_CHUNK_SIZE)
31effaadf877 Fix some memory errors (mostly leaks) identified by valgrind Michael Pavone <pavone@retrodev.com> parents: 1584 diff changeset	1242 {
31effaadf877 Fix some memory errors (mostly leaks) identified by valgrind Michael Pavone <pavone@retrodev.com> parents: 1584 diff changeset	1243 uint32_t chunk = address / NATIVE_CHUNK_SIZE;
31effaadf877 Fix some memory errors (mostly leaks) identified by valgrind Michael Pavone <pavone@retrodev.com> parents: 1584 diff changeset	1244 if (opts->gen.native_code_map[chunk].base) {
31effaadf877 Fix some memory errors (mostly leaks) identified by valgrind Michael Pavone <pavone@retrodev.com> parents: 1584 diff changeset	1245 free(opts->gen.native_code_map[chunk].offsets);
31effaadf877 Fix some memory errors (mostly leaks) identified by valgrind Michael Pavone <pavone@retrodev.com> parents: 1584 diff changeset	1246 }
31effaadf877 Fix some memory errors (mostly leaks) identified by valgrind Michael Pavone <pavone@retrodev.com> parents: 1584 diff changeset	1247 }
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 883 diff changeset	1248 free(opts->gen.native_code_map);
1592 31effaadf877 Fix some memory errors (mostly leaks) identified by valgrind Michael Pavone <pavone@retrodev.com> parents: 1584 diff changeset	1249 uint32_t ram_inst_slots = ram_size(&opts->gen) / 1024;
31effaadf877 Fix some memory errors (mostly leaks) identified by valgrind Michael Pavone <pavone@retrodev.com> parents: 1584 diff changeset	1250 for (uint32_t i = 0; i < ram_inst_slots; i++)
31effaadf877 Fix some memory errors (mostly leaks) identified by valgrind Michael Pavone <pavone@retrodev.com> parents: 1584 diff changeset	1251 {
31effaadf877 Fix some memory errors (mostly leaks) identified by valgrind Michael Pavone <pavone@retrodev.com> parents: 1584 diff changeset	1252 free(opts->gen.ram_inst_sizes[i]);
31effaadf877 Fix some memory errors (mostly leaks) identified by valgrind Michael Pavone <pavone@retrodev.com> parents: 1584 diff changeset	1253 }
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 883 diff changeset	1254 free(opts->gen.ram_inst_sizes);
1593 24508cb54f87 Fix a number of other memory errors (mostly leaks again) identified by valgrind Michael Pavone <pavone@retrodev.com> parents: 1592 diff changeset	1255 free(opts->big_movem);
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1256 #endif
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 883 diff changeset	1257 free(opts);
252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 883 diff changeset	1258 }
252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 883 diff changeset	1259
1507 2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1260 #ifndef USE_NATIVE
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1261 void init_m68k_opts(m68k_options * opts, memmap_chunk * memmap, uint32_t num_chunks, uint32_t clock_divider)
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1262 {
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1263 memset(opts, 0, sizeof(*opts));
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1264 opts->gen.memmap = memmap;
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1265 opts->gen.memmap_chunks = num_chunks;
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1266 opts->gen.address_mask = 0xFFFFFF;
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1267 opts->gen.byte_swap = 1;
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1268 opts->gen.max_address = 0x1000000;
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1269 opts->gen.bus_cycles = 4;
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1270 opts->gen.clock_divider = clock_divider;
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1271 }
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME Michael Pavone <pavone@retrodev.com> parents: 1506 diff changeset	1272 #endif
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	1273
1082 2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution. Michael Pavone <pavone@retrodev.com> parents: 1027 diff changeset	1274 m68k_context * init_68k_context(m68k_options * opts, m68k_reset_handler reset_handler)
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	1275 {
1506 ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1276 #ifdef USE_NATIVE
796 41f73c76b978 Fix some memory issues =?UTF-8?q?Higor=20Eur=C3=ADpedes?= <heuripedes@gmail.com> parents: 726 diff changeset	1277 size_t ctx_size = sizeof(m68k_context) + ram_size(&opts->gen) / (1 << opts->gen.ram_flags_shift) / 8;
41f73c76b978 Fix some memory issues =?UTF-8?q?Higor=20Eur=C3=ADpedes?= <heuripedes@gmail.com> parents: 726 diff changeset	1278 m68k_context * context = malloc(ctx_size);
41f73c76b978 Fix some memory issues =?UTF-8?q?Higor=20Eur=C3=ADpedes?= <heuripedes@gmail.com> parents: 726 diff changeset	1279 memset(context, 0, ctx_size);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	1280 context->options = opts;
1506 ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1281 #else
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1282 m68000_base_device *device = malloc(sizeof(m68000_base_device));;
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1283 memset(device, 0, sizeof(m68000_base_device));
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1284 m68k_context *context = &device->c;
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1285 context->options = opts;
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1286 m68k_init_cpu_m68000(device);
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1287
ded16f3d7eb4 Super hacky integration of the version of Musashi from MAME Michael Pavone <pavone@retrodev.com> parents: 1464 diff changeset	1288 #endif
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 688 diff changeset	1289 context->int_cycle = CYCLE_NEVER;
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	1290 context->status = 0x27;
1082 2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution. Michael Pavone <pavone@retrodev.com> parents: 1027 diff changeset	1291 context->reset_handler = (code_ptr)reset_handler;
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 688 diff changeset	1292 return context;
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	1293 }
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1294
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1295 void m68k_serialize(m68k_context context, uint32_t pc, serialize_buffer buf)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1296 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1297 for (int i = 0; i < 8; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1298 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1299 save_int32(buf, context->dregs[i]);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1300 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1301 for (int i = 0; i < 9; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1302 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1303 save_int32(buf, context->aregs[i]);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1304 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1305 save_int32(buf, pc);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1306 uint16_t sr = context->status << 3;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1307 for (int flag = 4; flag >= 0; flag--) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1308 sr <<= 1;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1309 sr \|= context->flags[flag] != 0;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1310 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1311 save_int16(buf, sr);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1312 save_int32(buf, context->current_cycle);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1313 save_int32(buf, context->int_cycle);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1314 save_int8(buf, context->int_num);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1315 save_int8(buf, context->int_pending);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1316 save_int8(buf, context->trace_pending);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1317 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1318
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1319 void m68k_deserialize(deserialize_buffer buf, void vcontext)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1320 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1321 m68k_context *context = vcontext;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1322 for (int i = 0; i < 8; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1323 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1324 context->dregs[i] = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1325 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1326 for (int i = 0; i < 9; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1327 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1328 context->aregs[i] = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1329 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1330 //hack until both PC and IR registers are represented properly
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1331 context->last_prefetch_address = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1332 uint16_t sr = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1333 context->status = sr >> 8;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1334 for (int flag = 0; flag < 5; flag++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1335 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1336 context->flags[flag] = sr & 1;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1337 sr >>= 1;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1338 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1339 context->current_cycle = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1340 context->int_cycle = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1341 context->int_num = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1342 context->int_pending = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1343 context->trace_pending = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1363 diff changeset	1344 }

Mercurial > repos > blastem

annotate m68k_core.c @ 1696:956c1cce05e2 mame_interp