Mercurial > repos > blastem

annotate blastem.c @ 284:ed7098f717d7

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Implement IN and OUT (untested)
author Mike Pavone <pavone@retrodev.com>
date Sat, 04 May 2013 15:58:15 -0700
parents 9ee64039ddeb
children a8ee7934a1f8
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1 #include "68kinst.h"
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2 #include "m68k_to_x86.h"
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3 #include "z80_to_x86.h"
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4 #include "mem.h"
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5 #include "vdp.h"
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6 #include "render.h"
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7 #include "blastem.h"
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8 #include <stdio.h>
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9 #include <stdlib.h>
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10 #include <string.h>
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11
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12 #define CARTRIDGE_WORDS 0x200000
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13 #define RAM_WORDS 32 * 1024
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14 #define Z80_RAM_BYTES 8 * 1024
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15 #define MCLKS_PER_68K 7
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16 #define MCLKS_PER_Z80 15
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17 //TODO: Figure out the exact value for this
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18 #define MCLKS_PER_FRAME (MCLKS_LINE*262)
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19 #define CYCLE_NEVER 0xFFFFFFFF
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20
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21 uint16_t cart[CARTRIDGE_WORDS];
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22 uint16_t ram[RAM_WORDS];
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23 uint8_t z80_ram[Z80_RAM_BYTES];
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25 io_port gamepad_1;
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26 io_port gamepad_2;
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27
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28 int headless = 0;
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29 int z80_enabled = 1;
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30
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31 #ifndef MIN
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32 #define MIN(a,b) ((a) < (b) ? (a) : (b))
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33 #endif
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34
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35 #define SMD_HEADER_SIZE 512
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36 #define SMD_MAGIC1 0x03
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37 #define SMD_MAGIC2 0xAA
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38 #define SMD_MAGIC3 0xBB
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39 #define SMD_BLOCK_SIZE 0x4000
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40
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41 int load_smd_rom(long filesize, FILE * f)
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42 {
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43 uint8_t block[SMD_BLOCK_SIZE];
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44 filesize -= SMD_HEADER_SIZE;
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45 fseek(f, SMD_HEADER_SIZE, SEEK_SET);
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46
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47 uint16_t * dst = cart;
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48 while (filesize > 0) {
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49 fread(block, 1, SMD_BLOCK_SIZE, f);
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50 for (uint8_t *low = block, *high = (block+SMD_BLOCK_SIZE/2), *end = block+SMD_BLOCK_SIZE; high < end; high++, low++) {
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51 *(dst++) = *high << 8 | *low;
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52 }
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53 filesize -= SMD_BLOCK_SIZE;
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54 }
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55 return 1;
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56 }
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57
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58 int load_rom(char * filename)
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59 {
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60 uint8_t header[10];
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61 FILE * f = fopen(filename, "rb");
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62 if (!f) {
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63 return 0;
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64 }
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65 fread(header, 1, sizeof(header), f);
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66 fseek(f, 0, SEEK_END);
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67 long filesize = ftell(f);
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68 if (filesize/2 > CARTRIDGE_WORDS) {
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69 //carts bigger than 4MB not currently supported
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70 filesize = CARTRIDGE_WORDS*2;
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71 }
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72 fseek(f, 0, SEEK_SET);
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73 if (header[1] == SMD_MAGIC1 && header[8] == SMD_MAGIC2 && header[9] == SMD_MAGIC3) {
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74 int i;
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75 for (i = 3; i < 8; i++) {
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76 if (header[i] != 0) {
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77 break;
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78 }
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79 }
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80 if (i == 8) {
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81 if (header[2]) {
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82 fprintf(stderr, "%s is a split SMD ROM which is not currently supported", filename);
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83 exit(1);
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84 }
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85 return load_smd_rom(filesize, f);
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86 }
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87 }
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88 fread(cart, 2, filesize/2, f);
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89 fclose(f);
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90 for(unsigned short * cur = cart; cur - cart < (filesize/2); ++cur)
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91 {
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92 *cur = (*cur >> 8) | (*cur << 8);
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93 }
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94 //TODO: Mirror ROM
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95 return 1;
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96 }
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98 uint16_t read_dma_value(uint32_t address)
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99 {
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100 //addresses here are word addresses (i.e. bit 0 corresponds to A1), so no need to do div by 2
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101 if (address < 0x200000) {
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102 return cart[address];
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103 } else if(address >= 0x700000) {
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104 return ram[address & 0x7FFF];
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105 }
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106 //TODO: Figure out what happens when you try to DMA from weird adresses like IO or banked Z80 area
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107 return 0;
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108 }
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110 #define VINT_CYCLE ((MCLKS_LINE * 226)/MCLKS_PER_68K)
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111 #define ZVINT_CYCLE ((MCLKS_LINE * 226)/MCLKS_PER_Z80)
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112
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113 void adjust_int_cycle(m68k_context * context, vdp_context * v_context)
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114 {
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115 if (!(v_context->regs[REG_MODE_2] & 0x20 && ((context->status & 0x7) < 6)) || context->current_cycle >= VINT_CYCLE) {
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116 context->int_cycle = CYCLE_NEVER;
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117 context->target_cycle = context->sync_cycle;
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118 } else if (context->int_cycle > VINT_CYCLE) {
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119 context->int_cycle = VINT_CYCLE;
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120 context->int_num = 6;
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121 if (context->int_cycle < context->sync_cycle) {
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122 context->target_cycle = context->int_cycle;
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123 }
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124 }
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125 }
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126
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127 int break_on_sync = 0;
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128 #define Z80_ACK_DELAY 3 //TODO: Calculate this on the fly based on how synced up the Z80 and 68K clocks are
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129
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130 uint8_t reset = 1;
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131 uint8_t need_reset = 0;
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132 uint8_t busreq = 0;
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133 uint8_t busack = 0;
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134 uint32_t busack_cycle = CYCLE_NEVER;
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135 uint8_t new_busack = 0;
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136 //#define DO_DEBUG_PRINT
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137 #ifdef DO_DEBUG_PRINT
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138 #define dprintf printf
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139 #define dputs puts
268
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
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diff changeset
140 #else
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
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parents: 266
diff changeset
141 #define dprintf
271
969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros
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parents: 268
diff changeset
142 #define dputs
268
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
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parents: 266
diff changeset
143 #endif
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
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parents: 266
diff changeset
144
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
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parents: 266
diff changeset
145 void sync_z80(z80_context * z_context, uint32_t mclks)
88
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parents:
diff changeset
146 {
265
c6d12878ea93 Add -n flag for disabling the Z80 core
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parents: 264
diff changeset
147 if (z80_enabled && !reset && !busreq) {
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
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parents: 215
diff changeset
148 if (need_reset) {
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parents: 215
diff changeset
149 z80_reset(z_context);
625f8e4d5fd2 Initial stab at integartiong Z80 core
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parents: 215
diff changeset
150 need_reset = 0;
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parents: 215
diff changeset
151 }
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diff changeset
152 z_context->sync_cycle = mclks / MCLKS_PER_Z80;
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parents: 215
diff changeset
153 while (z_context->current_cycle < z_context->sync_cycle) {
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parents: 215
diff changeset
154 if (z_context->iff1 && z_context->current_cycle < ZVINT_CYCLE) {
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parents: 215
diff changeset
155 z_context->int_cycle = ZVINT_CYCLE;
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parents: 215
diff changeset
156 }
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diff changeset
157 z_context->target_cycle = z_context->sync_cycle < z_context->int_cycle ? z_context->sync_cycle : z_context->int_cycle;
268
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parents: 266
diff changeset
158 dprintf("Running Z80 from cycle %d to cycle %d. Native PC: %p\n", z_context->current_cycle, z_context->sync_cycle, z_context->native_pc);
260
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parents: 215
diff changeset
159 z80_run(z_context);
268
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
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parents: 266
diff changeset
160 dprintf("Z80 ran to cycle %d\n", z_context->current_cycle);
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
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parents: 215
diff changeset
161 }
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parents: 215
diff changeset
162 }
268
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
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parents: 266
diff changeset
163 }
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
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parents: 266
diff changeset
164
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
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parents: 266
diff changeset
165 m68k_context * sync_components(m68k_context * context, uint32_t address)
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
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diff changeset
166 {
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diff changeset
167 //TODO: Handle sync targets smaller than a single frame
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parents: 266
diff changeset
168 vdp_context * v_context = context->video_context;
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diff changeset
169 z80_context * z_context = context->next_cpu;
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parents: 266
diff changeset
170 uint32_t mclks = context->current_cycle * MCLKS_PER_68K;
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parents: 266
diff changeset
171 sync_z80(z_context, mclks);
88
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diff changeset
172 if (mclks >= MCLKS_PER_FRAME) {
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parents:
diff changeset
173 //printf("reached frame end | 68K Cycles: %d, MCLK Cycles: %d\n", context->current_cycle, mclks);
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parents:
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174 vdp_run_context(v_context, MCLKS_PER_FRAME);
215
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
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parents: 211
diff changeset
175 if (!headless) {
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
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parents: 211
diff changeset
176 break_on_sync |= wait_render_frame(v_context);
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
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diff changeset
177 }
88
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178 mclks -= MCLKS_PER_FRAME;
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diff changeset
179 vdp_adjust_cycles(v_context, MCLKS_PER_FRAME);
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180 io_adjust_cycles(&gamepad_1, context->current_cycle, MCLKS_PER_FRAME/MCLKS_PER_68K);
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181 io_adjust_cycles(&gamepad_2, context->current_cycle, MCLKS_PER_FRAME/MCLKS_PER_68K);
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diff changeset
182 context->current_cycle -= MCLKS_PER_FRAME/MCLKS_PER_68K;
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
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parents: 215
diff changeset
183 if (z_context->current_cycle >= MCLKS_PER_FRAME/MCLKS_PER_Z80) {
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diff changeset
184 z_context->current_cycle -= MCLKS_PER_FRAME/MCLKS_PER_Z80;
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diff changeset
185 } else {
625f8e4d5fd2 Initial stab at integartiong Z80 core
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diff changeset
186 z_context->current_cycle = 0;
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diff changeset
187 }
88
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parents:
diff changeset
188 if (mclks) {
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parents:
diff changeset
189 vdp_run_context(v_context, mclks);
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parents:
diff changeset
190 }
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parents:
diff changeset
191 } else {
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parents:
diff changeset
192 //printf("running VDP for %d cycles\n", mclks - v_context->cycles);
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parents:
diff changeset
193 vdp_run_context(v_context, mclks);
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parents:
diff changeset
194 }
186
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
195 adjust_int_cycle(context, v_context);
198
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parents: 197
diff changeset
196 if (break_on_sync && address) {
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parents: 197
diff changeset
197 break_on_sync = 0;
209a37eed3e7 Add support for breaking into the debugger while game is running
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parents: 197
diff changeset
198 debugger(context, address);
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parents: 197
diff changeset
199 }
88
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diff changeset
200 return context;
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parents:
diff changeset
201 }
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parents:
diff changeset
202
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parents:
diff changeset
203 m68k_context * vdp_port_write(uint32_t vdp_port, m68k_context * context, uint16_t value)
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parents:
diff changeset
204 {
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diff changeset
205 //printf("vdp_port write: %X, value: %X, cycle: %d\n", vdp_port, value, context->current_cycle);
198
209a37eed3e7 Add support for breaking into the debugger while game is running
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parents: 197
diff changeset
206 sync_components(context, 0);
263
2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K.
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parents: 260
diff changeset
207 vdp_context * v_context = context->video_context;
88
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parents:
diff changeset
208 if (vdp_port < 0x10) {
149
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
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parents: 144
diff changeset
209 int blocked;
88
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parents:
diff changeset
210 if (vdp_port < 4) {
149
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
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parents: 144
diff changeset
211 while (vdp_data_port_write(v_context, value) < 0) {
88
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parents:
diff changeset
212 while(v_context->flags & FLAG_DMA_RUN) {
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parents:
diff changeset
213 vdp_run_dma_done(v_context, MCLKS_PER_FRAME);
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
214 if (v_context->cycles >= MCLKS_PER_FRAME) {
215
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
215 if (!headless) {
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
216 wait_render_frame(v_context);
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
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parents: 211
diff changeset
217 }
88
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parents:
diff changeset
218 vdp_adjust_cycles(v_context, MCLKS_PER_FRAME);
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parents:
diff changeset
219 io_adjust_cycles(&gamepad_1, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K);
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
220 io_adjust_cycles(&gamepad_2, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K);
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parents:
diff changeset
221 }
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parents:
diff changeset
222 }
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parents:
diff changeset
223 context->current_cycle = v_context->cycles / MCLKS_PER_68K;
149
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
224 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
225 } else if(vdp_port < 8) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
226 blocked = vdp_control_port_write(v_context, value);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
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parents: 144
diff changeset
227 if (blocked) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
228 while (blocked) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
229 while(v_context->flags & FLAG_DMA_RUN) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
230 vdp_run_dma_done(v_context, MCLKS_PER_FRAME);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
231 if (v_context->cycles >= MCLKS_PER_FRAME) {
215
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
232 if (!headless) {
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
233 wait_render_frame(v_context);
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
234 }
149
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
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parents: 144
diff changeset
235 vdp_adjust_cycles(v_context, MCLKS_PER_FRAME);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
236 io_adjust_cycles(&gamepad_1, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
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parents: 144
diff changeset
237 io_adjust_cycles(&gamepad_2, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
238 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
239 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
240 if (blocked < 0) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
241 blocked = vdp_control_port_write(v_context, value);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
242 } else {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
243 blocked = 0;
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
244 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
245 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 144
diff changeset
246 context->current_cycle = v_context->cycles / MCLKS_PER_68K;
88
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
247 } else {
186
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
248 adjust_int_cycle(context, v_context);
88
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
249 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
250 } else {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
251 printf("Illegal write to HV Counter port %X\n", vdp_port);
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parents:
diff changeset
252 exit(1);
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
253 }
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
254 context->current_cycle = v_context->cycles/MCLKS_PER_68K;
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
255 } else if (vdp_port < 0x18) {
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parents:
diff changeset
256 //TODO: Implement PSG
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parents:
diff changeset
257 } else {
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
258 //TODO: Implement undocumented test register(s)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
259 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
260 return context;
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
261 }
c339559f1d4f Forgot to add blastem main file earlier
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parents:
diff changeset
262
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parents:
diff changeset
263 m68k_context * vdp_port_read(uint32_t vdp_port, m68k_context * context)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
264 {
198
209a37eed3e7 Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents: 197
diff changeset
265 sync_components(context, 0);
263
2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K.
Mike Pavone <pavone@retrodev.com>
parents: 260
diff changeset
266 vdp_context * v_context = context->video_context;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
267 if (vdp_port < 0x10) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
268 if (vdp_port < 4) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
269 context->value = vdp_data_port_read(v_context);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
270 } else if(vdp_port < 8) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
271 context->value = vdp_control_port_read(v_context);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
272 } else {
137
0e7e1ccc0a81 Implemented HV counter
Mike Pavone <pavone@retrodev.com>
parents: 130
diff changeset
273 context->value = vdp_hv_counter_read(v_context);
0e7e1ccc0a81 Implemented HV counter
Mike Pavone <pavone@retrodev.com>
parents: 130
diff changeset
274 //printf("HV Counter: %X at cycle %d\n", context->value, v_context->cycles);
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
275 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
276 context->current_cycle = v_context->cycles/MCLKS_PER_68K;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
277 } else {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
278 printf("Illegal read from PSG or test register port %X\n", vdp_port);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
279 exit(1);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
280 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
281 return context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
282 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
283
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
284 #define TH 0x40
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
285 #define TH_TIMEOUT 8000
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
286
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
287 void io_adjust_cycles(io_port * pad, uint32_t current_cycle, uint32_t deduction)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
288 {
89
9757b4c6c33f Minor joypad fix and commeount out some debug printfs
Mike Pavone <pavone@retrodev.com>
parents: 88
diff changeset
289 /*uint8_t control = pad->control | 0x80;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
290 uint8_t th = control & pad->output;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
291 if (pad->input[GAMEPAD_TH0] || pad->input[GAMEPAD_TH1]) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
292 printf("adjust_cycles | control: %X, TH: %X, GAMEPAD_TH0: %X, GAMEPAD_TH1: %X, TH Counter: %d, Timeout: %d, Cycle: %d\n", control, th, pad->input[GAMEPAD_TH0], pad->input[GAMEPAD_TH1], pad->th_counter,pad->timeout_cycle, current_cycle);
89
9757b4c6c33f Minor joypad fix and commeount out some debug printfs
Mike Pavone <pavone@retrodev.com>
parents: 88
diff changeset
293 }*/
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
294 if (current_cycle >= pad->timeout_cycle) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
295 pad->th_counter = 0;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
296 } else {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
297 pad->timeout_cycle -= deduction;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
298 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
299 if (busack_cycle < CYCLE_NEVER && current_cycle < busack_cycle) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
300 busack_cycle -= deduction;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
301 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
302 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
303
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
304 void io_data_write(io_port * pad, m68k_context * context, uint8_t value)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
305 {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
306 if (pad->control & TH) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
307 //check if TH has changed
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
308 if ((pad->output & TH) ^ (value & TH)) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
309 if (context->current_cycle >= pad->timeout_cycle) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
310 pad->th_counter = 0;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
311 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
312 if (!(value & TH)) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
313 pad->th_counter++;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
314 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
315 pad->timeout_cycle = context->current_cycle + TH_TIMEOUT;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
316 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
317 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
318 pad->output = value;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
319 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
320
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
321 void io_data_read(io_port * pad, m68k_context * context)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
322 {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
323 uint8_t control = pad->control | 0x80;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
324 uint8_t th = control & pad->output;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
325 uint8_t input;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
326 if (context->current_cycle >= pad->timeout_cycle) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
327 pad->th_counter = 0;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
328 }
89
9757b4c6c33f Minor joypad fix and commeount out some debug printfs
Mike Pavone <pavone@retrodev.com>
parents: 88
diff changeset
329 /*if (pad->input[GAMEPAD_TH0] || pad->input[GAMEPAD_TH1]) {
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
330 printf("io_data_read | control: %X, TH: %X, GAMEPAD_TH0: %X, GAMEPAD_TH1: %X, TH Counter: %d, Timeout: %d, Cycle: %d\n", control, th, pad->input[GAMEPAD_TH0], pad->input[GAMEPAD_TH1], pad->th_counter,pad->timeout_cycle, context->current_cycle);
89
9757b4c6c33f Minor joypad fix and commeount out some debug printfs
Mike Pavone <pavone@retrodev.com>
parents: 88
diff changeset
331 }*/
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
332 if (th) {
195
c615061f7914 Fix 6-button controller emulation
Mike Pavone <pavone@retrodev.com>
parents: 186
diff changeset
333 if (pad->th_counter == 3) {
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
334 input = pad->input[GAMEPAD_EXTRA];
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
335 } else {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
336 input = pad->input[GAMEPAD_TH1];
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
337 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
338 } else {
195
c615061f7914 Fix 6-button controller emulation
Mike Pavone <pavone@retrodev.com>
parents: 186
diff changeset
339 if (pad->th_counter == 3) {
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
340 input = pad->input[GAMEPAD_TH0] | 0xF;
195
c615061f7914 Fix 6-button controller emulation
Mike Pavone <pavone@retrodev.com>
parents: 186
diff changeset
341 } else if(pad->th_counter == 4) {
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
342 input = pad->input[GAMEPAD_TH0] & 0x30;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
343 } else {
89
9757b4c6c33f Minor joypad fix and commeount out some debug printfs
Mike Pavone <pavone@retrodev.com>
parents: 88
diff changeset
344 input = pad->input[GAMEPAD_TH0] | 0xC;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
345 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
346 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
347 context->value = ((~input) & (~control)) | (pad->output & control);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
348 /*if (pad->input[GAMEPAD_TH0] || pad->input[GAMEPAD_TH1]) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
349 printf ("value: %X\n", context->value);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
350 }*/
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
351 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
352
279
6be6056735a9 Fix native address lookup in bannked memory area
Mike Pavone <pavone@retrodev.com>
parents: 276
diff changeset
353 uint32_t zram_counter = 0;
6be6056735a9 Fix native address lookup in bannked memory area
Mike Pavone <pavone@retrodev.com>
parents: 276
diff changeset
354
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
355 m68k_context * io_write(uint32_t location, m68k_context * context, uint8_t value)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
356 {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
357 if (location < 0x10000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
358 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
359 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
360 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
361 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
362 if (!(busack || reset)) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
363 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
364 if (location < 0x4000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
365 z80_ram[location & 0x1FFF] = value;
263
2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K.
Mike Pavone <pavone@retrodev.com>
parents: 260
diff changeset
366 z80_handle_code_write(location & 0x1FFF, context->next_cpu);
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
367 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
368 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
369 } else {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
370 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
371 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
372 switch(location/2)
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
373 {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
374 case 0x1:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
375 io_data_write(&gamepad_1, context, value);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
376 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
377 case 0x2:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
378 io_data_write(&gamepad_2, context, value);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
379 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
380 case 0x3://PORT C Data
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
381 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
382 case 0x4:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
383 gamepad_1.control = value;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
384 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
385 case 0x5:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
386 gamepad_2.control = value;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
387 break;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
388 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
389 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
390 if (location == 0x1100) {
268
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents: 266
diff changeset
391 sync_z80(context->next_cpu, context->current_cycle * MCLKS_PER_68K);
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
392 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
393 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
394 busack_cycle = CYCLE_NEVER;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
395 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
396 if (value & 1) {
271
969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros
Mike Pavone <pavone@retrodev.com>
parents: 268
diff changeset
397 dputs("bus requesting Z80");
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
398 busreq = 1;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
399 if(!reset) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
400 busack_cycle = context->current_cycle + Z80_ACK_DELAY;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
401 new_busack = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
402 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
403 } else {
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
404 if (busreq) {
271
969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros
Mike Pavone <pavone@retrodev.com>
parents: 268
diff changeset
405 dputs("releasing z80 bus");
280
9ee64039ddeb Fix bank register update
Mike Pavone <pavone@retrodev.com>
parents: 279
diff changeset
406 #ifdef DO_DEBUG_PRINT
279
6be6056735a9 Fix native address lookup in bannked memory area
Mike Pavone <pavone@retrodev.com>
parents: 276
diff changeset
407 char fname[20];
6be6056735a9 Fix native address lookup in bannked memory area
Mike Pavone <pavone@retrodev.com>
parents: 276
diff changeset
408 sprintf(fname, "zram-%d", zram_counter++);
6be6056735a9 Fix native address lookup in bannked memory area
Mike Pavone <pavone@retrodev.com>
parents: 276
diff changeset
409 FILE * f = fopen(fname, "wb");
6be6056735a9 Fix native address lookup in bannked memory area
Mike Pavone <pavone@retrodev.com>
parents: 276
diff changeset
410 fwrite(z80_ram, 1, sizeof(z80_ram), f);
6be6056735a9 Fix native address lookup in bannked memory area
Mike Pavone <pavone@retrodev.com>
parents: 276
diff changeset
411 fclose(f);
280
9ee64039ddeb Fix bank register update
Mike Pavone <pavone@retrodev.com>
parents: 279
diff changeset
412 #endif
263
2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K.
Mike Pavone <pavone@retrodev.com>
parents: 260
diff changeset
413 z80_context * z_context = context->next_cpu;
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
414 //TODO: Add necessary delay between release of busreq and resumption of execution
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
415 z_context->current_cycle = (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
416 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
417 busreq = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
418 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
419 busack = 1;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
420 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
421 } else if (location == 0x1200) {
268
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents: 266
diff changeset
422 sync_z80(context->next_cpu, context->current_cycle * MCLKS_PER_68K);
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
423 if (value & 1) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
424 if (reset && busreq) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
425 new_busack = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
426 busack_cycle = context->current_cycle + Z80_ACK_DELAY;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
427 }
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
428 //TODO: Deal with the scenario in which reset is not asserted long enough
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
429 if (reset) {
263
2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K.
Mike Pavone <pavone@retrodev.com>
parents: 260
diff changeset
430 z80_context * z_context = context->next_cpu;
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
431 need_reset = 1;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
432 //TODO: Add necessary delay between release of reset and start of execution
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
433 z_context->current_cycle = (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
434 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
435 reset = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
436 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
437 reset = 1;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
438 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
439 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
440 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
441 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
442 return context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
443 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
444
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
445 m68k_context * io_write_w(uint32_t location, m68k_context * context, uint16_t value)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
446 {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
447 if (location < 0x10000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
448 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
449 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
450 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
451 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
452 if (!(busack || reset)) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
453 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
454 if (location < 0x4000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
455 z80_ram[location & 0x1FFE] = value >> 8;
263
2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K.
Mike Pavone <pavone@retrodev.com>
parents: 260
diff changeset
456 z80_handle_code_write(location & 0x1FFE, context->next_cpu);
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
457 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
458 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
459 } else {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
460 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
461 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
462 switch(location/2)
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
463 {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
464 case 0x1:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
465 io_data_write(&gamepad_1, context, value);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
466 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
467 case 0x2:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
468 io_data_write(&gamepad_2, context, value);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
469 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
470 case 0x3://PORT C Data
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
471 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
472 case 0x4:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
473 gamepad_1.control = value;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
474 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
475 case 0x5:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
476 gamepad_2.control = value;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
477 break;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
478 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
479 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
480 //printf("IO Write of %X to %X @ %d\n", value, location, context->current_cycle);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
481 if (location == 0x1100) {
268
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents: 266
diff changeset
482 sync_z80(context->next_cpu, context->current_cycle * MCLKS_PER_68K);
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
483 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
484 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
485 busack_cycle = CYCLE_NEVER;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
486 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
487 if (value & 0x100) {
271
969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros
Mike Pavone <pavone@retrodev.com>
parents: 268
diff changeset
488 dprintf("bus requesting Z80 @ %d\n", (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80);
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
489 busreq = 1;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
490 if(!reset) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
491 busack_cycle = context->current_cycle + Z80_ACK_DELAY;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
492 new_busack = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
493 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
494 } else {
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
495 if (busreq) {
271
969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros
Mike Pavone <pavone@retrodev.com>
parents: 268
diff changeset
496 dprintf("releasing Z80 bus @ %d\n", (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80);
280
9ee64039ddeb Fix bank register update
Mike Pavone <pavone@retrodev.com>
parents: 279
diff changeset
497 #ifdef DO_DEBUG_PRINT
279
6be6056735a9 Fix native address lookup in bannked memory area
Mike Pavone <pavone@retrodev.com>
parents: 276
diff changeset
498 char fname[20];
6be6056735a9 Fix native address lookup in bannked memory area
Mike Pavone <pavone@retrodev.com>
parents: 276
diff changeset
499 sprintf(fname, "zram-%d", zram_counter++);
6be6056735a9 Fix native address lookup in bannked memory area
Mike Pavone <pavone@retrodev.com>
parents: 276
diff changeset
500 FILE * f = fopen(fname, "wb");
6be6056735a9 Fix native address lookup in bannked memory area
Mike Pavone <pavone@retrodev.com>
parents: 276
diff changeset
501 fwrite(z80_ram, 1, sizeof(z80_ram), f);
6be6056735a9 Fix native address lookup in bannked memory area
Mike Pavone <pavone@retrodev.com>
parents: 276
diff changeset
502 fclose(f);
280
9ee64039ddeb Fix bank register update
Mike Pavone <pavone@retrodev.com>
parents: 279
diff changeset
503 #endif
263
2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K.
Mike Pavone <pavone@retrodev.com>
parents: 260
diff changeset
504 z80_context * z_context = context->next_cpu;
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
505 //TODO: Add necessary delay between release of busreq and resumption of execution
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
506 z_context->current_cycle = (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
507 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
508 busreq = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
509 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
510 busack = 1;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
511 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
512 } else if (location == 0x1200) {
268
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents: 266
diff changeset
513 sync_z80(context->next_cpu, context->current_cycle * MCLKS_PER_68K);
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
514 if (value & 0x100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
515 if (reset && busreq) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
516 new_busack = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
517 busack_cycle = context->current_cycle + Z80_ACK_DELAY;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
518 }
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
519 //TODO: Deal with the scenario in which reset is not asserted long enough
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
520 if (reset) {
263
2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K.
Mike Pavone <pavone@retrodev.com>
parents: 260
diff changeset
521 z80_context * z_context = context->next_cpu;
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
522 need_reset = 1;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
523 //TODO: Add necessary delay between release of reset and start of execution
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
524 z_context->current_cycle = (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
525 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
526 reset = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
527 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
528 reset = 1;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
529 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
530 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
531 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
532 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
533 return context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
534 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
535
130
0bdbffa9fe90 Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents: 115
diff changeset
536 #define USA 0x80
0bdbffa9fe90 Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents: 115
diff changeset
537 #define JAP 0x00
0bdbffa9fe90 Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents: 115
diff changeset
538 #define EUR 0xC0
0bdbffa9fe90 Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents: 115
diff changeset
539 #define NO_DISK 0x20
0bdbffa9fe90 Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents: 115
diff changeset
540 uint8_t version_reg = NO_DISK | USA;
0bdbffa9fe90 Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents: 115
diff changeset
541
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
542 m68k_context * io_read(uint32_t location, m68k_context * context)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
543 {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
544 if (location < 0x10000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
545 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
546 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
547 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
548 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
549 if (!(busack || reset)) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
550 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
551 if (location < 0x4000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
552 context->value = z80_ram[location & 0x1FFF];
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
553 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
554 context->value = 0xFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
555 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
556 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
557 context->value = 0xFF;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
558 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
559 } else {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
560 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
561 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
562 switch(location/2)
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
563 {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
564 case 0x0:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
565 //version bits should be 0 for now since we're not emulating TMSS
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
566 //Not sure about the other bits
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
567 context->value = version_reg;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
568 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
569 case 0x1:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
570 io_data_read(&gamepad_1, context);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
571 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
572 case 0x2:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
573 io_data_read(&gamepad_2, context);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
574 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
575 case 0x3://PORT C Data
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
576 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
577 case 0x4:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
578 context->value = gamepad_1.control;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
579 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
580 case 0x5:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
581 context->value = gamepad_2.control;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
582 break;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
583 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
584 } else {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
585 if (location == 0x1100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
586 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
587 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
588 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
589 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
590 context->value = reset || busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
591 //printf("Byte read of BUSREQ returned %d @ %d (reset: %d, busack: %d)\n", context->value, context->current_cycle, reset, busack);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
592 } else if (location == 0x1200) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
593 context->value = !reset;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
594 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
595 printf("Byte read of unknown IO location: %X\n", location);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
596 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
597 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
598 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
599 return context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
600 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
601
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
602 m68k_context * io_read_w(uint32_t location, m68k_context * context)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
603 {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
604 if (location < 0x10000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
605 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
606 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
607 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
608 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
609 if (!(busack || reset)) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
610 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
611 if (location < 0x4000) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
612 context->value = z80_ram[location & 0x1FFE];
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
613 context->value |= context->value << 8;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
614 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
615 context->value = 0xFFFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
616 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
617 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
618 context->value = 0xFFFF;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
619 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
620 } else {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
621 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
622 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
623 switch(location/2)
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
624 {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
625 case 0x0:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
626 //version bits should be 0 for now since we're not emulating TMSS
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
627 //Not sure about the other bits
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
628 context->value = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
629 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
630 case 0x1:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
631 io_data_read(&gamepad_1, context);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
632 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
633 case 0x2:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
634 io_data_read(&gamepad_2, context);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
635 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
636 case 0x3://PORT C Data
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
637 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
638 case 0x4:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
639 context->value = gamepad_1.control;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
640 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
641 case 0x5:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
642 context->value = gamepad_2.control;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
643 break;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
644 case 0x6:
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
645 //PORT C Control
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
646 context->value = 0;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
647 break;
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
648 }
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
649 context->value = context->value | (context->value << 8);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
650 //printf("Word read to %X returned %d\n", location, context->value);
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
651 } else {
153
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
652 if (location == 0x1100) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
653 if (busack_cycle > context->current_cycle) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
654 busack = new_busack;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
655 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
656 }
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
657 context->value = (reset || busack) << 8;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
658 //printf("Word read of BUSREQ returned %d\n", context->value);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
659 } else if (location == 0x1200) {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
660 context->value = (!reset) << 8;
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
661 } else {
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
662 printf("Word read of unknown IO location: %X\n", location);
42c031184e8a Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
663 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
664 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
665 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
666 return context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
667 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
668
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
669 typedef struct bp_def {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
670 struct bp_def * next;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
671 uint32_t address;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
672 uint32_t index;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
673 } bp_def;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
674
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
675 bp_def * breakpoints = NULL;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
676 uint32_t bp_index = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
677
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
678 bp_def ** find_breakpoint(bp_def ** cur, uint32_t address)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
679 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
680 while (*cur) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
681 if ((*cur)->address == address) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
682 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
683 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
684 cur = &((*cur)->next);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
685 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
686 return cur;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
687 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
688
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
689 bp_def ** find_breakpoint_idx(bp_def ** cur, uint32_t index)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
690 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
691 while (*cur) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
692 if ((*cur)->index == index) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
693 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
694 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
695 cur = &((*cur)->next);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
696 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
697 return cur;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
698 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
699
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
700 char * find_param(char * buf)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
701 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
702 for (; *buf; buf++) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
703 if (*buf == ' ') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
704 if (*(buf+1)) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
705 return buf+1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
706 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
707 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
708 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
709 return NULL;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
710 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
711
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
712 void strip_nl(char * buf)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
713 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
714 for(; *buf; buf++) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
715 if (*buf == '\n') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
716 *buf = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
717 return;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
718 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
719 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
720 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
721
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
722 m68k_context * debugger(m68k_context * context, uint32_t address)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
723 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
724 static char last_cmd[1024];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
725 char input_buf[1024];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
726 static uint32_t branch_t;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
727 static uint32_t branch_f;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
728 m68kinst inst;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
729 //probably not necessary, but let's play it safe
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
730 address &= 0xFFFFFF;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
731 if (address == branch_t) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
732 bp_def ** f_bp = find_breakpoint(&breakpoints, branch_f);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
733 if (!*f_bp) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
734 remove_breakpoint(context, branch_f);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
735 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
736 branch_t = branch_f = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
737 } else if(address == branch_f) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
738 bp_def ** t_bp = find_breakpoint(&breakpoints, branch_t);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
739 if (!*t_bp) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
740 remove_breakpoint(context, branch_t);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
741 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
742 branch_t = branch_f = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
743 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
744 //Check if this is a user set breakpoint, or just a temporary one
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
745 bp_def ** this_bp = find_breakpoint(&breakpoints, address);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
746 if (*this_bp) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
747 printf("Breakpoint %d hit\n", (*this_bp)->index);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
748 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
749 remove_breakpoint(context, address);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
750 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
751 uint16_t * pc;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
752 if (address < 0x400000) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
753 pc = cart + address/2;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
754 } else if(address > 0xE00000) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
755 pc = ram + (address & 0xFFFF)/2;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
756 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
757 fprintf(stderr, "Entered debugger at address %X\n", address);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
758 exit(1);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
759 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
760 uint16_t * after_pc = m68k_decode(pc, &inst, address);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
761 m68k_disasm(&inst, input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
762 printf("%X: %s\n", address, input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
763 uint32_t after = address + (after_pc-pc)*2;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
764 int debugging = 1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
765 while (debugging) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
766 fputs(">", stdout);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
767 if (!fgets(input_buf, sizeof(input_buf), stdin)) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
768 fputs("fgets failed", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
769 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
770 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
771 strip_nl(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
772 //hitting enter repeats last command
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
773 if (input_buf[0]) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
774 strcpy(last_cmd, input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
775 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
776 strcpy(input_buf, last_cmd);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
777 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
778 char * param;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
779 char format[8];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
780 uint32_t value;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
781 bp_def * new_bp;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
782 switch(input_buf[0])
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
783 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
784 case 'c':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
785 puts("Continuing");
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
786 debugging = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
787 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
788 case 'b':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
789 param = find_param(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
790 if (!param) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
791 fputs("b command requires a parameter\n", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
792 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
793 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
794 value = strtol(param, NULL, 16);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
795 insert_breakpoint(context, value, (uint8_t *)debugger);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
796 new_bp = malloc(sizeof(bp_def));
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
797 new_bp->next = breakpoints;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
798 new_bp->address = value;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
799 new_bp->index = bp_index++;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
800 breakpoints = new_bp;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
801 printf("Breakpoint %d set at %X\n", new_bp->index, value);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
802 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
803 case 'a':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
804 param = find_param(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
805 if (!param) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
806 fputs("a command requires a parameter\n", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
807 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
808 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
809 value = strtol(param, NULL, 16);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
810 insert_breakpoint(context, value, (uint8_t *)debugger);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
811 debugging = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
812 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
813 case 'd':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
814 param = find_param(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
815 if (!param) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
816 fputs("b command requires a parameter\n", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
817 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
818 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
819 value = atoi(param);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
820 this_bp = find_breakpoint_idx(&breakpoints, value);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
821 if (!*this_bp) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
822 fprintf(stderr, "Breakpoint %d does not exist\n", value);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
823 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
824 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
825 new_bp = *this_bp;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
826 *this_bp = (*this_bp)->next;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
827 free(new_bp);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
828 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
829 case 'p':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
830 strcpy(format, "%s: %d\n");
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
831 if (input_buf[1] == '/') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
832 switch (input_buf[2])
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
833 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
834 case 'x':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
835 case 'X':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
836 case 'd':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
837 case 'c':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
838 format[5] = input_buf[2];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
839 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
840 default:
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
841 fprintf(stderr, "Unrecognized format character: %c\n", input_buf[2]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
842 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
843 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
844 param = find_param(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
845 if (!param) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
846 fputs("p command requires a parameter\n", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
847 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
848 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
849 if (param[0] == 'd' && param[1] >= '0' && param[1] <= '7') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
850 value = context->dregs[param[1]-'0'];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
851 } else if (param[0] == 'a' && param[1] >= '0' && param[1] <= '7') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
852 value = context->aregs[param[1]-'0'];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
853 } else if (param[0] == 'S' && param[1] == 'R') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
854 value = (context->status << 8);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
855 for (int flag = 0; flag < 5; flag++) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
856 value |= context->flags[flag] << (4-flag);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
857 }
185
b204fbed4efe Add ability to print out current 68K cycle in debugger
Mike Pavone <pavone@retrodev.com>
parents: 184
diff changeset
858 } else if(param[0] == 'c') {
b204fbed4efe Add ability to print out current 68K cycle in debugger
Mike Pavone <pavone@retrodev.com>
parents: 184
diff changeset
859 value = context->current_cycle;
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
860 } else if (param[0] == '0' && param[1] == 'x') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
861 uint32_t p_addr = strtol(param+2, NULL, 16);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
862 value = read_dma_value(p_addr/2);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
863 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
864 fprintf(stderr, "Unrecognized parameter to p: %s\n", param);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
865 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
866 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
867 printf(format, param, value);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
868 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
869 case 'n':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
870 //TODO: Deal with jmp, dbcc, rtr and rte
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
871 if (inst.op == M68K_RTS) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
872 after = (read_dma_value(context->aregs[7]/2) << 16) | read_dma_value(context->aregs[7]/2 + 1);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
873 } else if(inst.op == M68K_BCC && inst.extra.cond != COND_FALSE) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
874 if (inst.extra.cond = COND_TRUE) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
875 after = inst.address + 2 + inst.src.params.immed;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
876 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
877 branch_f = after;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
878 branch_t = inst.address + 2 + inst.src.params.immed;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
879 insert_breakpoint(context, branch_t, (uint8_t *)debugger);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
880 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
881 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
882 insert_breakpoint(context, after, (uint8_t *)debugger);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
883 debugging = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
884 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
885 case 'q':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
886 puts("Quitting");
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
887 exit(0);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
888 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
889 default:
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
890 fprintf(stderr, "Unrecognized debugger command %s\n", input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
891 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
892 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
893 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
894 return context;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
895 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
896
263
2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K.
Mike Pavone <pavone@retrodev.com>
parents: 260
diff changeset
897 void init_run_cpu(vdp_context * vcontext, z80_context * zcontext, int debug, FILE * address_log)
211
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
898 {
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
899 m68k_context context;
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
900 x86_68k_options opts;
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
901 init_x86_68k_opts(&opts);
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
902 opts.address_log = address_log;
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
903 init_68k_context(&context, opts.native_code_map, &opts);
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
904
263
2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K.
Mike Pavone <pavone@retrodev.com>
parents: 260
diff changeset
905 context.video_context = vcontext;
2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K.
Mike Pavone <pavone@retrodev.com>
parents: 260
diff changeset
906 context.next_cpu = zcontext;
211
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
907 //cartridge ROM
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
908 context.mem_pointers[0] = cart;
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
909 context.target_cycle = context.sync_cycle = MCLKS_PER_FRAME/MCLKS_PER_68K;
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
910 //work RAM
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
911 context.mem_pointers[1] = ram;
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
912 uint32_t address;
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
913 /*address = cart[0x68/2] << 16 | cart[0x6A/2];
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
914 translate_m68k_stream(address, &context);
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
915 address = cart[0x70/2] << 16 | cart[0x72/2];
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
916 translate_m68k_stream(address, &context);
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
917 address = cart[0x78/2] << 16 | cart[0x7A/2];
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
918 translate_m68k_stream(address, &context);*/
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
919 address = cart[2] << 16 | cart[3];
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
920 translate_m68k_stream(address, &context);
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
921 if (debug) {
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
922 insert_breakpoint(&context, address, (uint8_t *)debugger);
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
923 }
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
924 m68k_reset(&context);
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
925 }
464513050c85 Small bit of cleanup
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
926
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
927 int main(int argc, char ** argv)
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
928 {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
929 if (argc < 2) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
930 fputs("Usage: blastem FILENAME\n", stderr);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
931 return 1;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
932 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
933 if(!load_rom(argv[1])) {
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
934 fprintf(stderr, "Failed to open %s for reading\n", argv[1]);
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
935 return 1;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
936 }
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
937 int width = -1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
938 int height = -1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
939 int debug = 0;
197
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents: 195
diff changeset
940 FILE *address_log = NULL;
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
941 for (int i = 2; i < argc; i++) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
942 if (argv[i][0] == '-') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
943 switch(argv[i][1]) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
944 case 'd':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
945 debug = 1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
946 break;
197
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents: 195
diff changeset
947 case 'l':
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents: 195
diff changeset
948 address_log = fopen("address.log", "w");
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents: 195
diff changeset
949 break;
215
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
950 case 'v':
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
951 headless = 1;
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
952 break;
265
c6d12878ea93 Add -n flag for disabling the Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 264
diff changeset
953 case 'n':
c6d12878ea93 Add -n flag for disabling the Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 264
diff changeset
954 z80_enabled = 0;
c6d12878ea93 Add -n flag for disabling the Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 264
diff changeset
955 break;
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
956 default:
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
957 fprintf(stderr, "Unrecognized switch %s\n", argv[i]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
958 return 1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
959 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
960 } else if (width < 0) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
961 width = atoi(argv[i]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
962 } else if (height < 0) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
963 height = atoi(argv[i]);
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
964 }
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
965 }
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
966 width = width < 320 ? 320 : width;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 166
diff changeset
967 height = height < 240 ? (width/320) * 240 : height;
215
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
968 if (!headless) {
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
969 render_init(width, height);
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests.
Mike Pavone <pavone@retrodev.com>
parents: 211
diff changeset
970 }
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
971 vdp_context v_context;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
972
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
973 init_vdp_context(&v_context);
260
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
974
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
975 z80_context z_context;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
976 x86_z80_options z_opts;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
977 init_x86_z80_opts(&z_opts);
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
978 init_z80_context(&z_context, &z_opts);
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
979 z_context.next_context = &v_context;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
980 z_context.mem_pointers[0] = z80_ram;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
981 z_context.sync_cycle = z_context.target_cycle = MCLKS_PER_FRAME/MCLKS_PER_Z80;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
982 z_context.int_cycle = CYCLE_NEVER;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
983 z_context.mem_pointers[1] = z_context.mem_pointers[2] = (uint8_t *)cart;
625f8e4d5fd2 Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents: 215
diff changeset
984
263
2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K.
Mike Pavone <pavone@retrodev.com>
parents: 260
diff changeset
985 init_run_cpu(&v_context, &z_context, debug, address_log);
88
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
986 return 0;
c339559f1d4f Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
987 }