Mercurial > repos > blastem
annotate ym2612.c @ 376:f6def5cdf1b4
Fix key scaling
| author | Mike Pavone <pavone@retrodev.com> |
|---|---|
| date | Sun, 02 Jun 2013 21:52:42 -0700 |
| parents | d42a8a3e4894 |
| children | da8d53dc914b |
| rev | line source |
|---|---|
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1 #include <string.h> |
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2 #include <math.h> |
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3 #include <stdio.h> |
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4 #include <stdlib.h> |
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5 #include "ym2612.h" |
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6 #include "render.h" |
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7 |
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8 //#define DO_DEBUG_PRINT |
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9 #ifdef DO_DEBUG_PRINT |
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10 #define dfprintf fprintf |
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11 #define dfopen(var, fname, mode) var=fopen(fname, mode) |
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12 #else |
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13 #define dfprintf |
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14 #define dfopen(var, fname, mode) |
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15 #endif |
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16 |
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17 #define BUSY_CYCLES 17 |
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18 #define OP_UPDATE_PERIOD 144 |
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19 |
| 362 | 20 enum { |
| 21 REG_TIMERA_HIGH = 0x24, | |
| 22 REG_TIMERA_LOW, | |
| 23 REG_TIMERB, | |
| 24 REG_TIME_CTRL, | |
| 25 REG_KEY_ONOFF, | |
| 26 REG_DAC = 0x2A, | |
| 27 REG_DAC_ENABLE, | |
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28 |
| 362 | 29 REG_DETUNE_MULT = 0x30, |
| 30 REG_TOTAL_LEVEL = 0x40, | |
| 31 REG_ATTACK_KS = 0x50, | |
| 32 REG_DECAY_AM = 0x60, | |
| 33 REG_SUSTAIN_RATE = 0x70, | |
| 34 REG_S_LVL_R_RATE = 0x80, | |
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35 |
| 362 | 36 REG_FNUM_LOW = 0xA0, |
| 37 REG_BLOCK_FNUM_H = 0xA4, | |
| 38 REG_FNUM_LOW_CH3 = 0xA8, | |
| 39 REG_BLOCK_FN_CH3 = 0xAC, | |
| 40 REG_ALG_FEEDBACK = 0xB0, | |
| 41 REG_LR_AMS_PMS = 0xB4 | |
| 42 }; | |
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43 |
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44 #define BIT_TIMERA_ENABLE 0x1 |
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45 #define BIT_TIMERB_ENABLE 0x2 |
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46 #define BIT_TIMERA_OVEREN 0x4 |
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47 #define BIT_TIMERB_OVEREN 0x8 |
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48 #define BIT_TIMERA_RESET 0x10 |
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49 #define BIT_TIMERB_RESET 0x20 |
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50 |
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51 #define BIT_STATUS_TIMERA 0x1 |
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52 #define BIT_STATUS_TIMERB 0x2 |
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53 |
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54 enum { |
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55 PHASE_ATTACK, |
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56 PHASE_DECAY, |
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57 PHASE_SUSTAIN, |
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58 PHASE_RELEASE |
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59 }; |
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60 |
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61 uint8_t did_tbl_init = 0; |
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62 //According to Nemesis, real hardware only uses a 256 entry quarter sine table; however, |
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63 //memory is cheap so using a half sine table will probably save some cycles |
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64 //a full sine table would be nice, but negative numbers don't get along with log2 |
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65 #define SINE_TABLE_SIZE 512 |
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66 uint16_t sine_table[SINE_TABLE_SIZE]; |
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67 //Similar deal here with the power table for log -> linear conversion |
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68 //According to Nemesis, real hardware only uses a 256 entry table for the fractional part |
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69 //and uses the whole part as a shift amount. |
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70 #define POW_TABLE_SIZE (1 << 13) |
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71 uint16_t pow_table[POW_TABLE_SIZE]; |
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72 |
| 362 | 73 uint16_t rate_table_base[] = { |
| 74 //main portion | |
| 75 0,1,0,1,0,1,0,1, | |
| 76 0,1,0,1,1,1,0,1, | |
| 77 0,1,1,1,0,1,1,1, | |
| 78 0,1,1,1,1,1,1,1, | |
| 79 //top end | |
| 80 1,1,1,1,1,1,1,1, | |
| 81 1,1,1,2,1,1,1,2, | |
| 82 1,2,1,2,1,2,1,2, | |
| 83 1,2,2,2,1,2,2,2, | |
| 84 }; | |
| 85 | |
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86 uint16_t rate_table[64*8]; |
| 362 | 87 |
| 88 #define MAX_ENVELOPE 0xFFC | |
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89 #define YM_DIVIDER 2 |
| 374 | 90 #define CYCLE_NEVER 0xFFFFFFFF |
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91 |
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92 uint16_t round_fixed_point(double value, int dec_bits) |
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93 { |
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94 return value * (1 << dec_bits) + 0.5; |
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95 } |
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96 |
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97 FILE * debug_file = NULL; |
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98 uint32_t first_key_on=0; |
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99 |
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100 void ym_init(ym2612_context * context, uint32_t sample_rate, uint32_t clock_rate, uint32_t sample_limit) |
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101 { |
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102 dfopen(debug_file, "ym_debug.txt", "w"); |
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103 memset(context, 0, sizeof(*context)); |
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104 context->audio_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
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105 context->back_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
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106 context->buffer_inc = (double)sample_rate / (double)(clock_rate/OP_UPDATE_PERIOD); |
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107 context->sample_limit = sample_limit*2; |
| 374 | 108 context->write_cycle = CYCLE_NEVER; |
| 362 | 109 for (int i = 0; i < NUM_OPERATORS; i++) { |
| 110 context->operators[i].envelope = MAX_ENVELOPE; | |
| 111 context->operators[i].env_phase = PHASE_RELEASE; | |
| 112 } | |
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113 //some games seem to expect that the LR flags start out as 1 |
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114 for (int i = 0; i < NUM_CHANNELS; i++) { |
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115 context->channels[i].lr = 0xC0; |
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116 } |
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117 if (!did_tbl_init) { |
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118 //populate sine table |
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119 for (int32_t i = 0; i < 512; i++) { |
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120 double sine = sin( ((double)(i*2+1) / SINE_TABLE_SIZE) * M_PI_2 ); |
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121 |
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122 //table stores 4.8 fixed pointed representation of the base 2 log |
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123 sine_table[i] = round_fixed_point(-log2(sine), 8); |
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124 } |
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125 //populate power table |
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126 for (int32_t i = 0; i < POW_TABLE_SIZE; i++) { |
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127 double linear = pow(2, -((double)((i & 0xFF)+1) / 256.0)); |
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128 int32_t tmp = round_fixed_point(linear, 11); |
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129 int32_t shift = (i >> 8) - 2; |
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130 if (shift < 0) { |
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131 tmp <<= 0-shift; |
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132 } else { |
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133 tmp >>= shift; |
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134 } |
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135 pow_table[i] = tmp; |
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136 } |
| 362 | 137 //populate envelope generator rate table, from small base table |
| 138 for (int rate = 0; rate < 64; rate++) { | |
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139 for (int cycle = 0; cycle < 8; cycle++) { |
| 362 | 140 uint16_t value; |
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141 if (rate < 2) { |
| 362 | 142 value = 0; |
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143 } else if (rate >= 60) { |
| 362 | 144 value = 8; |
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145 } else if (rate < 8) { |
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146 value = rate_table_base[((rate & 6) == 6 ? 16 : 0) + cycle]; |
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147 } else if (rate < 48) { |
| 362 | 148 value = rate_table_base[(rate & 0x3) * 8 + cycle]; |
| 149 } else { | |
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150 value = rate_table_base[32 + (rate & 0x3) * 8 + cycle] << ((rate - 48) >> 2); |
| 362 | 151 } |
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152 rate_table[rate * 8 + cycle] = value; |
| 362 | 153 } |
| 154 } | |
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155 } |
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156 } |
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157 |
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158 #define YM_VOLUME_DIVIDER 1 |
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159 |
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160 void ym_run(ym2612_context * context, uint32_t to_cycle) |
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161 { |
| 362 | 162 //printf("Running YM2612 from cycle %d to cycle %d\n", context->current_cycle, to_cycle); |
| 163 //TODO: Fix channel update order OR remap channels in register write | |
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164 for (; context->current_cycle < to_cycle; context->current_cycle += 6) { |
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165 //Update timers at beginning of 144 cycle period |
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166 if (!context->current_op && context->timer_control & BIT_TIMERA_ENABLE) { |
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167 if (context->timer_a) { |
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168 context->timer_a--; |
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169 } else { |
| 362 | 170 if (context->timer_control & BIT_TIMERA_OVEREN) { |
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171 context->status |= BIT_STATUS_TIMERA; |
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172 } |
| 362 | 173 context->timer_a = context->timer_a_load; |
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174 } |
| 362 | 175 if (context->timer_control & BIT_TIMERB_ENABLE) { |
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176 uint32_t b_cyc = (context->current_cycle / OP_UPDATE_PERIOD) % 16; |
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177 if (!b_cyc) { |
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178 if (context->timer_b) { |
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179 context->timer_b--; |
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180 } else { |
| 362 | 181 if (context->timer_control & BIT_TIMERB_OVEREN) { |
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182 context->status |= BIT_STATUS_TIMERB; |
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183 } |
| 362 | 184 context->timer_b = context->timer_b_load; |
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185 } |
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186 } |
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187 } |
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188 } |
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189 //Update Envelope Generator |
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190 if (!(context->current_op % 3)) { |
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191 uint32_t env_cyc = context->env_counter; |
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192 uint32_t op = context->current_env_op; |
| 362 | 193 ym_operator * operator = context->operators + op; |
| 194 ym_channel * channel = context->channels + op/4; | |
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195 uint8_t rate; |
| 362 | 196 for(;;) { |
| 197 rate = operator->rates[operator->env_phase]; | |
| 198 if (rate) { | |
| 199 uint8_t ks = channel->keycode >> operator->key_scaling;; | |
| 200 rate = rate*2 + ks; | |
| 201 if (rate > 63) { | |
| 202 rate = 63; | |
| 203 } | |
| 204 } | |
| 205 //Deal with "infinite" rates | |
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206 //According to Nemesis this should be handled in key-on instead |
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207 if (rate >= 62 && operator->env_phase == PHASE_ATTACK) { |
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208 operator->env_phase = PHASE_DECAY; |
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209 operator->envelope = 0; |
| 362 | 210 } else { |
| 211 break; | |
| 212 } | |
| 213 } | |
| 214 uint32_t cycle_shift = rate < 0x30 ? ((0x2F - rate) >> 2) : 0; | |
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215 if (first_key_on) { |
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216 dfprintf(debug_file, "Operator: %d, env rate: %d (2*%d+%d), env_cyc: %d, cycle_shift: %d, env_cyc & ((1 << cycle_shift) - 1): %d\n", op, rate, operator->rates[operator->env_phase], channel->keycode >> operator->key_scaling,env_cyc, cycle_shift, env_cyc & ((1 << cycle_shift) - 1)); |
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217 } |
| 362 | 218 if (!(env_cyc & ((1 << cycle_shift) - 1))) { |
| 219 uint32_t update_cycle = env_cyc >> cycle_shift & 0x7; | |
| 220 //envelope value is 10-bits, but it will be used as a 4.8 value | |
| 221 uint16_t envelope_inc = rate_table[rate * 8 + update_cycle] << 2; | |
| 222 if (operator->env_phase == PHASE_ATTACK) { | |
| 223 //this can probably be optimized to a single shift rather than a multiply + shift | |
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224 if (first_key_on) { |
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225 dfprintf(debug_file, "Changing op %d envelope %d by %d(%d * %d) in attack phase\n", op, operator->envelope, (~operator->envelope * envelope_inc) >> 4, ~operator->envelope, envelope_inc); |
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226 } |
| 362 | 227 operator->envelope += (~operator->envelope * envelope_inc) >> 4; |
| 228 operator->envelope &= MAX_ENVELOPE; | |
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229 if (!operator->envelope) { |
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230 operator->envelope = 0; |
| 362 | 231 operator->env_phase = PHASE_DECAY; |
| 232 } | |
| 233 } else { | |
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234 if (first_key_on) { |
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235 dfprintf(debug_file, "Changing op %d envelope %d by %d in %s phase\n", op, operator->envelope, envelope_inc, |
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236 operator->env_phase == PHASE_SUSTAIN ? "sustain" : (operator->env_phase == PHASE_DECAY ? "decay": "release")); |
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237 } |
| 362 | 238 operator->envelope += envelope_inc; |
| 239 //clamp to max attenuation value | |
| 240 if (operator->envelope > MAX_ENVELOPE) { | |
| 241 operator->envelope = MAX_ENVELOPE; | |
| 242 } | |
| 243 if (operator->env_phase == PHASE_DECAY && operator->envelope >= operator->sustain_level) { | |
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244 //operator->envelope = operator->sustain_level; |
| 362 | 245 operator->env_phase = PHASE_SUSTAIN; |
| 246 } | |
| 247 } | |
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248 } |
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249 context->current_env_op++; |
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250 if (context->current_env_op == NUM_OPERATORS) { |
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251 context->current_env_op = 0; |
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252 context->env_counter++; |
| 362 | 253 } |
| 254 } | |
| 255 | |
| 256 //Update Phase Generator | |
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257 uint32_t channel = context->current_op / 4; |
| 362 | 258 if (channel != 5 || !context->dac_enable) { |
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259 uint32_t op = context->current_op; |
| 362 | 260 //printf("updating operator %d of channel %d\n", op, channel); |
| 261 ym_operator * operator = context->operators + op; | |
| 262 ym_channel * chan = context->channels + channel; | |
| 263 //TODO: Modulate phase by LFO if necessary | |
| 264 operator->phase_counter += operator->phase_inc; | |
| 265 uint16_t phase = operator->phase_counter >> 10 & 0x3FF; | |
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266 int16_t mod = 0; |
| 362 | 267 switch (op % 4) |
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268 { |
| 362 | 269 case 0://Operator 1 |
| 270 //TODO: Feedback | |
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271 break; |
| 362 | 272 case 1://Operator 3 |
| 273 switch(chan->algorithm) | |
| 274 { | |
| 275 case 0: | |
| 276 case 2: | |
| 277 //modulate by operator 2 | |
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278 mod = context->operators[op+1].output >> 4; |
| 362 | 279 break; |
| 280 case 1: | |
| 281 //modulate by operator 1+2 | |
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282 mod = (context->operators[op-1].output + context->operators[op+1].output) >> 4; |
| 362 | 283 break; |
| 284 case 5: | |
| 285 //modulate by operator 1 | |
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286 mod = context->operators[op-1].output >> 4; |
| 362 | 287 } |
| 288 break; | |
| 289 case 2://Operator 2 | |
| 290 if (chan->algorithm != 1 && chan->algorithm != 2 || chan->algorithm != 7) { | |
| 291 //modulate by Operator 1 | |
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292 mod = context->operators[op-2].output >> 4; |
| 362 | 293 } |
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294 break; |
| 362 | 295 case 3://Operator 4 |
| 296 switch(chan->algorithm) | |
| 297 { | |
| 298 case 0: | |
| 299 case 1: | |
| 300 case 4: | |
| 301 //modulate by operator 3 | |
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302 mod = context->operators[op-2].output >> 4; |
| 362 | 303 break; |
| 304 case 2: | |
| 305 //modulate by operator 1+3 | |
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306 mod = (context->operators[op-3].output + context->operators[op-2].output) >> 4; |
| 362 | 307 break; |
| 308 case 3: | |
| 309 //modulate by operator 2+3 | |
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310 mod = (context->operators[op-1].output + context->operators[op-2].output) >> 4; |
| 362 | 311 break; |
| 312 case 5: | |
| 313 //modulate by operator 1 | |
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314 mod = context->operators[op-3].output >> 4; |
| 362 | 315 break; |
| 316 } | |
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317 break; |
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318 } |
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319 uint16_t env = operator->envelope + operator->total_level; |
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320 if (env > MAX_ENVELOPE) { |
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321 env = MAX_ENVELOPE; |
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322 } |
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323 if (first_key_on) { |
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324 dfprintf(debug_file, "op %d, base phase: %d, mod: %d, sine: %d, out: %d\n", op, phase, mod, sine_table[(phase+mod) & 0x1FF], pow_table[sine_table[phase & 0x1FF] + env]); |
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325 } |
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326 phase += mod; |
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327 |
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328 int16_t output = pow_table[sine_table[phase & 0x1FF] + env]; |
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329 if (phase & 0x200) { |
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330 output = -output; |
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331 } |
| 362 | 332 operator->output = output; |
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333 //Update the channel output if we've updated all operators |
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334 if (op % 4 == 3) { |
| 362 | 335 if (chan->algorithm < 4) { |
| 336 chan->output = operator->output; | |
| 337 } else if(chan->algorithm == 4) { | |
| 338 chan->output = operator->output + context->operators[channel * 4 + 1].output; | |
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339 } else { |
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340 output = 0; |
| 362 | 341 for (uint32_t op = ((chan->algorithm == 7) ? 0 : 1) + channel*4; op < (channel+1)*4; op++) { |
| 342 output += context->operators[op].output; | |
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343 } |
| 362 | 344 chan->output = output; |
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345 } |
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346 if (first_key_on) { |
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347 int16_t value = context->channels[channel].output & 0x3FE0; |
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348 if (value & 0x2000) { |
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349 value |= 0xC000; |
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350 } |
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351 dfprintf(debug_file, "channel %d output: %d\n", channel, value / YM_VOLUME_DIVIDER); |
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352 } |
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353 } |
| 362 | 354 //puts("operator update done"); |
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355 } |
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356 context->current_op++; |
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357 if (context->current_op == NUM_OPERATORS) { |
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358 context->current_op = 0; |
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359 context->buffer_fraction += context->buffer_inc; |
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360 if (context->buffer_fraction > 1.0) { |
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361 context->buffer_fraction -= 1.0; |
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362 context->audio_buffer[context->buffer_pos] = 0; |
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363 context->audio_buffer[context->buffer_pos + 1] = 0; |
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364 for (int i = 0; i < NUM_CHANNELS; i++) { |
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365 int16_t value = context->channels[i].output & 0x3FE0; |
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366 if (value & 0x2000) { |
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367 value |= 0xC000; |
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368 } |
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369 if (context->channels[i].lr & 0x80) { |
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370 context->audio_buffer[context->buffer_pos] += value / YM_VOLUME_DIVIDER; |
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371 } |
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372 if (context->channels[i].lr & 0x40) { |
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373 context->audio_buffer[context->buffer_pos+1] += value / YM_VOLUME_DIVIDER; |
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374 } |
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375 } |
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376 context->buffer_pos += 2; |
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377 if (context->buffer_pos == context->sample_limit) { |
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378 render_wait_ym(context); |
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379 } |
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380 } |
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381 } |
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382 } |
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383 if (context->current_cycle >= context->write_cycle + BUSY_CYCLES) { |
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384 context->status &= 0x7F; |
| 374 | 385 context->write_cycle = CYCLE_NEVER; |
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386 } |
| 362 | 387 //printf("Done running YM2612 at cycle %d\n", context->current_cycle, to_cycle); |
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388 } |
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389 |
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390 void ym_address_write_part1(ym2612_context * context, uint8_t address) |
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391 { |
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392 //printf("address_write_part1: %X\n", address); |
| 362 | 393 context->selected_reg = address; |
| 394 context->selected_part = 0; | |
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395 } |
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396 |
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397 void ym_address_write_part2(ym2612_context * context, uint8_t address) |
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398 { |
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399 //printf("address_write_part2: %X\n", address); |
| 362 | 400 context->selected_reg = address; |
| 401 context->selected_part = 1; | |
| 402 } | |
| 403 | |
| 404 uint8_t fnum_to_keycode[] = { | |
| 405 //F11 = 0 | |
| 406 0,0,0,0,0,0,0,1, | |
| 407 //F11 = 1 | |
| 408 2,3,3,3,3,3,3,3 | |
| 409 }; | |
| 410 | |
| 411 //table courtesy of Nemesis | |
| 412 uint32_t detune_table[][4] = { | |
| 413 {0, 0, 1, 2}, //0 (0x00) | |
| 414 {0, 0, 1, 2}, //1 (0x01) | |
| 415 {0, 0, 1, 2}, //2 (0x02) | |
| 416 {0, 0, 1, 2}, //3 (0x03) | |
| 417 {0, 1, 2, 2}, //4 (0x04) | |
| 418 {0, 1, 2, 3}, //5 (0x05) | |
| 419 {0, 1, 2, 3}, //6 (0x06) | |
| 420 {0, 1, 2, 3}, //7 (0x07) | |
| 421 {0, 1, 2, 4}, //8 (0x08) | |
| 422 {0, 1, 3, 4}, //9 (0x09) | |
| 423 {0, 1, 3, 4}, //10 (0x0A) | |
| 424 {0, 1, 3, 5}, //11 (0x0B) | |
| 425 {0, 2, 4, 5}, //12 (0x0C) | |
| 426 {0, 2, 4, 6}, //13 (0x0D) | |
| 427 {0, 2, 4, 6}, //14 (0x0E) | |
| 428 {0, 2, 5, 7}, //15 (0x0F) | |
| 429 {0, 2, 5, 8}, //16 (0x10) | |
| 430 {0, 3, 6, 8}, //17 (0x11) | |
| 431 {0, 3, 6, 9}, //18 (0x12) | |
| 432 {0, 3, 7,10}, //19 (0x13) | |
| 433 {0, 4, 8,11}, //20 (0x14) | |
| 434 {0, 4, 8,12}, //21 (0x15) | |
| 435 {0, 4, 9,13}, //22 (0x16) | |
| 436 {0, 5,10,14}, //23 (0x17) | |
| 437 {0, 5,11,16}, //24 (0x18) | |
| 438 {0, 6,12,17}, //25 (0x19) | |
| 439 {0, 6,13,19}, //26 (0x1A) | |
| 440 {0, 7,14,20}, //27 (0x1B) | |
| 441 {0, 8,16,22}, //28 (0x1C) | |
| 442 {0, 8,16,22}, //29 (0x1D) | |
| 443 {0, 8,16,22}, //30 (0x1E) | |
| 444 {0, 8,16,22} | |
| 445 }; //31 (0x1F) | |
| 446 | |
| 447 void ym_update_phase_inc(ym2612_context * context, ym_operator * operator, uint32_t op) | |
| 448 { | |
| 449 uint32_t chan_num = op / 4; | |
| 450 //printf("ym_update_phase_inc | channel: %d, op: %d\n", chan_num, op); | |
| 451 //base frequency | |
| 452 ym_channel * channel = context->channels + chan_num; | |
| 453 uint32_t inc = channel->fnum; | |
| 454 if (!channel->block) { | |
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455 inc >>= 1; |
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456 } else { |
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457 inc <<= (channel->block-1); |
| 362 | 458 } |
| 459 //detune | |
| 460 uint32_t detune = detune_table[channel->keycode][operator->detune & 0x3]; | |
| 461 if (operator->detune & 0x40) { | |
| 462 inc -= detune; | |
| 463 //this can underflow, mask to 17-bit result | |
| 464 inc &= 0x1FFFF; | |
| 465 } else { | |
| 466 inc += detune; | |
| 467 } | |
| 468 //multiple | |
| 469 if (operator->multiple) { | |
| 470 inc *= operator->multiple; | |
| 471 } else { | |
| 472 //0.5 | |
| 473 inc >>= 1; | |
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474 } |
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475 //printf("phase_inc for operator %d: %d, block: %d, fnum: %d, detune: %d, multiple: %d\n", op, inc, channel->block, channel->fnum, detune, operator->multiple); |
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476 operator->phase_inc = inc; |
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477 } |
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478 |
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479 void ym_data_write(ym2612_context * context, uint8_t value) |
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480 { |
| 362 | 481 if (context->selected_reg < 0x21 || context->selected_reg > 0xB6 || (context->selected_reg < 0x30 && context->selected_part)) { |
| 482 return; | |
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483 } |
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484 dfprintf(debug_file, "write of %X to reg %X in part %d\n", value, context->selected_reg, context->selected_part+1); |
| 362 | 485 if (context->selected_reg < 0x30) { |
| 486 //Shared regs | |
| 487 switch (context->selected_reg) | |
| 488 { | |
| 489 //TODO: Test reg and LFO | |
| 490 case REG_TIMERA_HIGH: | |
| 491 context->timer_a_load &= 0x3; | |
| 492 context->timer_a_load |= value << 2; | |
| 493 break; | |
| 494 case REG_TIMERA_LOW: | |
| 495 context->timer_a_load &= 0xFFFC; | |
| 496 context->timer_a_load |= value & 0x3; | |
| 497 break; | |
| 498 case REG_TIMERB: | |
| 499 context->timer_b_load = value; | |
| 500 break; | |
| 501 case REG_TIME_CTRL: | |
| 502 context->timer_control = value; | |
| 503 break; | |
| 504 case REG_KEY_ONOFF: { | |
| 505 uint8_t channel = value & 0x7; | |
| 506 if (channel < NUM_CHANNELS) { | |
| 507 for (uint8_t op = channel * 4, bit = 0x10; op < (channel + 1) * 4; op++, bit <<= 1) { | |
| 508 if (value & bit) { | |
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Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
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509 first_key_on = 1; |
| 362 | 510 //printf("Key On for operator %d in channel %d\n", op, channel); |
| 511 context->operators[op].phase_counter = 0; | |
| 512 context->operators[op].env_phase = PHASE_ATTACK; | |
| 513 context->operators[op].envelope = MAX_ENVELOPE; | |
| 514 } else { | |
| 515 //printf("Key Off for operator %d in channel %d\n", op, channel); | |
| 516 context->operators[op].env_phase = PHASE_RELEASE; | |
| 517 } | |
| 518 } | |
| 519 } | |
| 520 break; | |
| 521 } | |
| 522 case REG_DAC: | |
| 523 if (context->dac_enable) { | |
| 524 context->channels[5].output = (((int16_t)value) - 0x80) << 6; | |
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Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
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365
diff
changeset
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525 //printf("DAC Write %X(%d)\n", value, context->channels[5].output); |
| 362 | 526 } |
| 527 break; | |
| 528 case REG_DAC_ENABLE: | |
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364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
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529 //printf("DAC Enable: %X\n", value); |
| 362 | 530 context->dac_enable = value & 0x80; |
| 531 break; | |
| 532 } | |
| 533 } else if (context->selected_reg < 0xA0) { | |
| 534 //part | |
| 535 uint8_t op = context->selected_part ? (NUM_OPERATORS/2) : 0; | |
| 536 //channel in part | |
| 537 if ((context->selected_reg & 0x3) != 0x3) { | |
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370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
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538 op += 4 * (context->selected_reg & 0x3) + ((context->selected_reg & 0xC) / 4); |
| 362 | 539 //printf("write targets operator %d (%d of channel %d)\n", op, op % 4, op / 4); |
| 540 ym_operator * operator = context->operators + op; | |
| 541 switch (context->selected_reg & 0xF0) | |
| 542 { | |
| 543 case REG_DETUNE_MULT: | |
| 544 operator->detune = value >> 4 & 0x7; | |
| 545 operator->multiple = value & 0xF; | |
| 546 ym_update_phase_inc(context, operator, op); | |
| 547 break; | |
| 548 case REG_TOTAL_LEVEL: | |
| 549 operator->total_level = (value & 0x7F) << 5; | |
| 550 break; | |
| 551 case REG_ATTACK_KS: | |
| 376 | 552 operator->key_scaling = 3 - (value >> 6); |
| 362 | 553 operator->rates[PHASE_ATTACK] = value & 0x1F; |
| 554 break; | |
| 555 case REG_DECAY_AM: | |
| 556 //TODO: AM flag for LFO | |
| 557 operator->rates[PHASE_DECAY] = value & 0x1F; | |
| 558 break; | |
| 559 case REG_SUSTAIN_RATE: | |
| 560 operator->rates[PHASE_SUSTAIN] = value & 0x1F; | |
| 561 break; | |
| 562 case REG_S_LVL_R_RATE: | |
| 563 operator->rates[PHASE_RELEASE] = (value & 0xF) << 1 | 1; | |
| 564 operator->sustain_level = value & 0xF0 << 4; | |
| 565 break; | |
| 566 } | |
| 567 } | |
| 568 } else { | |
| 569 uint8_t channel = context->selected_reg & 0x3; | |
| 570 if (channel != 3) { | |
| 571 if (context->selected_part) { | |
| 572 channel += 3; | |
| 573 } | |
| 574 //printf("write targets channel %d\n", channel); | |
| 575 switch (context->selected_reg & 0xFC) | |
| 576 { | |
| 577 case REG_FNUM_LOW: | |
| 578 context->channels[channel].block = context->channels[channel].block_fnum_latch >> 3 & 0x7; | |
| 579 context->channels[channel].fnum = (context->channels[channel].block_fnum_latch & 0x7) << 8 | value; | |
| 580 context->channels[channel].keycode = context->channels[channel].block << 2 | fnum_to_keycode[context->channels[channel].fnum >> 7]; | |
| 581 ym_update_phase_inc(context, context->operators + channel*4, channel*4); | |
| 582 ym_update_phase_inc(context, context->operators + channel*4+1, channel*4+1); | |
| 583 ym_update_phase_inc(context, context->operators + channel*4+2, channel*4+2); | |
| 584 ym_update_phase_inc(context, context->operators + channel*4+3, channel*4+3); | |
| 585 break; | |
| 586 case REG_BLOCK_FNUM_H:{ | |
| 587 context->channels[channel].block_fnum_latch = value; | |
| 588 break; | |
| 589 } | |
| 590 //TODO: Channel 3 special/CSM modes | |
| 591 case REG_ALG_FEEDBACK: | |
| 592 context->channels[channel].algorithm = value & 0x7; | |
| 593 context->channels[channel].feedback = value >> 3 & 0x7; | |
| 594 break; | |
| 595 case REG_LR_AMS_PMS: | |
| 596 context->channels[channel].pms = value & 0x7; | |
| 597 context->channels[channel].ams = value >> 4 & 0x3; | |
| 598 context->channels[channel].lr = value & 0xC0; | |
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Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents:
365
diff
changeset
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599 //printf("Write of %X to LR_AMS_PMS reg for channel %d\n", value, channel); |
| 362 | 600 break; |
| 601 } | |
| 602 } | |
| 603 } | |
| 604 | |
| 605 context->write_cycle = context->current_cycle; | |
| 374 | 606 context->status |= 0x80; |
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288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
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607 } |
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a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
608 |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
609 uint8_t ym_read_status(ym2612_context * context) |
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a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
610 { |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
611 return context->status; |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
612 } |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
613 |