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annotate m68k_util.c @ 2662:5e2d41f0d2ba

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Add ROM db entries for Golden Axe II and American Gladiators since they are incompatible with 6-button controllers
author Michael Pavone <pavone@retrodev.com>
date Wed, 05 Mar 2025 22:24:22 -0800
parents ec02a08196d5
children 38c281ef57b0
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1951
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1 #include <string.h>
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2
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3 void m68k_read_8(m68k_context *context)
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4 {
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5 context->cycles += 4 * context->opts->gen.clock_divider;
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6 #ifdef DEBUG_DISASM
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7 uint32_t tmp = context->scratch1;
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8 #endif
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9 context->scratch1 = read_byte(context->scratch1, (void**)context->mem_pointers, &context->opts->gen, context);
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10 #ifdef DEBUG_DISASM
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11 printf("Read.b %05X: %02X\n", tmp, context->scratch1);
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12 #endif
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13 }
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14
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15 #ifdef DEBUG_DISASM
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16 #include "68kinst.h"
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17 static uint16_t debug_disasm_fetch(uint32_t address, void *vcontext)
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18 {
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19 m68k_context *context = vcontext;
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20 return read_word(address, (void**)context->mem_pointers, &context->opts->gen, context);
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21 }
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22 #endif
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23 void m68k_read_16(m68k_context *context)
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24 {
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25 context->cycles += 4 * context->opts->gen.clock_divider;
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26 #ifdef DEBUG_DISASM
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27 uint32_t tmp = context->scratch1;
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28 #endif
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29 context->scratch1 = read_word(context->scratch1, (void**)context->mem_pointers, &context->opts->gen, context);
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30 #ifdef DEBUG_DISASM
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31 if (tmp == context->pc) {
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32 m68kinst inst;
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33 m68k_decode(debug_disasm_fetch, context, &inst, tmp);
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34 static char disasm_buf[256];
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35 m68k_disasm(&inst, disasm_buf);
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36 printf("Fetch %05X: %04X - %s, d0=%X, d1=%X, d2=%X, d3=%X, d4=%X, d6=%X, d7=%X, a3=%X, a7=%X, xflag=%d\n",
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37 tmp, context->scratch1, disasm_buf, context->dregs[0], context->dregs[1], context->dregs[2], context->dregs[3],
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38 context->dregs[4], context->dregs[6], context->dregs[7], context->aregs[3], context->aregs[7], context->xflag
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39 );
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40 } else {
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41 printf("Read %05X: %04X\n", tmp, context->scratch1);
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42 }
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43 #endif
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44 }
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45
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46 void m68k_write_8(m68k_context *context)
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47 {
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48 context->cycles += 4 * context->opts->gen.clock_divider;
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49 write_byte(context->scratch2, context->scratch1, (void**)context->mem_pointers, &context->opts->gen, context);
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50 #ifdef DEBUG_DISASM
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51 printf("Write.b %05X: %02X\n", context->scratch2, context->scratch1);
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52 #endif
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53 }
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54
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55 void m68k_rmw_writeback(m68k_context *context)
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56 {
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57 if (context->opts->gen.flags & M68K_OPT_BROKEN_READ_MODIFY) {
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58 context->cycles += 4 * context->opts->gen.clock_divider;
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59 } else {
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60 write_byte(context->scratch2, context->scratch1, (void**)context->mem_pointers, &context->opts->gen, context);
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61 }
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62 }
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63
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64 void m68k_write_16(m68k_context *context)
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65 {
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66 context->cycles += 4 * context->opts->gen.clock_divider;
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67 write_word(context->scratch2, context->scratch1, (void**)context->mem_pointers, &context->opts->gen, context);
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68 #ifdef DEBUG_DISASM
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69 printf("Write %05X: %04X\n", context->scratch2, context->scratch1);
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70 #endif
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71 }
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72
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73 void m68k_sync_cycle(m68k_context *context, uint32_t target_cycle)
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74 {
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75 context->sync_cycle = target_cycle; //why?
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76 context->sync_components(context, 0);
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77 }
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78
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79 static void divu(m68k_context *context, uint32_t dividend_reg, uint32_t divisor)
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80 {
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81 uint32_t dividend = context->dregs[dividend_reg];
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82 uint32_t divisor_shift = divisor << 16;
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83 uint16_t quotient = 0;
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84 uint8_t force = 0;
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85 uint16_t bit = 0;
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86 uint32_t cycles = 2;
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87 if (divisor_shift < dividend) {
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88 context->nflag = 128;
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89 context->zflag = 0;
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90 context->vflag = 128;
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91 context->cycles += 6 * context->opts->gen.clock_divider;
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92 return;
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93 }
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94 for (int i = 0; i < 16; i++)
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95 {
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96 force = dividend >> 31;
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97 quotient = quotient << 1 | bit;
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98 dividend = dividend << 1;
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99
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100 if (force || dividend >= divisor_shift) {
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101 dividend -= divisor_shift;
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102 cycles += force ? 4 : 6;
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103 bit = 1;
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104 } else {
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105 bit = 0;
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106 cycles += 8;
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107 }
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108 }
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109 cycles += force ? 6 : bit ? 4 : 2;
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110 context->cycles += cycles * context->opts->gen.clock_divider;
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111 quotient = quotient << 1 | bit;
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112 context->dregs[dividend_reg] = dividend | quotient;
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113 context->vflag = 0;
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114 context->nflag = quotient >> 8 & 128;
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115 context->zflag = quotient == 0;
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116 }
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117
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118 static void divs(m68k_context *context, uint32_t dividend_reg, uint32_t divisor)
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119 {
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120 uint32_t dividend = context->dregs[dividend_reg];
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121 uint32_t divisor_shift = divisor << 16;
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122 uint32_t orig_divisor = divisor_shift, orig_dividend = dividend;
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123 if (divisor_shift & 0x80000000) {
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124 divisor_shift = 0 - divisor_shift;
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125 }
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126
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127 uint32_t cycles = 8;
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128 if (dividend & 0x80000000) {
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129 //dvs10
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130 dividend = 0 - dividend;
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131 cycles += 2;
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132 }
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diff changeset
133 if (divisor_shift <= dividend) {
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diff changeset
134 context->vflag = 128;
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diff changeset
135 context->nflag = 128;
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diff changeset
136 context->zflag = 0;
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diff changeset
137 cycles += 4;
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diff changeset
138 context->cycles += cycles * context->opts->gen.clock_divider;
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parents: 2580
diff changeset
139 return;
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parents: 2580
diff changeset
140 }
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diff changeset
141 uint16_t quotient = 0;
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diff changeset
142 uint16_t bit = 0;
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parents: 2580
diff changeset
143 for (int i = 0; i < 15; i++)
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parents: 2580
diff changeset
144 {
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diff changeset
145 quotient = quotient << 1 | bit;
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diff changeset
146 dividend = dividend << 1;
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parents: 2580
diff changeset
147
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parents: 2580
diff changeset
148 if (dividend >= divisor_shift) {
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diff changeset
149 dividend -= divisor_shift;
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diff changeset
150 cycles += 6;
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parents: 2580
diff changeset
151 bit = 1;
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parents: 2580
diff changeset
152 } else {
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diff changeset
153 bit = 0;
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parents: 2580
diff changeset
154 cycles += 8;
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parents: 2580
diff changeset
155 }
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diff changeset
156 }
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157 quotient = quotient << 1 | bit;
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diff changeset
158 dividend = dividend << 1;
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parents: 2580
diff changeset
159 if (dividend >= divisor_shift) {
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diff changeset
160 dividend -= divisor_shift;
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diff changeset
161 quotient = quotient << 1 | 1;
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diff changeset
162 } else {
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diff changeset
163 quotient = quotient << 1;
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164 }
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165 cycles += 4;
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parents: 2580
diff changeset
166
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167 context->vflag = 0;
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diff changeset
168 if (orig_divisor & 0x80000000) {
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diff changeset
169 cycles += 16; //was 10
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170 if (orig_dividend & 0x80000000) {
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171 if (quotient & 0x8000) {
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172 context->vflag = 128;
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diff changeset
173 context->nflag = 128;
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diff changeset
174 context->zflag = 0;
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175 context->cycles += cycles * context->opts->gen.clock_divider;
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176 return;
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177 } else {
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178 dividend = -dividend;
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179 }
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180 } else {
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diff changeset
181 quotient = -quotient;
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diff changeset
182 if (quotient && !(quotient & 0x8000)) {
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diff changeset
183 context->vflag = 128;
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184 }
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185 }
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diff changeset
186 } else if (orig_dividend & 0x80000000) {
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diff changeset
187 cycles += 18; // was 12
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diff changeset
188 quotient = -quotient;
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diff changeset
189 if (quotient && !(quotient & 0x8000)) {
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diff changeset
190 context->vflag = 128;
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diff changeset
191 } else {
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diff changeset
192 dividend = -dividend;
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diff changeset
193 }
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194 } else {
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diff changeset
195 cycles += 14; //was 10
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diff changeset
196 if (quotient & 0x8000) {
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diff changeset
197 context->vflag= 128;
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diff changeset
198 }
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diff changeset
199 }
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diff changeset
200 if (context->vflag) {
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diff changeset
201 context->nflag = 128;
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diff changeset
202 context->zflag = 0;
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diff changeset
203 context->cycles += cycles * context->opts->gen.clock_divider;
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diff changeset
204 return;
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diff changeset
205 }
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diff changeset
206 context->nflag = (quotient & 0x8000) ? 128 : 0;
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diff changeset
207 context->zflag = quotient == 0;
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diff changeset
208 //V was cleared above, C is cleared by the generated machine code
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diff changeset
209 context->cycles += cycles * context->opts->gen.clock_divider;
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diff changeset
210 context->dregs[dividend_reg] = dividend | quotient;
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diff changeset
211 }
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diff changeset
212
2577
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
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diff changeset
213 static sync_fun *sync_comp_tmp;
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parents: 2500
diff changeset
214 static int_ack_fun int_ack_tmp;
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
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parents: 2500
diff changeset
215 void init_m68k_opts(m68k_options *opts, memmap_chunk * memmap, uint32_t num_chunks, uint32_t clock_divider, sync_fun *sync_components, int_ack_fun int_ack)
1951
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parents:
diff changeset
216 {
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parents:
diff changeset
217 memset(opts, 0, sizeof(*opts));
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parents:
diff changeset
218 opts->gen.memmap = memmap;
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parents:
diff changeset
219 opts->gen.memmap_chunks = num_chunks;
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parents:
diff changeset
220 opts->gen.address_mask = 0xFFFFFF;
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parents:
diff changeset
221 opts->gen.byte_swap = 1;
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parents:
diff changeset
222 opts->gen.max_address = 0x1000000;
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parents:
diff changeset
223 opts->gen.bus_cycles = 4;
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parents:
diff changeset
224 opts->gen.clock_divider = clock_divider;
2577
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
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parents: 2500
diff changeset
225 sync_comp_tmp = sync_components;
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parents: 2500
diff changeset
226 int_ack_tmp = int_ack;
1951
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parents:
diff changeset
227 }
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
228
2577
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
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parents: 2500
diff changeset
229 m68k_context *init_68k_context(m68k_options * opts, m68k_reset_handler *reset_handler)
1951
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parents:
diff changeset
230 {
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
231 m68k_context *context = calloc(1, sizeof(m68k_context));
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parents:
diff changeset
232 context->opts = opts;
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parents:
diff changeset
233 context->reset_handler = reset_handler;
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parents:
diff changeset
234 context->int_cycle = 0xFFFFFFFFU;
2580
939b818df589 Get 68K interrupts working in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2577
diff changeset
235 context->int_pending = 255;
2577
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
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parents: 2500
diff changeset
236 context->sync_components = sync_comp_tmp;
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
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parents: 2500
diff changeset
237 sync_comp_tmp = NULL;
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
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parents: 2500
diff changeset
238 context->int_ack_handler = int_ack_tmp;
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
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parents: 2500
diff changeset
239 int_ack_tmp = NULL;
1951
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parents:
diff changeset
240 return context;
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Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
241 }
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parents:
diff changeset
242
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parents:
diff changeset
243 void m68k_reset(m68k_context *context)
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parents:
diff changeset
244 {
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parents:
diff changeset
245 //read initial SP
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parents:
diff changeset
246 context->scratch1 = 0;
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
247 m68k_read_16(context);
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parents:
diff changeset
248 context->aregs[7] = context->scratch1 << 16;
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
249 context->scratch1 = 2;
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
250 m68k_read_16(context);
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
251 context->aregs[7] |= context->scratch1;
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
252
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
253 //read initial PC
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parents:
diff changeset
254 context->scratch1 = 4;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
255 m68k_read_16(context);
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
256 context->pc = context->scratch1 << 16;
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
257 context->scratch1 = 6;
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
258 m68k_read_16(context);
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
259 context->pc |= context->scratch1;
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
260
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
261 context->scratch1 = context->pc;
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
262 m68k_read_16(context);
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
263 context->prefetch = context->scratch1;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
264 context->pc += 2;
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parents:
diff changeset
265
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
266 context->status = 0x27;
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
267 }
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parents:
diff changeset
268
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parents:
diff changeset
269 void m68k_print_regs(m68k_context *context)
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parents:
diff changeset
270 {
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
271 printf("XNZVC\n%d%d%d%d%d\n", context->xflag != 0, context->nflag != 0, context->zflag != 0, context->vflag != 0, context->cflag != 0);
8494fe8d6b65 Add missing file from new 68K core
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parents:
diff changeset
272 for (int i = 0; i < 8; i++) {
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Michael Pavone <pavone@retrodev.com>
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273 printf("d%d: %X\n", i, context->dregs[i]);
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274 }
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275 for (int i = 0; i < 8; i++) {
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276 printf("a%d: %X\n", i, context->aregs[i]);
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277 }
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278 }
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279
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280 void m68k_serialize(m68k_context *context, uint32_t pc, serialize_buffer *buf)
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281 {
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282 for (int i = 0; i < 8; i++)
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283 {
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284 save_int32(buf, context->dregs[i]);
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285 }
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286 for (int i = 0; i < 8; i++)
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287 {
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288 save_int32(buf, context->aregs[i]);
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289 }
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290 save_int32(buf, context->other_sp);
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291 //old core saves the address of hte instruction that will execute upon resume
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292 //in this field so we need to adjust PC here for compatibility
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293 save_int32(buf, context->pc - 2);
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294 uint16_t sr = context->status << 8;
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295 if (context->xflag) { sr |= 0x10; }
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296 if (context->nflag) { sr |= 0x08; }
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297 if (context->zflag) { sr |= 0x04; }
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298 if (context->vflag) { sr |= 0x02; }
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299 if (context->cflag) { sr |= 0x1; }
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300 save_int16(buf, sr);
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301 save_int32(buf, context->cycles);
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302 save_int32(buf, context->int_cycle);
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303 save_int8(buf, context->int_priority); //int_num on old core, but it's the priority level
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304 save_int8(buf, context->int_pending);
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305 save_int8(buf, context->trace_pending);
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306 //remaining fields have no equivalent in old core
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307 save_int16(buf, context->prefetch);
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308 save_int8(buf, context->stopped);
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309 save_int8(buf, context->int_num);
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310 save_int8(buf, context->int_pending_num);
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311 }
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312
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313 void m68k_deserialize(deserialize_buffer *buf, void *vcontext)
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314 {
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315 m68k_context *context = vcontext;
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316 for (int i = 0; i < 8; i++)
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317 {
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318 context->dregs[i] = load_int32(buf);
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319 }
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320 for (int i = 0; i < 8; i++)
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321 {
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322 context->aregs[i] = load_int32(buf);
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323 }
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324 context->other_sp = load_int32(buf);
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325 context->pc = load_int32(buf);
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326 uint16_t sr = load_int16(buf);
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327 context->status = sr >> 8;
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328 context->xflag = sr & 0x10;
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329 context->nflag = sr & 0x08;
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330 context->zflag = sr & 0x04;
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331 context->vflag = sr & 0x02;
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332 context->cflag = sr & 0x01;
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333 context->cycles = load_int32(buf);
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334 context->int_cycle = load_int32(buf);
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335 context->int_priority = load_int8(buf); //int_num on old core, but it's the priority level
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336 context->int_pending = load_int8(buf);
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337 context->trace_pending = load_int8(buf);
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338 if (buf->cur_pos < buf->size) {
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339 context->prefetch = load_int16(buf);
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340 context->stopped = load_int8(buf);
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341 context->int_num = load_int8(buf);
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342 context->int_pending_num = load_int8(buf);
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343 } else {
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344 context->prefetch = read_word(context->pc, (void**)context->mem_pointers, &context->opts->gen, context);
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345 context->stopped = 0;
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346 context->int_num = context->int_pending_num = 0;
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347 }
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348 //adjust for compatibility with old core
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349 context->pc += 2;
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350 }
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351
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352 void start_68k_context(m68k_context *context, uint32_t pc)
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353 {
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354 context->scratch1 = context->pc = pc;
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355 m68k_read_16(context);
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356 context->prefetch = context->scratch1;
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357 context->pc += 2;
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358 }