Mercurial > repos > blastem

annotate m68k_util.c @ 2654:6068d32b756c

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Implement serialization for new 68K core
author Michael Pavone <pavone@retrodev.com>
date Sun, 02 Mar 2025 17:34:02 -0800
parents 1072cc337822
children ec02a08196d5
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
1951
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1 #include <string.h>
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
2
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
3 void m68k_read_8(m68k_context *context)
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
4 {
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
5 context->cycles += 4 * context->opts->gen.clock_divider;
2651
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
6 #ifdef DEBUG_DISASM
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
7 uint32_t tmp = context->scratch1;
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
8 #endif
2645
620f30af9fdc Fix warnings in m68k_util.c
Michael Pavone <pavone@retrodev.com>
parents: 2614
diff changeset
9 context->scratch1 = read_byte(context->scratch1, (void**)context->mem_pointers, &context->opts->gen, context);
2651
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
10 #ifdef DEBUG_DISASM
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
11 if (context->pc >= 0x3F48 && context->pc < 0x3FCE) {
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
12 printf("Read.b %05X: %02X\n", tmp, context->scratch1);
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
13 }
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
14 #endif
1951
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
15 }
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
16
2590
e602dbf776d8 Fix abcd and implement sbcd and nbcd in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2587
diff changeset
17 #ifdef DEBUG_DISASM
e602dbf776d8 Fix abcd and implement sbcd and nbcd in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2587
diff changeset
18 #include "68kinst.h"
e602dbf776d8 Fix abcd and implement sbcd and nbcd in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2587
diff changeset
19 static uint16_t debug_disasm_fetch(uint32_t address, void *vcontext)
e602dbf776d8 Fix abcd and implement sbcd and nbcd in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2587
diff changeset
20 {
e602dbf776d8 Fix abcd and implement sbcd and nbcd in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2587
diff changeset
21 m68k_context *context = vcontext;
2645
620f30af9fdc Fix warnings in m68k_util.c
Michael Pavone <pavone@retrodev.com>
parents: 2614
diff changeset
22 return read_word(address, (void**)context->mem_pointers, &context->opts->gen, context);
2590
e602dbf776d8 Fix abcd and implement sbcd and nbcd in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2587
diff changeset
23 }
e602dbf776d8 Fix abcd and implement sbcd and nbcd in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2587
diff changeset
24 #endif
1951
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
25 void m68k_read_16(m68k_context *context)
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
26 {
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
27 context->cycles += 4 * context->opts->gen.clock_divider;
2590
e602dbf776d8 Fix abcd and implement sbcd and nbcd in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2587
diff changeset
28 #ifdef DEBUG_DISASM
2587
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
29 uint32_t tmp = context->scratch1;
2590
e602dbf776d8 Fix abcd and implement sbcd and nbcd in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2587
diff changeset
30 #endif
2645
620f30af9fdc Fix warnings in m68k_util.c
Michael Pavone <pavone@retrodev.com>
parents: 2614
diff changeset
31 context->scratch1 = read_word(context->scratch1, (void**)context->mem_pointers, &context->opts->gen, context);
2590
e602dbf776d8 Fix abcd and implement sbcd and nbcd in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2587
diff changeset
32 #ifdef DEBUG_DISASM
2651
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
33 if (context->pc >= 0x3F48 && context->pc < 0x3FCE) {
2590
e602dbf776d8 Fix abcd and implement sbcd and nbcd in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2587
diff changeset
34 if (tmp == context->pc) {
e602dbf776d8 Fix abcd and implement sbcd and nbcd in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2587
diff changeset
35 m68kinst inst;
e602dbf776d8 Fix abcd and implement sbcd and nbcd in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2587
diff changeset
36 m68k_decode(debug_disasm_fetch, context, &inst, tmp);
e602dbf776d8 Fix abcd and implement sbcd and nbcd in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2587
diff changeset
37 static char disasm_buf[256];
e602dbf776d8 Fix abcd and implement sbcd and nbcd in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2587
diff changeset
38 m68k_disasm(&inst, disasm_buf);
2651
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
39 printf("Fetch %05X: %04X - %s, d0=%X, d1=%X, d2=%X, d3=%X, d4=%X, d6=%X, d7=%X, a3=%X, a7=%X, xflag=%d\n",
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
40 tmp, context->scratch1, disasm_buf, context->dregs[0], context->dregs[1], context->dregs[2], context->dregs[3],
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
41 context->dregs[4], context->dregs[6], context->dregs[7], context->aregs[3], context->aregs[7], context->xflag
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
42 );
2614
c5314c0779c2 Extended debug output in debug mode of new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2594
diff changeset
43 } else {
c5314c0779c2 Extended debug output in debug mode of new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2594
diff changeset
44 printf("Read %05X: %04X\n", tmp, context->scratch1);
2590
e602dbf776d8 Fix abcd and implement sbcd and nbcd in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2587
diff changeset
45 }
2651
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
46 }
2590
e602dbf776d8 Fix abcd and implement sbcd and nbcd in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2587
diff changeset
47 #endif
1951
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
48 }
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
49
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
50 void m68k_write_8(m68k_context *context)
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
51 {
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
52 context->cycles += 4 * context->opts->gen.clock_divider;
2645
620f30af9fdc Fix warnings in m68k_util.c
Michael Pavone <pavone@retrodev.com>
parents: 2614
diff changeset
53 write_byte(context->scratch2, context->scratch1, (void**)context->mem_pointers, &context->opts->gen, context);
2651
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
54 #ifdef DEBUG_DISASM
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
55 if (context->pc >= 0x3F48 && context->pc < 0x3FCE) {
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
56 printf("Write.b %05X: %02X\n", context->scratch2, context->scratch1);
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
57 }
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
58 #endif
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
59 }
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
60
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
61 void m68k_rmw_writeback(m68k_context *context)
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
62 {
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
63 if (context->opts->gen.flags & M68K_OPT_BROKEN_READ_MODIFY) {
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
64 context->cycles += 4 * context->opts->gen.clock_divider;
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
65 } else {
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
66 write_byte(context->scratch2, context->scratch1, (void**)context->mem_pointers, &context->opts->gen, context);
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
67 }
1951
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
68 }
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
69
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
70 void m68k_write_16(m68k_context *context)
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
71 {
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
72 context->cycles += 4 * context->opts->gen.clock_divider;
2645
620f30af9fdc Fix warnings in m68k_util.c
Michael Pavone <pavone@retrodev.com>
parents: 2614
diff changeset
73 write_word(context->scratch2, context->scratch1, (void**)context->mem_pointers, &context->opts->gen, context);
2651
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
74 #ifdef DEBUG_DISASM
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
75 if (context->pc >= 0x3F48 && context->pc < 0x3FCE) {
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
76 printf("Write %05X: %04X\n", context->scratch2, context->scratch1);
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
77 }
1072cc337822 Implement TAS in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2645
diff changeset
78 #endif
1951
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
79 }
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
80
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
81 void m68k_sync_cycle(m68k_context *context, uint32_t target_cycle)
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
82 {
2577
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
Michael Pavone <pavone@retrodev.com>
parents: 2500
diff changeset
83 context->sync_cycle = target_cycle; //why?
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
Michael Pavone <pavone@retrodev.com>
parents: 2500
diff changeset
84 context->sync_components(context, 0);
1951
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
85 }
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
86
2587
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
87 static void divu(m68k_context *context, uint32_t dividend_reg, uint32_t divisor)
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
88 {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
89 uint32_t dividend = context->dregs[dividend_reg];
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
90 uint32_t divisor_shift = divisor << 16;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
91 uint16_t quotient = 0;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
92 uint8_t force = 0;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
93 uint16_t bit = 0;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
94 uint32_t cycles = 2;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
95 if (divisor_shift < dividend) {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
96 context->nflag = 128;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
97 context->zflag = 0;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
98 context->vflag = 128;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
99 context->cycles += 6 * context->opts->gen.clock_divider;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
100 return;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
101 }
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
102 for (int i = 0; i < 16; i++)
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
103 {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
104 force = dividend >> 31;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
105 quotient = quotient << 1 | bit;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
106 dividend = dividend << 1;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
107
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
108 if (force || dividend >= divisor_shift) {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
109 dividend -= divisor_shift;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
110 cycles += force ? 4 : 6;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
111 bit = 1;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
112 } else {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
113 bit = 0;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
114 cycles += 8;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
115 }
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
116 }
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
117 cycles += force ? 6 : bit ? 4 : 2;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
118 context->cycles += cycles * context->opts->gen.clock_divider;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
119 quotient = quotient << 1 | bit;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
120 context->dregs[dividend_reg] = dividend | quotient;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
121 context->vflag = 0;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
122 context->nflag = quotient >> 8 & 128;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
123 context->zflag = quotient == 0;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
124 }
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
125
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
126 static void divs(m68k_context *context, uint32_t dividend_reg, uint32_t divisor)
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
127 {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
128 uint32_t dividend = context->dregs[dividend_reg];
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
129 uint32_t divisor_shift = divisor << 16;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
130 uint32_t orig_divisor = divisor_shift, orig_dividend = dividend;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
131 if (divisor_shift & 0x80000000) {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
132 divisor_shift = 0 - divisor_shift;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
133 }
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
134
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
135 uint32_t cycles = 8;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
136 if (dividend & 0x80000000) {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
137 //dvs10
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
138 dividend = 0 - dividend;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
139 cycles += 2;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
140 }
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
141 if (divisor_shift <= dividend) {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
142 context->vflag = 128;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
143 context->nflag = 128;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
144 context->zflag = 0;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
145 cycles += 4;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
146 context->cycles += cycles * context->opts->gen.clock_divider;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
147 return;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
148 }
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
149 uint16_t quotient = 0;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
150 uint16_t bit = 0;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
151 for (int i = 0; i < 15; i++)
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
152 {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
153 quotient = quotient << 1 | bit;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
154 dividend = dividend << 1;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
155
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
156 if (dividend >= divisor_shift) {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
157 dividend -= divisor_shift;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
158 cycles += 6;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
159 bit = 1;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
160 } else {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
161 bit = 0;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
162 cycles += 8;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
163 }
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
164 }
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
165 quotient = quotient << 1 | bit;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
166 dividend = dividend << 1;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
167 if (dividend >= divisor_shift) {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
168 dividend -= divisor_shift;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
169 quotient = quotient << 1 | 1;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
170 } else {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
171 quotient = quotient << 1;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
172 }
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
173 cycles += 4;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
174
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
175 context->vflag = 0;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
176 if (orig_divisor & 0x80000000) {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
177 cycles += 16; //was 10
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
178 if (orig_dividend & 0x80000000) {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
179 if (quotient & 0x8000) {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
180 context->vflag = 128;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
181 context->nflag = 128;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
182 context->zflag = 0;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
183 context->cycles += cycles * context->opts->gen.clock_divider;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
184 return;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
185 } else {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
186 dividend = -dividend;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
187 }
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
188 } else {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
189 quotient = -quotient;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
190 if (quotient && !(quotient & 0x8000)) {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
191 context->vflag = 128;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
192 }
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
193 }
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
194 } else if (orig_dividend & 0x80000000) {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
195 cycles += 18; // was 12
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
196 quotient = -quotient;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
197 if (quotient && !(quotient & 0x8000)) {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
198 context->vflag = 128;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
199 } else {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
200 dividend = -dividend;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
201 }
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
202 } else {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
203 cycles += 14; //was 10
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
204 if (quotient & 0x8000) {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
205 context->vflag= 128;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
206 }
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
207 }
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
208 if (context->vflag) {
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
209 context->nflag = 128;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
210 context->zflag = 0;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
211 context->cycles += cycles * context->opts->gen.clock_divider;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
212 return;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
213 }
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
214 context->nflag = (quotient & 0x8000) ? 128 : 0;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
215 context->zflag = quotient == 0;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
216 //V was cleared above, C is cleared by the generated machine code
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
217 context->cycles += cycles * context->opts->gen.clock_divider;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
218 context->dregs[dividend_reg] = dividend | quotient;
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
219 }
e04c7e753bf6 Implement divs and divu in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2580
diff changeset
220
2577
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
Michael Pavone <pavone@retrodev.com>
parents: 2500
diff changeset
221 static sync_fun *sync_comp_tmp;
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
Michael Pavone <pavone@retrodev.com>
parents: 2500
diff changeset
222 static int_ack_fun int_ack_tmp;
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
Michael Pavone <pavone@retrodev.com>
parents: 2500
diff changeset
223 void init_m68k_opts(m68k_options *opts, memmap_chunk * memmap, uint32_t num_chunks, uint32_t clock_divider, sync_fun *sync_components, int_ack_fun int_ack)
1951
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
224 {
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
225 memset(opts, 0, sizeof(*opts));
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
226 opts->gen.memmap = memmap;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
227 opts->gen.memmap_chunks = num_chunks;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
228 opts->gen.address_mask = 0xFFFFFF;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
229 opts->gen.byte_swap = 1;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
230 opts->gen.max_address = 0x1000000;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
231 opts->gen.bus_cycles = 4;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
232 opts->gen.clock_divider = clock_divider;
2577
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
Michael Pavone <pavone@retrodev.com>
parents: 2500
diff changeset
233 sync_comp_tmp = sync_components;
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
Michael Pavone <pavone@retrodev.com>
parents: 2500
diff changeset
234 int_ack_tmp = int_ack;
1951
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
235 }
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
236
2577
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
Michael Pavone <pavone@retrodev.com>
parents: 2500
diff changeset
237 m68k_context *init_68k_context(m68k_options * opts, m68k_reset_handler *reset_handler)
1951
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
238 {
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
239 m68k_context *context = calloc(1, sizeof(m68k_context));
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
240 context->opts = opts;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
241 context->reset_handler = reset_handler;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
242 context->int_cycle = 0xFFFFFFFFU;
2580
939b818df589 Get 68K interrupts working in new CPU core
Michael Pavone <pavone@retrodev.com>
parents: 2577
diff changeset
243 context->int_pending = 255;
2577
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
Michael Pavone <pavone@retrodev.com>
parents: 2500
diff changeset
244 context->sync_components = sync_comp_tmp;
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
Michael Pavone <pavone@retrodev.com>
parents: 2500
diff changeset
245 sync_comp_tmp = NULL;
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
Michael Pavone <pavone@retrodev.com>
parents: 2500
diff changeset
246 context->int_ack_handler = int_ack_tmp;
5f725429d08f WIP changes to new CPU core for rotate instructions and to get interrupts more functional
Michael Pavone <pavone@retrodev.com>
parents: 2500
diff changeset
247 int_ack_tmp = NULL;
1951
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
248 return context;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
249 }
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
250
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
251 void m68k_reset(m68k_context *context)
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
252 {
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
253 //read initial SP
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
254 context->scratch1 = 0;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
255 m68k_read_16(context);
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
256 context->aregs[7] = context->scratch1 << 16;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
257 context->scratch1 = 2;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
258 m68k_read_16(context);
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
259 context->aregs[7] |= context->scratch1;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
260
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
261 //read initial PC
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
262 context->scratch1 = 4;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
263 m68k_read_16(context);
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
264 context->pc = context->scratch1 << 16;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
265 context->scratch1 = 6;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
266 m68k_read_16(context);
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
267 context->pc |= context->scratch1;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
268
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
269 context->scratch1 = context->pc;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
270 m68k_read_16(context);
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
271 context->prefetch = context->scratch1;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
272 context->pc += 2;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
273
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
274 context->status = 0x27;
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
275 }
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
276
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
277 void m68k_print_regs(m68k_context *context)
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
278 {
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
279 printf("XNZVC\n%d%d%d%d%d\n", context->xflag != 0, context->nflag != 0, context->zflag != 0, context->vflag != 0, context->cflag != 0);
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
280 for (int i = 0; i < 8; i++) {
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
281 printf("d%d: %X\n", i, context->dregs[i]);
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
282 }
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
283 for (int i = 0; i < 8; i++) {
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
284 printf("a%d: %X\n", i, context->aregs[i]);
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
285 }
8494fe8d6b65 Add missing file from new 68K core
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
286 }
2499
d74d3998482c Make some progress on compiling full emulator with new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2447
diff changeset
287
d74d3998482c Make some progress on compiling full emulator with new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2447
diff changeset
288 void m68k_serialize(m68k_context *context, uint32_t pc, serialize_buffer *buf)
d74d3998482c Make some progress on compiling full emulator with new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2447
diff changeset
289 {
2654
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
290 for (int i = 0; i < 8; i++)
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
291 {
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
292 save_int32(buf, context->dregs[i]);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
293 }
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
294 for (int i = 0; i < 8; i++)
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
295 {
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
296 save_int32(buf, context->aregs[i]);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
297 }
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
298 save_int32(buf, context->other_sp);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
299 //old core saves the address of hte instruction that will execute upon resume
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
300 //in this field so we need to adjust PC here for compatibility
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
301 save_int32(buf, context->pc - 2);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
302 uint16_t sr = context->status << 8;
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
303 if (context->xflag) { sr |= 0x10; }
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
304 if (context->nflag) { sr |= 0x08; }
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
305 if (context->zflag) { sr |= 0x04; }
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
306 if (context->vflag) { sr |= 0x02; }
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
307 if (context->cflag) { sr |= 0x1; }
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
308 save_int16(buf, sr);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
309 save_int32(buf, context->cycles);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
310 save_int32(buf, context->int_cycle);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
311 save_int8(buf, context->int_priority); //int_num on old core, but it's the priority level
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
312 save_int8(buf, context->int_pending);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
313 save_int8(buf, context->trace_pending);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
314 //remaining fields have no equivalent in old core
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
315 save_int16(buf, context->prefetch);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
316 save_int8(buf, context->stopped);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
317 save_int8(buf, context->int_num);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
318 save_int8(buf, context->int_pending_num);
2499
d74d3998482c Make some progress on compiling full emulator with new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2447
diff changeset
319 }
d74d3998482c Make some progress on compiling full emulator with new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2447
diff changeset
320
d74d3998482c Make some progress on compiling full emulator with new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2447
diff changeset
321 void m68k_deserialize(deserialize_buffer *buf, void *vcontext)
d74d3998482c Make some progress on compiling full emulator with new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2447
diff changeset
322 {
2654
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
323 m68k_context *context = vcontext;
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
324 for (int i = 0; i < 8; i++)
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
325 {
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
326 context->dregs[i] = load_int32(buf);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
327 }
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
328 for (int i = 0; i < 8; i++)
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
329 {
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
330 context->aregs[i] = load_int32(buf);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
331 }
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
332 context->other_sp = load_int32(buf);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
333 context->pc = load_int32(buf);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
334 uint16_t sr = load_int16(buf);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
335 context->status = sr >> 8;
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
336 context->xflag = sr & 0x10;
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
337 context->nflag = sr & 0x08;
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
338 context->zflag = sr & 0x04;
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
339 context->vflag = sr & 0x02;
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
340 context->cflag = sr & 0x01;
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
341 context->cycles = load_int32(buf);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
342 context->int_cycle = load_int32(buf);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
343 context->int_priority = load_int8(buf); //int_num on old core, but it's the priority level
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
344 context->int_pending = load_int8(buf);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
345 context->trace_pending = load_int8(buf);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
346 if (buf->cur_pos < buf->size) {
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
347 context->prefetch = load_int16(buf);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
348 context->stopped = load_int8(buf);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
349 context->int_num = load_int8(buf);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
350 context->int_pending_num = load_int8(buf);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
351 } else {
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
352 context->prefetch = read_word(context->pc, (void**)context->mem_pointers, &context->opts->gen, context);
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
353 context->stopped = 0;
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
354 context->int_num = context->int_pending_num = 0;
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
355 }
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
356 //adjust for compatibility with old core
6068d32b756c Implement serialization for new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2651
diff changeset
357 context->pc += 2;
2499
d74d3998482c Make some progress on compiling full emulator with new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2447
diff changeset
358 }
2500
d44fe974fb85 Get blastem compiling with new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2499
diff changeset
359
d44fe974fb85 Get blastem compiling with new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2499
diff changeset
360 void start_68k_context(m68k_context *context, uint32_t pc)
d44fe974fb85 Get blastem compiling with new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2499
diff changeset
361 {
d44fe974fb85 Get blastem compiling with new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2499
diff changeset
362 context->scratch1 = context->pc = pc;
d44fe974fb85 Get blastem compiling with new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2499
diff changeset
363 m68k_read_16(context);
d44fe974fb85 Get blastem compiling with new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2499
diff changeset
364 context->prefetch = context->scratch1;
d44fe974fb85 Get blastem compiling with new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2499
diff changeset
365 context->pc += 2;
d44fe974fb85 Get blastem compiling with new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 2499
diff changeset
366 }