Mercurial > repos > blastem

annotate runtime.S @ 422:642b2f8aee32

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Change default resolution to 640x480
author Mike Pavone <pavone@retrodev.com>
date Tue, 25 Jun 2013 23:03:25 -0700
parents 3923dbc2dcc4
children 8e136187c0e0
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
17
de0085d4ea40 Add asssembly runtime code stub
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
2 .global handle_cycle_limit
150
3e68e517cc01 Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
3 .global do_sync
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
4 handle_cycle_limit:
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
5 cmp 84(%rsi), %eax
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
6 jb skip_sync
150
3e68e517cc01 Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
7 do_sync:
343
467bfa17004a Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents: 321
diff changeset
8 push %rcx
467bfa17004a Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents: 321
diff changeset
9 push %rdi
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 53
diff changeset
10 call m68k_save_context
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 53
diff changeset
11 mov %rsi, %rdi
198
209a37eed3e7 Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents: 194
diff changeset
12 xor %esi, %esi
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 53
diff changeset
13 call sync_components
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 53
diff changeset
14 mov %rax, %rsi
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 53
diff changeset
15 call m68k_load_context
343
467bfa17004a Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents: 321
diff changeset
16 pop %rdi
467bfa17004a Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents: 321
diff changeset
17 pop %rcx
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
18 skip_sync:
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
19 ret
87
60b5c9e2f4e0 vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
parents: 86
diff changeset
20
321
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
21 sr_msg_int:
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
22 .asciz "SR set to $%X due to interrupt\n"
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
23 debug_print_sr_int:
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
24 call m68k_save_context
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
25 push %rsi
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
26 lea sr_msg_int(%rip), %rdi
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
27 movzxb 5(%rsi), %rsi
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
28 xor %rax, %rax
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
29 call printf
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
30 pop %rsi
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
31 call m68k_load_context
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
32 ret
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
33
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
34 sr_msg:
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
35 .asciz "SR set to $%X\n"
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
36 .global debug_print_sr
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
37 debug_print_sr:
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
38 call m68k_save_context
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
39 push %rsi
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
40 lea sr_msg(%rip), %rdi
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
41 movzxb 5(%rsi), %rsi
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
42 xor %rax, %rax
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
43 call printf
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
44 pop %rsi
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
45 call m68k_load_context
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
46 ret
176
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
47
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
48 invalid_msg:
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
49 .asciz "Invalid instruction at %X\n"
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
50
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
51 .global m68k_invalid
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
52 m68k_invalid:
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
53 lea invalid_msg(%rip), %rdi
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
54 mov %ecx, %esi
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
55 xor %rax, %rax
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
56 call printf
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
57 mov $1, %rdi
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
58 call exit
194
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
59
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
60 .global bcd_add
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
61 bcd_add:
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
62 xchg %rax, %rdi
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
63
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
64 mov %cl, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
65 mov %al, %ah
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
66 and $0xF, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
67 and $0xF, %ah
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
68 and $0xF0, %cl
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
69 and $0xF0, %al
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
70 add %ah, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
71 cmp $10, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
72 jb no_adjust
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
73 add $6, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
74 no_adjust:
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
75 add %ch, %al
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
76 add %al, %cl
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
77 mov $0, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
78 jc def_adjust
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
79 cmp $0xA0, %cl
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
80 jb no_adjust_h
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
81 def_adjust:
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
82 add $0x60, %cl
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
83 mov $1, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
84 no_adjust_h:
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
85
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
86 mov %rdi, %rax
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
87 ret
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
88
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
89 .global bcd_sub
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
90 bcd_sub:
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
91 xchg %rax, %rdi
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
92
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
93 mov %cl, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
94 mov %al, %ah
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
95 and $0xF, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
96 and $0xF, %ah
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
97 and $0xF0, %cl
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
98 and $0xF0, %al
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
99 sub %ah, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
100 cmp $10, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
101 jb no_adjusts
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
102 sub $6, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
103 no_adjusts:
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
104 add %ch, %cl
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
105 sub %al, %cl
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
106 mov $0, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
107 jc def_adjusts
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
108 cmp $0xA0, %cl
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
109 jb no_adjust_hs
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
110 def_adjusts:
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
111 sub $0x60, %cl
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
112 mov $1, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
113 no_adjust_hs:
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
114
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
115 mov %rdi, %rax
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
116 ret
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
117
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
118 .global get_sr
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
119 get_sr:
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
120 mov 5(%rsi), %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
121 shl $8, %cx
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
122 mov (%rsi), %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
123 shl $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
124 or %bl, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
125 shl $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
126 or %dl, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
127 shl $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
128 or %bh, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
129 shl $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
130 or %dh, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
131 ret
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
132
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
133 .global set_sr
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
134 set_sr:
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
135 mov %cl, %dh
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
136 and $1, %dh
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
137 shr $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
138 mov %cl, %bh
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
139 and $1, %bh
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
140 shr $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
141 mov %cl, %dl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
142 and $1, %dl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
143 shr $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
144 mov %cl, %bl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
145 and $1, %bl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
146 shr $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
147 and $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
148 mov %cl, (%rsi)
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
149 shr $8, %cx
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
150 mov %cl, 5(%rsi)
321
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
151 /* call debug_print_sr */
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
152 ret
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
153
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
154 .global set_ccr
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
155 set_ccr:
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
156 mov %cl, %dh
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
157 and $1, %dh
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
158 shr $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
159 mov %cl, %bh
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
160 and $1, %bh
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
161 shr $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
162 mov %cl, %dl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
163 and $1, %dl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
164 shr $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
165 mov %cl, %bl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
166 and $1, %bl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
167 shr $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
168 and $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
169 mov %cl, (%rsi)
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 53
diff changeset
170 ret
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
171
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
172 .global m68k_modified_ret_addr
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
173 m68k_modified_ret_addr:
145
15b8dce19cf4 Implement m68k_modified_ret_addr
Mike Pavone <pavone@retrodev.com>
parents: 138
diff changeset
174 add $16, %rsp
15b8dce19cf4 Implement m68k_modified_ret_addr
Mike Pavone <pavone@retrodev.com>
parents: 138
diff changeset
175 call m68k_native_addr
15b8dce19cf4 Implement m68k_modified_ret_addr
Mike Pavone <pavone@retrodev.com>
parents: 138
diff changeset
176 jmp *%rcx
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
177
86
3d3966c254b2 RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents: 85
diff changeset
178 .global m68k_native_addr_and_sync
3d3966c254b2 RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents: 85
diff changeset
179 m68k_native_addr_and_sync:
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
180 call m68k_save_context
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
181 push %rcx
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
182 mov %rsi, %rdi
198
209a37eed3e7 Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents: 194
diff changeset
183 xor %esi, %esi
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
184 call sync_components
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
185 pop %rsi
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
186 push %rax
95
dd3c680c618c Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents: 87
diff changeset
187 mov %rax, %rdi
dd3c680c618c Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents: 87
diff changeset
188 call get_native_address_trans
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
189 mov %rax, %rcx
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
190 pop %rsi
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
191 call m68k_load_context
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
192 ret
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
193
86
3d3966c254b2 RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents: 85
diff changeset
194 .global m68k_native_addr
3d3966c254b2 RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents: 85
diff changeset
195 m68k_native_addr:
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
196 call m68k_save_context
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
197 push %rsi
95
dd3c680c618c Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents: 87
diff changeset
198 mov %rsi, %rdi
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
199 mov %ecx, %esi
95
dd3c680c618c Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents: 87
diff changeset
200 call get_native_address_trans
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
201 mov %rax, %rcx
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
202 pop %rsi
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
203 call m68k_load_context
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
204 ret
193
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
205
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
206 .global m68k_retrans_stub
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
207 m68k_retrans_stub:
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
208 call m68k_save_context
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
209 push %rsi
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
210 call m68k_retranslate_inst
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
211 pop %rsi
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
212 mov %rax, %rcx
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
213 call m68k_load_context
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
214 jmp *%rcx
53
44e661913a51 Add preliminary support for JMP
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
215
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
216 .global m68k_save_context
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
217 m68k_save_context:
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
218 mov %bl, 1(%rsi) /* N Flag */
207
c82f65a87a53 Fix overflow flag on ASL
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
219 mov %dl, 2(%rsi) /* Z flag */
c82f65a87a53 Fix overflow flag on ASL
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
220 mov %bh, 3(%rsi) /* V flag */
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
221 mov %dh, 4(%rsi) /* C flag */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
222 mov %r10d, 8(%rsi) /* d0 */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
223 mov %r11d, 12(%rsi) /* d1 */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
224 mov %r12d, 16(%rsi) /* d2 */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
225 mov %r13d, 40(%rsi) /* a0 */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
226 mov %r14d, 44(%rsi) /* a1 */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
227 mov %r15d, 68(%rsi) /* a7 */
72
7935cd64d5c8 Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents: 66
diff changeset
228 mov %eax, 80(%rsi) /* current cycle count */
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
229 ret
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
230
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
231 .global m68k_load_context
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
232 m68k_load_context:
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
233 mov 1(%rsi), %bl /* N Flag */
207
c82f65a87a53 Fix overflow flag on ASL
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
234 mov 2(%rsi), %dl /* Z flag */
c82f65a87a53 Fix overflow flag on ASL
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
235 mov 3(%rsi), %bh /* V flag */
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
236 mov 4(%rsi), %dh /* C flag */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
237 mov 8(%rsi), %r10d /* d0 */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
238 mov 12(%rsi), %r11d /* d1 */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
239 mov 16(%rsi), %r12d /* d2 */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
240 mov 40(%rsi), %r13d /* a0 */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
241 mov 44(%rsi), %r14d /* a1 */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
242 mov 68(%rsi), %r15d /* a7 */
72
7935cd64d5c8 Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents: 66
diff changeset
243 mov 76(%rsi), %ebp /* target cycle count */
7935cd64d5c8 Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents: 66
diff changeset
244 mov 80(%rsi), %eax /* current cycle count */
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
245 mov 96(%rsi), %r8d /* cartridge address */
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
246 mov 104(%rsi), %r9d /* work ram address */
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
247 ret
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
248
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
249 .global m68k_start_context
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
250 m68k_start_context:
208
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents: 207
diff changeset
251 push %rbp
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents: 207
diff changeset
252 push %r12
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents: 207
diff changeset
253 push %r13
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents: 207
diff changeset
254 push %r14
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents: 207
diff changeset
255 push %r15
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents: 207
diff changeset
256
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
257 call m68k_load_context
208
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents: 207
diff changeset
258 call *%rdi
209
922b59c09259 Flag fixes for div, negx and not
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
259 call m68k_save_context
208
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents: 207
diff changeset
260
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents: 207
diff changeset
261 pop %r15
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents: 207
diff changeset
262 pop %r14
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents: 207
diff changeset
263 pop %r13
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents: 207
diff changeset
264 pop %r12
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents: 207
diff changeset
265 pop %rbp
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents: 207
diff changeset
266
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents: 207
diff changeset
267 ret