Mercurial > repos > blastem
annotate vdp.c @ 323:8c01b4154480
Properly mask sprite X and Y coordinates
| author | Mike Pavone <pavone@retrodev.com> |
|---|---|
| date | Sat, 11 May 2013 23:59:20 -0700 |
| parents | 8e2fa485c0f2 |
| children | 1b00258b1f29 |
| rev | line source |
|---|---|
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1 #include "vdp.h" |
| 75 | 2 #include "blastem.h" |
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3 #include <stdlib.h> |
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4 #include <string.h> |
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5 |
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6 #define NTSC_ACTIVE 225 |
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7 #define PAL_ACTIVE 241 |
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8 #define BUF_BIT_PRIORITY 0x40 |
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9 #define MAP_BIT_PRIORITY 0x8000 |
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10 #define MAP_BIT_H_FLIP 0x800 |
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11 #define MAP_BIT_V_FLIP 0x1000 |
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12 |
| 75 | 13 #define BIT_PAL 0x8 |
| 14 #define BIT_DMA_ENABLE 0x4 | |
| 15 #define BIT_H40 0x1 | |
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16 |
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17 #define BIT_HILIGHT 0x8 |
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18 |
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19 #define SCROLL_BUFFER_SIZE 32 |
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20 #define SCROLL_BUFFER_DRAW 16 |
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21 |
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22 #define FIFO_SIZE 4 |
| 40 | 23 |
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24 void init_vdp_context(vdp_context * context) |
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25 { |
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26 memset(context, 0, sizeof(*context)); |
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27 context->vdpmem = malloc(VRAM_SIZE); |
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28 memset(context->vdpmem, 0, VRAM_SIZE); |
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29 context->framebuf = malloc(FRAMEBUF_SIZE); |
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30 memset(context->framebuf, 0, FRAMEBUF_SIZE); |
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31 context->linebuf = malloc(LINEBUF_SIZE + SCROLL_BUFFER_SIZE*2); |
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32 memset(context->linebuf, 0, LINEBUF_SIZE + SCROLL_BUFFER_SIZE*2); |
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33 context->tmp_buf_a = context->linebuf + LINEBUF_SIZE; |
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34 context->tmp_buf_b = context->tmp_buf_a + SCROLL_BUFFER_SIZE; |
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35 context->sprite_draws = MAX_DRAWS; |
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36 context->fifo_cur = malloc(sizeof(fifo_entry) * FIFO_SIZE); |
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37 context->fifo_end = context->fifo_cur + FIFO_SIZE; |
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38 } |
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39 |
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40 void render_sprite_cells(vdp_context * context) |
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41 { |
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42 if (context->cur_slot >= context->sprite_draws) { |
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43 sprite_draw * d = context->sprite_draw_list + context->cur_slot; |
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44 |
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45 uint16_t dir; |
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46 int16_t x; |
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47 if (d->h_flip) { |
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48 x = d->x_pos + 7; |
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49 dir = -1; |
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50 } else { |
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51 x = d->x_pos; |
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52 dir = 1; |
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53 } |
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54 //printf("Draw Slot %d of %d, Rendering sprite cell from %X to x: %d\n", context->cur_slot, context->sprite_draws, d->address, x); |
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55 context->cur_slot--; |
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56 for (uint16_t address = d->address; address != ((d->address+4) & 0xFFFF); address++) { |
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57 if (x >= 0 && x < 320 && !(context->linebuf[x] & 0xF)) { |
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58 context->linebuf[x] = (context->vdpmem[address] >> 4) | d->pal_priority; |
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59 } |
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60 x += dir; |
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61 if (x >= 0 && x < 320 && !(context->linebuf[x] & 0xF)) { |
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62 context->linebuf[x] = (context->vdpmem[address] & 0xF) | d->pal_priority; |
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63 } |
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64 x += dir; |
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65 } |
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66 } |
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67 } |
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68 |
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69 void vdp_print_sprite_table(vdp_context * context) |
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70 { |
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71 uint16_t sat_address = (context->regs[REG_SAT] & 0x7F) << 9; |
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72 uint16_t current_index = 0; |
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73 uint8_t count = 0; |
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74 do { |
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75 uint16_t address = current_index * 8 + sat_address; |
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76 uint8_t height = ((context->vdpmem[address+2] & 0x3) + 1) * 8; |
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77 uint8_t width = (((context->vdpmem[address+2] >> 2) & 0x3) + 1) * 8; |
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78 int16_t y = ((context->vdpmem[address] & 0x3) << 8 | context->vdpmem[address+1]) & 0x1FF; |
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79 int16_t x = ((context->vdpmem[address+ 6] & 0x3) << 8 | context->vdpmem[address + 7]) & 0x1FF; |
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80 uint16_t link = context->vdpmem[address+3] & 0x7F; |
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81 uint8_t pal = context->vdpmem[address + 4] >> 5 & 0x3; |
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82 uint8_t pri = context->vdpmem[address + 4] >> 7; |
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83 uint16_t pattern = ((context->vdpmem[address + 4] << 8 | context->vdpmem[address + 5]) & 0x7FF) << 5; |
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84 //printf("Sprite %d: X=%d(%d), Y=%d(%d), Width=%u, Height=%u, Link=%u, Pal=%u, Pri=%u, Pat=%X\n", current_index, x, x-128, y, y-128, width, height, link, pal, pri, pattern); |
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85 current_index = link; |
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86 count++; |
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87 } while (current_index != 0 && count < 80); |
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88 } |
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89 |
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90 void scan_sprite_table(uint32_t line, vdp_context * context) |
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91 { |
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92 if (context->sprite_index && context->slot_counter) { |
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93 line += 1; |
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94 line &= 0xFF; |
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95 context->sprite_index &= 0x7F; |
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96 if (context->latched_mode & BIT_H40) { |
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97 if (context->sprite_index >= MAX_SPRITES_FRAME) { |
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98 context->sprite_index = 0; |
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99 return; |
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100 } |
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101 } else if(context->sprite_index >= MAX_SPRITES_FRAME_H32) { |
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102 context->sprite_index = 0; |
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103 return; |
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104 } |
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105 //TODO: Read from SAT cache rather than from VRAM |
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106 uint16_t sat_address = (context->regs[REG_SAT] & 0x7F) << 9; |
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107 uint16_t address = context->sprite_index * 8 + sat_address; |
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108 line += 128; |
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109 uint16_t y = ((context->vdpmem[address] & 0x3) << 8 | context->vdpmem[address+1]) & 0x1FF; |
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110 uint8_t height = ((context->vdpmem[address+2] & 0x3) + 1) * 8; |
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111 //printf("Sprite %d | y: %d, height: %d\n", context->sprite_index, y, height); |
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112 if (y <= line && line < (y + height)) { |
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113 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line); |
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114 context->sprite_info_list[--(context->slot_counter)].size = context->vdpmem[address+2]; |
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115 context->sprite_info_list[context->slot_counter].index = context->sprite_index; |
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116 context->sprite_info_list[context->slot_counter].y = y-128; |
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117 } |
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118 context->sprite_index = context->vdpmem[address+3] & 0x7F; |
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119 if (context->sprite_index && context->slot_counter) |
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120 { |
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121 address = context->sprite_index * 8 + sat_address; |
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122 y = ((context->vdpmem[address] & 0x3) << 8 | context->vdpmem[address+1]) & 0x1FF; |
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123 height = ((context->vdpmem[address+2] & 0x3) + 1) * 8; |
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124 //printf("Sprite %d | y: %d, height: %d\n", context->sprite_index, y, height); |
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125 if (y <= line && line < (y + height)) { |
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126 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line); |
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127 context->sprite_info_list[--(context->slot_counter)].size = context->vdpmem[address+2]; |
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128 context->sprite_info_list[context->slot_counter].index = context->sprite_index; |
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129 context->sprite_info_list[context->slot_counter].y = y-128; |
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130 } |
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131 context->sprite_index = context->vdpmem[address+3] & 0x7F; |
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132 } |
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133 } |
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134 } |
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135 |
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136 void read_sprite_x(uint32_t line, vdp_context * context) |
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137 { |
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138 if (context->cur_slot >= context->slot_counter) { |
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139 if (context->sprite_draws) { |
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140 line += 1; |
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141 line &= 0xFF; |
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142 //in tiles |
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143 uint8_t width = ((context->sprite_info_list[context->cur_slot].size >> 2) & 0x3) + 1; |
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144 //in pixels |
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145 uint8_t height = ((context->sprite_info_list[context->cur_slot].size & 0x3) + 1) * 8; |
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146 uint16_t att_addr = ((context->regs[REG_SAT] & 0x7F) << 9) + context->sprite_info_list[context->cur_slot].index * 8 + 4; |
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147 uint16_t tileinfo = (context->vdpmem[att_addr] << 8) | context->vdpmem[att_addr+1]; |
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148 uint8_t pal_priority = (tileinfo >> 9) & 0x70; |
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149 uint8_t row; |
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150 if (tileinfo & MAP_BIT_V_FLIP) { |
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151 row = (context->sprite_info_list[context->cur_slot].y + height - 1) - line; |
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152 } else { |
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153 row = line-context->sprite_info_list[context->cur_slot].y; |
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154 } |
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155 uint16_t address = ((tileinfo & 0x7FF) << 5) + row * 4; |
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156 int16_t x = ((context->vdpmem[att_addr+ 2] & 0x3) << 8 | context->vdpmem[att_addr + 3]) & 0x1FF; |
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157 if (x) { |
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158 context->flags |= FLAG_CAN_MASK; |
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159 } else if(context->flags & (FLAG_CAN_MASK | FLAG_DOT_OFLOW)) { |
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160 context->flags |= FLAG_MASKED; |
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161 } |
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162 |
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163 context->flags &= ~FLAG_DOT_OFLOW; |
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164 int16_t i; |
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165 if (context->flags & FLAG_MASKED) { |
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166 for (i=0; i < width && context->sprite_draws; i++) { |
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167 --context->sprite_draws; |
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168 context->sprite_draw_list[context->sprite_draws].x_pos = -128; |
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169 } |
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170 } else { |
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171 x -= 128; |
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172 int16_t base_x = x; |
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173 int16_t dir; |
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174 if (tileinfo & MAP_BIT_H_FLIP) { |
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175 x += (width-1) * 8; |
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176 dir = -8; |
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177 } else { |
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178 dir = 8; |
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179 } |
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180 //printf("Sprite %d | x: %d, y: %d, width: %d, height: %d, pal_priority: %X, row: %d, tile addr: %X\n", context->sprite_info_list[context->cur_slot].index, x, context->sprite_info_list[context->cur_slot].y, width, height, pal_priority, row, address); |
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181 for (i=0; i < width && context->sprite_draws; i++, x += dir) { |
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182 --context->sprite_draws; |
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183 context->sprite_draw_list[context->sprite_draws].address = address + i * height * 4; |
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184 context->sprite_draw_list[context->sprite_draws].x_pos = x; |
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185 context->sprite_draw_list[context->sprite_draws].pal_priority = pal_priority; |
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186 context->sprite_draw_list[context->sprite_draws].h_flip = (tileinfo & MAP_BIT_H_FLIP) ? 1 : 0; |
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187 } |
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188 } |
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189 if (i < width) { |
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190 context->flags |= FLAG_DOT_OFLOW; |
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191 } |
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192 context->cur_slot--; |
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193 } else { |
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194 context->flags |= FLAG_DOT_OFLOW; |
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195 } |
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196 } |
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197 } |
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198 |
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199 #define VRAM_READ 0 |
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200 #define VRAM_WRITE 1 |
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201 #define CRAM_READ 8 |
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202 #define CRAM_WRITE 3 |
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203 #define VSRAM_READ 4 |
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204 #define VSRAM_WRITE 5 |
| 75 | 205 #define DMA_START 0x20 |
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206 |
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207 void external_slot(vdp_context * context) |
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208 { |
| 75 | 209 //TODO: Figure out what happens if CD bit 4 is not set in DMA copy mode |
| 210 //TODO: Figure out what happens when CD:0-3 is not set to a write mode in DMA operations | |
| 211 //TODO: Figure out what happens if DMA gets disabled part way through a DMA fill or DMA copy | |
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212 if(context->flags & FLAG_DMA_RUN) { |
| 75 | 213 uint16_t dma_len; |
| 214 switch(context->regs[REG_DMASRC_H] & 0xC0) | |
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215 { |
| 75 | 216 //68K -> VDP |
| 217 case 0: | |
| 218 case 0x40: | |
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219 switch(context->dma_cd & 0xF) |
| 75 | 220 { |
| 221 case VRAM_WRITE: | |
| 222 if (context->flags & FLAG_DMA_PROG) { | |
| 223 context->vdpmem[context->address ^ 1] = context->dma_val; | |
| 224 context->flags &= ~FLAG_DMA_PROG; | |
| 225 } else { | |
| 226 context->dma_val = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); | |
| 227 context->vdpmem[context->address] = context->dma_val >> 8; | |
| 228 context->flags |= FLAG_DMA_PROG; | |
| 229 } | |
| 230 break; | |
| 231 case CRAM_WRITE: | |
| 232 context->cram[(context->address/2) & (CRAM_SIZE-1)] = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); | |
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233 //printf("CRAM DMA | %X set to %X from %X at %d\n", (context->address/2) & (CRAM_SIZE-1), context->cram[(context->address/2) & (CRAM_SIZE-1)], (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->cycles); |
| 75 | 234 break; |
| 235 case VSRAM_WRITE: | |
| 236 if (((context->address/2) & 63) < VSRAM_SIZE) { | |
| 237 context->vsram[(context->address/2) & 63] = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); | |
| 238 } | |
| 239 break; | |
|
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240 } |
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241 break; |
| 75 | 242 //Fill |
| 243 case 0x80: | |
|
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244 switch(context->dma_cd & 0xF) |
| 75 | 245 { |
| 246 case VRAM_WRITE: | |
| 247 //Charles MacDonald's VDP doc says that the low byte gets written first | |
| 142 | 248 context->vdpmem[context->address] = context->dma_val; |
| 249 context->dma_val = (context->dma_val << 8) | ((context->dma_val >> 8) & 0xFF); | |
| 75 | 250 break; |
| 251 case CRAM_WRITE: | |
| 252 context->cram[(context->address/2) & (CRAM_SIZE-1)] = context->dma_val; | |
| 253 break; | |
| 254 case VSRAM_WRITE: | |
| 255 if (((context->address/2) & 63) < VSRAM_SIZE) { | |
| 256 context->vsram[(context->address/2) & 63] = context->dma_val; | |
| 257 } | |
| 258 break; | |
| 259 } | |
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260 break; |
| 75 | 261 //Copy |
| 262 case 0xC0: | |
| 263 if (context->flags & FLAG_DMA_PROG) { | |
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264 switch(context->dma_cd & 0xF) |
| 75 | 265 { |
| 266 case VRAM_WRITE: | |
| 267 context->vdpmem[context->address] = context->dma_val; | |
| 268 break; | |
| 269 case CRAM_WRITE: | |
| 270 context->cram[(context->address/2) & (CRAM_SIZE-1)] = context->dma_val; | |
| 271 break; | |
| 272 case VSRAM_WRITE: | |
| 273 if (((context->address/2) & 63) < VSRAM_SIZE) { | |
| 274 context->vsram[(context->address/2) & 63] = context->dma_val; | |
| 275 } | |
| 276 break; | |
| 277 } | |
| 278 context->flags &= ~FLAG_DMA_PROG; | |
| 279 } else { | |
| 280 //I assume, that DMA copy copies from the same RAM as the destination | |
| 281 //but it's possible I'm mistaken | |
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282 switch(context->dma_cd & 0xF) |
| 75 | 283 { |
| 284 case VRAM_WRITE: | |
| 285 context->dma_val = context->vdpmem[(context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]]; | |
| 286 break; | |
| 287 case CRAM_WRITE: | |
| 288 context->dma_val = context->cram[context->regs[REG_DMASRC_L] & (CRAM_SIZE-1)]; | |
| 289 break; | |
| 290 case VSRAM_WRITE: | |
| 291 if ((context->regs[REG_DMASRC_L] & 63) < VSRAM_SIZE) { | |
| 292 context->dma_val = context->vsram[context->regs[REG_DMASRC_L] & 63]; | |
| 293 } else { | |
| 294 context->dma_val = 0; | |
| 295 } | |
| 296 break; | |
| 297 } | |
| 298 context->flags |= FLAG_DMA_PROG; | |
|
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299 } |
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300 break; |
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301 } |
| 75 | 302 if (!(context->flags & FLAG_DMA_PROG)) { |
| 303 context->address += context->regs[REG_AUTOINC]; | |
| 304 context->regs[REG_DMASRC_L] += 1; | |
| 135 | 305 if (!context->regs[REG_DMASRC_L]) { |
| 306 context->regs[REG_DMASRC_M] += 1; | |
| 307 } | |
| 75 | 308 dma_len = ((context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L]) - 1; |
| 309 context->regs[REG_DMALEN_H] = dma_len >> 8; | |
| 310 context->regs[REG_DMALEN_L] = dma_len; | |
| 311 if (!dma_len) { | |
| 312 context->flags &= ~FLAG_DMA_RUN; | |
| 313 } | |
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314 } |
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315 } else { |
| 75 | 316 fifo_entry * start = (context->fifo_end - FIFO_SIZE); |
| 317 if (context->fifo_cur != start && start->cycle <= context->cycles) { | |
| 318 if ((context->regs[REG_MODE_2] & BIT_DMA_ENABLE) && (context->cd & DMA_START)) { | |
| 319 context->flags |= FLAG_DMA_RUN; | |
| 320 context->dma_val = start->value; | |
| 138 | 321 context->address = start->address; //undo auto-increment |
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322 context->dma_cd = context->cd; |
| 75 | 323 } else { |
| 138 | 324 switch (start->cd & 0xF) |
| 75 | 325 { |
| 326 case VRAM_WRITE: | |
| 327 if (start->partial) { | |
| 328 //printf("VRAM Write: %X to %X\n", start->value, context->address ^ 1); | |
| 138 | 329 context->vdpmem[start->address ^ 1] = start->value; |
| 75 | 330 } else { |
| 331 //printf("VRAM Write High: %X to %X\n", start->value >> 8, context->address); | |
| 138 | 332 context->vdpmem[start->address] = start->value >> 8; |
| 75 | 333 start->partial = 1; |
| 334 //skip auto-increment and removal of entry from fifo | |
| 335 return; | |
| 336 } | |
| 337 break; | |
| 338 case CRAM_WRITE: | |
|
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339 //printf("CRAM Write | %X to %X\n", start->value, (start->address/2) & (CRAM_SIZE-1)); |
| 138 | 340 context->cram[(start->address/2) & (CRAM_SIZE-1)] = start->value; |
| 75 | 341 break; |
| 342 case VSRAM_WRITE: | |
| 138 | 343 if (((start->address/2) & 63) < VSRAM_SIZE) { |
| 75 | 344 //printf("VSRAM Write: %X to %X\n", start->value, context->address); |
| 138 | 345 context->vsram[(start->address/2) & 63] = start->value; |
| 75 | 346 } |
| 347 break; | |
| 348 } | |
| 138 | 349 //context->address += context->regs[REG_AUTOINC]; |
| 75 | 350 } |
| 351 fifo_entry * cur = start+1; | |
| 352 if (cur < context->fifo_cur) { | |
| 353 memmove(start, cur, sizeof(fifo_entry) * (context->fifo_cur - cur)); | |
| 354 } | |
| 355 context->fifo_cur -= 1; | |
| 356 } else { | |
| 357 context->flags |= FLAG_UNUSED_SLOT; | |
| 358 } | |
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359 } |
|
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360 } |
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361 |
| 40 | 362 #define WINDOW_RIGHT 0x80 |
| 363 #define WINDOW_DOWN 0x80 | |
| 364 | |
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365 void read_map_scroll(uint16_t column, uint16_t vsram_off, uint32_t line, uint16_t address, uint16_t hscroll_val, vdp_context * context) |
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366 { |
| 40 | 367 if (!vsram_off) { |
| 368 uint16_t left_col, right_col; | |
| 369 if (context->regs[REG_WINDOW_H] & WINDOW_RIGHT) { | |
|
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370 left_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2; |
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371 right_col = 42; |
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372 } else { |
| 40 | 373 left_col = 0; |
| 374 right_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2; | |
| 375 if (right_col) { | |
| 376 right_col += 2; | |
| 377 } | |
| 378 } | |
|
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379 uint16_t top_line, bottom_line; |
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380 if (context->regs[REG_WINDOW_V] & WINDOW_DOWN) { |
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381 top_line = (context->regs[REG_WINDOW_V] & 0x1F) * 8; |
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382 bottom_line = 241; |
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383 } else { |
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384 top_line = 0; |
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385 bottom_line = (context->regs[REG_WINDOW_V] & 0x1F) * 8; |
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386 } |
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387 if ((column >= left_col && column < right_col) || (line >= top_line && line < bottom_line)) { |
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388 uint16_t address = context->regs[REG_WINDOW] << 10; |
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389 uint16_t line_offset, offset, mask; |
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390 if (context->latched_mode & BIT_H40) { |
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391 address &= 0xF000; |
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392 line_offset = (((line) / 8) * 64 * 2) & 0xFFF; |
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393 mask = 0x7F; |
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394 |
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395 } else { |
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396 address &= 0xF800; |
|
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397 line_offset = (((line) / 8) * 32 * 2) & 0xFFF; |
|
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398 mask = 0x3F; |
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399 } |
|
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400 offset = address + line_offset + (((column - 2) * 2) & mask); |
|
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401 context->col_1 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
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402 //printf("Window | top: %d, bot: %d, left: %d, right: %d, base: %X, line: %X offset: %X, tile: %X, reg: %X\n", top_line, bottom_line, left_col, right_col, address, line_offset, offset, ((context->col_1 & 0x3FF) << 5), context->regs[REG_WINDOW]); |
|
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403 offset = address + line_offset + (((column - 1) * 2) & mask); |
|
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404 context->col_2 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
|
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405 context->v_offset = (line) & 0x7; |
|
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406 context->flags |= FLAG_WINDOW; |
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407 return; |
| 40 | 408 } |
| 409 context->flags &= ~FLAG_WINDOW; | |
| 410 } | |
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411 uint16_t vscroll; |
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412 switch(context->regs[REG_SCROLL] & 0x30) |
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413 { |
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414 case 0: |
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415 vscroll = 0xFF; |
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416 break; |
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417 case 0x10: |
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418 vscroll = 0x1FF; |
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419 break; |
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420 case 0x20: |
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421 //TODO: Verify this behavior |
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422 vscroll = 0; |
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423 break; |
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424 case 0x30: |
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425 vscroll = 0x3FF; |
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426 break; |
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427 } |
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428 vscroll &= (context->vsram[(context->regs[REG_MODE_3] & 0x4 ? column : 0) + vsram_off] + line); |
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429 context->v_offset = vscroll & 0x7; |
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430 //printf("%s | line %d, vsram: %d, vscroll: %d, v_offset: %d\n",(vsram_off ? "B" : "A"), line, context->vsram[context->regs[REG_MODE_3] & 0x4 ? column : 0], vscroll, context->v_offset); |
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431 vscroll /= 8; |
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432 uint16_t hscroll_mask; |
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433 uint16_t v_mul; |
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434 switch(context->regs[REG_SCROLL] & 0x3) |
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435 { |
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436 case 0: |
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437 hscroll_mask = 0x1F; |
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438 v_mul = 64; |
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439 break; |
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440 case 0x1: |
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441 hscroll_mask = 0x3F; |
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442 v_mul = 128; |
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443 break; |
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444 case 0x2: |
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445 //TODO: Verify this behavior |
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446 hscroll_mask = 0; |
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447 v_mul = 0; |
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448 break; |
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449 case 0x3: |
|
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450 hscroll_mask = 0x7F; |
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451 v_mul = 256; |
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452 break; |
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453 } |
| 28 | 454 uint16_t hscroll, offset; |
| 455 for (int i = 0; i < 2; i++) { | |
|
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456 hscroll = (column - 2 + i - ((hscroll_val/8) & 0xFFFE)) & hscroll_mask; |
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457 offset = address + ((vscroll * v_mul + hscroll*2) & 0x1FFF); |
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458 //printf("%s | line: %d, col: %d, x: %d, hs_mask %X, scr reg: %X, tbl addr: %X\n", (vsram_off ? "B" : "A"), line, (column-2+i), hscroll, hscroll_mask, context->regs[REG_SCROLL], offset); |
| 28 | 459 uint16_t col_val = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
| 460 if (i) { | |
| 461 context->col_2 = col_val; | |
| 462 } else { | |
| 463 context->col_1 = col_val; | |
| 464 } | |
| 465 } | |
|
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466 } |
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467 |
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468 void read_map_scroll_a(uint16_t column, uint32_t line, vdp_context * context) |
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469 { |
|
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470 read_map_scroll(column, 0, line, (context->regs[REG_SCROLL_A] & 0x38) << 10, context->hscroll_a, context); |
|
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471 } |
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472 |
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473 void read_map_scroll_b(uint16_t column, uint32_t line, vdp_context * context) |
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474 { |
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475 read_map_scroll(column, 1, line, (context->regs[REG_SCROLL_B] & 0x7) << 13, context->hscroll_b, context); |
|
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476 } |
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477 |
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478 void render_map(uint16_t col, uint8_t * tmp_buf, vdp_context * context) |
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479 { |
|
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480 uint16_t address = ((col & 0x7FF) << 5); |
|
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481 if (col & MAP_BIT_V_FLIP) { |
|
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482 address += 28 - 4 * context->v_offset; |
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483 } else { |
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484 address += 4 * context->v_offset; |
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485 } |
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486 uint16_t pal_priority = (col >> 9) & 0x70; |
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487 int32_t dir; |
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488 if (col & MAP_BIT_H_FLIP) { |
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489 tmp_buf += 7; |
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490 dir = -1; |
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491 } else { |
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492 dir = 1; |
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493 } |
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494 for (uint32_t i=0; i < 4; i++, address++) |
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495 { |
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496 *tmp_buf = pal_priority | (context->vdpmem[address] >> 4); |
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497 tmp_buf += dir; |
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498 *tmp_buf = pal_priority | (context->vdpmem[address] & 0xF); |
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499 tmp_buf += dir; |
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500 } |
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501 } |
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502 |
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503 void render_map_1(vdp_context * context) |
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504 { |
|
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505 render_map(context->col_1, context->tmp_buf_a+SCROLL_BUFFER_DRAW, context); |
|
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506 } |
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507 |
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508 void render_map_2(vdp_context * context) |
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509 { |
|
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510 render_map(context->col_2, context->tmp_buf_a+SCROLL_BUFFER_DRAW+8, context); |
|
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511 } |
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512 |
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513 void render_map_3(vdp_context * context) |
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514 { |
|
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515 render_map(context->col_1, context->tmp_buf_b+SCROLL_BUFFER_DRAW, context); |
|
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516 } |
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517 |
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518 void render_map_output(uint32_t line, int32_t col, vdp_context * context) |
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519 { |
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520 if (line >= 240) { |
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521 return; |
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522 } |
|
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523 render_map(context->col_2, context->tmp_buf_b+SCROLL_BUFFER_DRAW+8, context); |
|
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524 uint16_t *dst, *end; |
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525 uint8_t *sprite_buf, *plane_a, *plane_b; |
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526 if (col) |
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527 { |
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528 col-=2; |
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529 dst = context->framebuf + line * 320 + col * 8; |
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530 sprite_buf = context->linebuf + col * 8; |
|
43
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|
531 uint16_t a_src; |
| 40 | 532 if (context->flags & FLAG_WINDOW) { |
| 533 plane_a = context->tmp_buf_a + SCROLL_BUFFER_DRAW; | |
|
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|
534 a_src = FBUF_SRC_W; |
| 40 | 535 } else { |
| 536 plane_a = context->tmp_buf_a + SCROLL_BUFFER_DRAW - (context->hscroll_a & 0xF); | |
|
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537 a_src = FBUF_SRC_A; |
| 40 | 538 } |
|
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|
539 plane_b = context->tmp_buf_b + SCROLL_BUFFER_DRAW - (context->hscroll_b & 0xF); |
| 30 | 540 end = dst + 16; |
|
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|
541 uint16_t src; |
| 30 | 542 //printf("A | tmp_buf offset: %d\n", 8 - (context->hscroll_a & 0x7)); |
|
230
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543 |
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544 if (context->regs[REG_MODE_4] & BIT_HILIGHT) { |
|
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545 for (; dst < end; ++plane_a, ++plane_b, ++sprite_buf, ++dst) { |
|
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546 uint8_t pixel; |
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547 |
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548 src = 0; |
|
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549 uint8_t sprite_color = *sprite_buf & 0x3F; |
|
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550 if (sprite_color == 0x3E || sprite_color == 0x3F) { |
|
232
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551 if (sprite_color == 0x3F) { |
|
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552 src = FBUF_SHADOW; |
|
230
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553 } else { |
|
232
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|
554 src = FBUF_HILIGHT; |
|
230
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555 } |
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556 if (*plane_a & BUF_BIT_PRIORITY && *plane_a & 0xF) { |
|
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557 pixel = *plane_a; |
|
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558 src |= a_src; |
|
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559 } else if (*plane_b & BUF_BIT_PRIORITY && *plane_b & 0xF) { |
|
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560 pixel = *plane_b; |
|
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561 src |= FBUF_SRC_B; |
|
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|
562 } else if (*plane_a & 0xF) { |
|
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191
diff
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|
563 pixel = *plane_a; |
|
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191
diff
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|
564 src |= a_src; |
|
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191
diff
changeset
|
565 } else if (*plane_b & 0xF){ |
|
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Mike Pavone <pavone@retrodev.com>
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191
diff
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|
566 pixel = *plane_b; |
|
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Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
567 src |= FBUF_SRC_B; |
|
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Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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191
diff
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|
568 } else { |
|
d3266cee02c9
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Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
569 pixel = context->regs[REG_BG_COLOR] & 0x3F; |
|
d3266cee02c9
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191
diff
changeset
|
570 src |= FBUF_SRC_BG; |
|
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191
diff
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|
571 } |
|
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Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
572 } else { |
|
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Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
573 if (*sprite_buf & BUF_BIT_PRIORITY && *sprite_buf & 0xF) { |
|
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191
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changeset
|
574 pixel = *sprite_buf; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
575 src = FBUF_SRC_S; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
576 } else if (*plane_a & BUF_BIT_PRIORITY && *plane_a & 0xF) { |
|
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191
diff
changeset
|
577 pixel = *plane_a; |
|
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Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
578 src = a_src; |
|
d3266cee02c9
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191
diff
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|
579 } else if (*plane_b & BUF_BIT_PRIORITY && *plane_b & 0xF) { |
|
d3266cee02c9
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191
diff
changeset
|
580 pixel = *plane_b; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
581 src = FBUF_SRC_B; |
|
233
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|
582 } else { |
|
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232
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changeset
|
583 if (!(*plane_a & BUF_BIT_PRIORITY || *plane_a & BUF_BIT_PRIORITY)) { |
|
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|
584 src = FBUF_SHADOW; |
|
230
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191
diff
changeset
|
585 } |
|
233
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232
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changeset
|
586 if (*sprite_buf & 0xF) { |
|
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232
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|
587 pixel = *sprite_buf; |
|
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232
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changeset
|
588 if (*sprite_buf & 0xF == 0xE) { |
|
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232
diff
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|
589 src = FBUF_SRC_S; |
|
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232
diff
changeset
|
590 } else { |
|
9d10669f2579
Less broken implementation of shadow/highlight
Mike Pavone <pavone@retrodev.com>
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232
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changeset
|
591 src |= FBUF_SRC_S; |
|
9d10669f2579
Less broken implementation of shadow/highlight
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232
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changeset
|
592 } |
|
9d10669f2579
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diff
changeset
|
593 } else if (*plane_a & 0xF) { |
|
9d10669f2579
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parents:
232
diff
changeset
|
594 pixel = *plane_a; |
|
9d10669f2579
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232
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changeset
|
595 src |= a_src; |
|
9d10669f2579
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Mike Pavone <pavone@retrodev.com>
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232
diff
changeset
|
596 } else if (*plane_b & 0xF){ |
|
9d10669f2579
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232
diff
changeset
|
597 pixel = *plane_b; |
|
9d10669f2579
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232
diff
changeset
|
598 src |= FBUF_SRC_B; |
|
9d10669f2579
Less broken implementation of shadow/highlight
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232
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changeset
|
599 } else { |
|
9d10669f2579
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Mike Pavone <pavone@retrodev.com>
parents:
232
diff
changeset
|
600 pixel = context->regs[REG_BG_COLOR] & 0x3F; |
|
9d10669f2579
Less broken implementation of shadow/highlight
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232
diff
changeset
|
601 src |= FBUF_SRC_BG; |
|
9d10669f2579
Less broken implementation of shadow/highlight
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parents:
232
diff
changeset
|
602 } |
|
230
d3266cee02c9
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191
diff
changeset
|
603 } |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
604 } |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
605 *dst = (context->cram[pixel & 0x3F] & 0xEEE) | ((pixel & BUF_BIT_PRIORITY) ? FBUF_BIT_PRIORITY : 0) | src; |
|
20
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diff
changeset
|
606 } |
|
230
d3266cee02c9
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Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
607 } else { |
|
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Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
608 for (; dst < end; ++plane_a, ++plane_b, ++sprite_buf, ++dst) { |
|
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Implemented shadow hilight mode.
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191
diff
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|
609 uint8_t pixel; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
610 if (*sprite_buf & BUF_BIT_PRIORITY && *sprite_buf & 0xF) { |
|
d3266cee02c9
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191
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changeset
|
611 pixel = *sprite_buf; |
|
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191
diff
changeset
|
612 src = FBUF_SRC_S; |
|
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191
diff
changeset
|
613 } else if (*plane_a & BUF_BIT_PRIORITY && *plane_a & 0xF) { |
|
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191
diff
changeset
|
614 pixel = *plane_a; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
615 src = a_src; |
|
d3266cee02c9
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191
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changeset
|
616 } else if (*plane_b & BUF_BIT_PRIORITY && *plane_b & 0xF) { |
|
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191
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changeset
|
617 pixel = *plane_b; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
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changeset
|
618 src = FBUF_SRC_B; |
|
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changeset
|
619 } else if (*sprite_buf & 0xF) { |
|
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changeset
|
620 pixel = *sprite_buf; |
|
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changeset
|
621 src = FBUF_SRC_S; |
|
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191
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changeset
|
622 } else if (*plane_a & 0xF) { |
|
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|
623 pixel = *plane_a; |
|
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|
624 src = a_src; |
|
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changeset
|
625 } else if (*plane_b & 0xF){ |
|
d3266cee02c9
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191
diff
changeset
|
626 pixel = *plane_b; |
|
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191
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changeset
|
627 src = FBUF_SRC_B; |
|
d3266cee02c9
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191
diff
changeset
|
628 } else { |
|
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191
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changeset
|
629 pixel = context->regs[REG_BG_COLOR] & 0x3F; |
|
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191
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changeset
|
630 src = FBUF_SRC_BG; |
|
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191
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changeset
|
631 } |
|
291
eea3b118940d
Make sure all rendering operations mask CRAM with 0xEEE before using it
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233
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|
632 *dst = (context->cram[pixel & 0x3F] & 0xEEE) | ((pixel & BUF_BIT_PRIORITY) ? FBUF_BIT_PRIORITY : 0) | src; |
|
230
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191
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changeset
|
633 } |
|
20
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Mostly broken VDP core and savestate viewer
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diff
changeset
|
634 } |
|
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parents:
diff
changeset
|
635 } else { |
|
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Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
636 //dst = context->framebuf + line * 320; |
|
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diff
changeset
|
637 //sprite_buf = context->linebuf + col * 8; |
|
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parents:
diff
changeset
|
638 //plane_a = context->tmp_buf_a + 16 - (context->hscroll_a & 0x7); |
|
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parents:
diff
changeset
|
639 //plane_b = context->tmp_buf_b + 16 - (context->hscroll_b & 0x7); |
|
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diff
changeset
|
640 //end = dst + 8; |
|
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diff
changeset
|
641 } |
|
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parents:
diff
changeset
|
642 |
| 40 | 643 uint16_t remaining; |
| 644 if (!(context->flags & FLAG_WINDOW)) { | |
| 645 remaining = context->hscroll_a & 0xF; | |
| 646 memcpy(context->tmp_buf_a + SCROLL_BUFFER_DRAW - remaining, context->tmp_buf_a + SCROLL_BUFFER_SIZE - remaining, remaining); | |
| 647 } | |
|
39
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
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|
648 remaining = context->hscroll_b & 0xF; |
|
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
changeset
|
649 memcpy(context->tmp_buf_b + SCROLL_BUFFER_DRAW - remaining, context->tmp_buf_b + SCROLL_BUFFER_SIZE - remaining, remaining); |
|
20
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changeset
|
650 } |
|
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diff
changeset
|
651 |
|
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diff
changeset
|
652 #define COLUMN_RENDER_BLOCK(column, startcyc) \ |
|
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changeset
|
653 case startcyc:\ |
|
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diff
changeset
|
654 read_map_scroll_a(column, line, context);\ |
|
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diff
changeset
|
655 break;\ |
|
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diff
changeset
|
656 case (startcyc+1):\ |
|
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diff
changeset
|
657 external_slot(context);\ |
|
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diff
changeset
|
658 break;\ |
|
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diff
changeset
|
659 case (startcyc+2):\ |
|
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diff
changeset
|
660 render_map_1(context);\ |
|
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Mostly broken VDP core and savestate viewer
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diff
changeset
|
661 break;\ |
|
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parents:
diff
changeset
|
662 case (startcyc+3):\ |
|
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diff
changeset
|
663 render_map_2(context);\ |
|
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Mostly broken VDP core and savestate viewer
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diff
changeset
|
664 break;\ |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
665 case (startcyc+4):\ |
|
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diff
changeset
|
666 read_map_scroll_b(column, line, context);\ |
|
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diff
changeset
|
667 break;\ |
|
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parents:
diff
changeset
|
668 case (startcyc+5):\ |
|
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parents:
diff
changeset
|
669 read_sprite_x(line, context);\ |
|
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Mostly broken VDP core and savestate viewer
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diff
changeset
|
670 break;\ |
|
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parents:
diff
changeset
|
671 case (startcyc+6):\ |
|
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diff
changeset
|
672 render_map_3(context);\ |
|
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diff
changeset
|
673 break;\ |
|
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parents:
diff
changeset
|
674 case (startcyc+7):\ |
|
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parents:
diff
changeset
|
675 render_map_output(line, column, context);\ |
|
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Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
676 break; |
|
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parents:
diff
changeset
|
677 |
|
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parents:
diff
changeset
|
678 #define COLUMN_RENDER_BLOCK_REFRESH(column, startcyc) \ |
|
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parents:
diff
changeset
|
679 case startcyc:\ |
|
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parents:
diff
changeset
|
680 read_map_scroll_a(column, line, context);\ |
|
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Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
681 break;\ |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
682 case (startcyc+1):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
683 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
684 case (startcyc+2):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
685 render_map_1(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
686 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
687 case (startcyc+3):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
688 render_map_2(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
689 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
690 case (startcyc+4):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
691 read_map_scroll_b(column, line, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
692 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
693 case (startcyc+5):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
694 read_sprite_x(line, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
695 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
696 case (startcyc+6):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
697 render_map_3(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
698 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
699 case (startcyc+7):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
700 render_map_output(line, column, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
701 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
702 |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
703 void vdp_h40(uint32_t line, uint32_t linecyc, vdp_context * context) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
704 { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
705 uint16_t address; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
706 uint32_t mask; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
707 switch(linecyc) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
708 { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
709 //sprite render to line buffer starts |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
710 case 0: |
|
26
a7c2b92d8056
Fix management of context->sprite_draws so the sprite layer only draws when it should
Mike Pavone <pavone@retrodev.com>
parents:
25
diff
changeset
|
711 context->cur_slot = MAX_DRAWS-1; |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
712 memset(context->linebuf, 0, LINEBUF_SIZE); |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
713 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
714 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
715 case 1: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
716 case 2: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
717 case 3: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
718 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
719 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
720 //sprite attribute table scan starts |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
721 case 4: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
722 render_sprite_cells( context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
723 context->sprite_index = 0x80; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
724 context->slot_counter = MAX_SPRITES_LINE; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
725 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
726 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
727 case 5: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
728 case 6: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
729 case 7: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
730 case 8: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
731 case 9: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
732 case 10: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
733 case 11: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
734 case 12: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
735 case 13: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
736 case 14: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
737 case 15: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
738 case 16: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
739 case 17: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
740 case 18: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
741 case 19: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
742 case 20: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
743 //!HSYNC asserted |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
744 case 21: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
745 case 22: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
746 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
747 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
748 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
749 case 23: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
750 external_slot(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
751 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
752 case 24: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
753 case 25: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
754 case 26: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
755 case 27: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
756 case 28: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
757 case 29: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
758 case 30: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
759 case 31: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
760 case 32: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
761 case 33: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
762 case 34: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
763 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
764 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
765 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
766 case 35: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
767 address = (context->regs[REG_HSCROLL] & 0x3F) << 10; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
768 mask = 0; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
769 if (context->regs[REG_MODE_3] & 0x2) { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
770 mask |= 0xF8; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
771 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
772 if (context->regs[REG_MODE_3] & 0x1) { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
773 mask |= 0x7; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
774 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
775 line &= mask; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
776 address += line * 4; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
777 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1]; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
778 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3]; |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
779 //printf("%d: HScroll A: %d, HScroll B: %d\n", line, context->hscroll_a, context->hscroll_b); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
780 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
781 case 36: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
782 //!HSYNC high |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
783 case 37: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
784 case 38: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
785 case 39: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
786 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
787 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
788 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
789 case 40: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
790 read_map_scroll_a(0, line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
791 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
792 case 41: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
793 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
794 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
795 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
796 case 42: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
797 render_map_1(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
798 scan_sprite_table(line, context);//Just a guess |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
799 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
800 case 43: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
801 render_map_2(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
802 scan_sprite_table(line, context);//Just a guess |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
803 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
804 case 44: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
805 read_map_scroll_b(0, line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
806 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
807 case 45: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
808 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
809 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
810 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
811 case 46: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
812 render_map_3(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
813 scan_sprite_table(line, context);//Just a guess |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
814 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
815 case 47: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
816 render_map_output(line, 0, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
817 scan_sprite_table(line, context);//Just a guess |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
818 //reverse context slot counter so it counts the number of sprite slots |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
819 //filled rather than the number of available slots |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
820 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter; |
|
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
821 context->cur_slot = MAX_SPRITES_LINE-1; |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
822 context->sprite_draws = MAX_DRAWS; |
|
36
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
823 context->flags &= (~FLAG_CAN_MASK & ~FLAG_MASKED); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
824 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
825 COLUMN_RENDER_BLOCK(2, 48) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
826 COLUMN_RENDER_BLOCK(4, 56) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
827 COLUMN_RENDER_BLOCK(6, 64) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
828 COLUMN_RENDER_BLOCK_REFRESH(8, 72) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
829 COLUMN_RENDER_BLOCK(10, 80) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
830 COLUMN_RENDER_BLOCK(12, 88) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
831 COLUMN_RENDER_BLOCK(14, 96) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
832 COLUMN_RENDER_BLOCK_REFRESH(16, 104) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
833 COLUMN_RENDER_BLOCK(18, 112) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
834 COLUMN_RENDER_BLOCK(20, 120) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
835 COLUMN_RENDER_BLOCK(22, 128) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
836 COLUMN_RENDER_BLOCK_REFRESH(24, 136) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
837 COLUMN_RENDER_BLOCK(26, 144) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
838 COLUMN_RENDER_BLOCK(28, 152) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
839 COLUMN_RENDER_BLOCK(30, 160) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
840 COLUMN_RENDER_BLOCK_REFRESH(32, 168) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
841 COLUMN_RENDER_BLOCK(34, 176) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
842 COLUMN_RENDER_BLOCK(36, 184) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
843 COLUMN_RENDER_BLOCK(38, 192) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
844 COLUMN_RENDER_BLOCK_REFRESH(40, 200) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
845 case 208: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
846 case 209: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
847 external_slot(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
848 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
849 default: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
850 //leftovers from HSYNC clock change nonsense |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
851 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
852 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
853 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
854 |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
855 void vdp_h32(uint32_t line, uint32_t linecyc, vdp_context * context) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
856 { |
| 37 | 857 uint16_t address; |
| 858 uint32_t mask; | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
859 switch(linecyc) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
860 { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
861 //sprite render to line buffer starts |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
862 case 0: |
| 37 | 863 context->cur_slot = MAX_DRAWS_H32-1; |
| 864 memset(context->linebuf, 0, LINEBUF_SIZE); | |
| 865 render_sprite_cells(context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
866 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
867 case 1: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
868 case 2: |
| 37 | 869 case 3: |
| 870 render_sprite_cells(context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
871 break; |
| 37 | 872 //sprite attribute table scan starts |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
873 case 4: |
| 37 | 874 render_sprite_cells( context); |
| 875 context->sprite_index = 0x80; | |
| 876 context->slot_counter = MAX_SPRITES_LINE_H32; | |
| 877 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
878 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
879 case 5: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
880 case 6: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
881 case 7: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
882 case 8: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
883 case 9: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
884 case 10: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
885 case 11: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
886 case 12: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
887 case 13: |
| 37 | 888 render_sprite_cells(context); |
| 889 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
890 case 14: |
| 37 | 891 external_slot(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
892 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
893 case 15: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
894 case 16: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
895 case 17: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
896 case 18: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
897 case 19: |
| 37 | 898 //HSYNC start |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
899 case 20: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
900 case 21: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
901 case 22: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
902 case 23: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
903 case 24: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
904 case 25: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
905 case 26: |
| 37 | 906 render_sprite_cells(context); |
| 907 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
908 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
909 case 27: |
| 37 | 910 external_slot(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
911 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
912 case 28: |
| 37 | 913 address = (context->regs[REG_HSCROLL] & 0x3F) << 10; |
| 914 mask = 0; | |
| 915 if (context->regs[REG_MODE_3] & 0x2) { | |
| 916 mask |= 0xF8; | |
| 917 } | |
| 918 if (context->regs[REG_MODE_3] & 0x1) { | |
| 919 mask |= 0x7; | |
| 920 } | |
| 921 line &= mask; | |
| 922 address += line * 4; | |
| 923 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1]; | |
| 924 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3]; | |
| 925 //printf("%d: HScroll A: %d, HScroll B: %d\n", line, context->hscroll_a, context->hscroll_b); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
926 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
927 case 29: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
928 case 30: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
929 case 31: |
| 37 | 930 case 32: |
| 931 render_sprite_cells(context); | |
| 932 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
933 break; |
| 37 | 934 //!HSYNC high |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
935 case 33: |
| 37 | 936 read_map_scroll_a(0, line, context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
937 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
938 case 34: |
| 37 | 939 render_sprite_cells(context); |
| 940 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
941 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
942 case 35: |
| 37 | 943 render_map_1(context); |
| 944 scan_sprite_table(line, context);//Just a guess | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
945 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
946 case 36: |
| 37 | 947 render_map_2(context); |
| 948 scan_sprite_table(line, context);//Just a guess | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
949 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
950 case 37: |
| 37 | 951 read_map_scroll_b(0, line, context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
952 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
953 case 38: |
| 37 | 954 render_sprite_cells(context); |
| 955 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
956 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
957 case 39: |
| 37 | 958 render_map_3(context); |
| 959 scan_sprite_table(line, context);//Just a guess | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
960 break; |
|
f664eeb55cb4
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961 case 40: |
| 37 | 962 render_map_output(line, 0, context); |
| 963 scan_sprite_table(line, context);//Just a guess | |
| 964 //reverse context slot counter so it counts the number of sprite slots | |
| 965 //filled rather than the number of available slots | |
| 966 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter; | |
| 967 context->cur_slot = MAX_SPRITES_LINE_H32-1; | |
| 968 context->sprite_draws = MAX_DRAWS_H32; | |
| 969 context->flags &= (~FLAG_CAN_MASK & ~FLAG_MASKED); | |
|
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970 break; |
| 37 | 971 COLUMN_RENDER_BLOCK(2, 41) |
| 972 COLUMN_RENDER_BLOCK(4, 49) | |
| 973 COLUMN_RENDER_BLOCK(6, 57) | |
| 974 COLUMN_RENDER_BLOCK_REFRESH(8, 65) | |
| 975 COLUMN_RENDER_BLOCK(10, 73) | |
| 976 COLUMN_RENDER_BLOCK(12, 81) | |
| 977 COLUMN_RENDER_BLOCK(14, 89) | |
| 978 COLUMN_RENDER_BLOCK_REFRESH(16, 97) | |
| 979 COLUMN_RENDER_BLOCK(18, 105) | |
| 980 COLUMN_RENDER_BLOCK(20, 113) | |
| 981 COLUMN_RENDER_BLOCK(22, 121) | |
| 982 COLUMN_RENDER_BLOCK_REFRESH(24, 129) | |
| 983 COLUMN_RENDER_BLOCK(26, 137) | |
| 984 COLUMN_RENDER_BLOCK(28, 145) | |
| 985 COLUMN_RENDER_BLOCK(30, 153) | |
| 986 COLUMN_RENDER_BLOCK_REFRESH(32, 161) | |
|
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987 case 169: |
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988 case 170: |
| 37 | 989 external_slot(context); |
|
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990 break; |
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991 } |
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992 } |
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993 void latch_mode(vdp_context * context) |
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994 { |
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995 context->latched_mode = (context->regs[REG_MODE_4] & 0x81) | (context->regs[REG_MODE_2] & BIT_PAL); |
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996 } |
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997 |
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998 int is_refresh(vdp_context * context) |
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999 { |
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1000 uint32_t linecyc = context->cycles % MCLKS_LINE; |
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1001 if (context->latched_mode & BIT_H40) { |
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1002 linecyc = linecyc/16; |
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1003 //TODO: Figure out the exact behavior that reduces DMA slots for direct color DMA demos |
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1004 return (linecyc == 37 || linecyc == 69 || linecyc == 102 || linecyc == 133 || linecyc == 165 || linecyc == 197 || linecyc >= 210 || (linecyc < 6 && (context->flags & FLAG_DMA_RUN) && ((context->dma_cd & 0xF) == CRAM_WRITE))); |
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1005 } else { |
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1006 linecyc = linecyc/20; |
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1007 //TODO: Figure out which slots are refresh when display is off in 32-cell mode |
|
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1008 //These numbers are guesses based on H40 numbers |
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1009 return (linecyc == 24 || linecyc == 56 || linecyc == 88 || linecyc == 120 || linecyc == 152 || (linecyc < 5 && (context->flags & FLAG_DMA_RUN) && ((context->dma_cd & 0xF) == CRAM_WRITE))); |
|
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1010 //The numbers below are the refresh slots during active display |
|
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1011 //return (linecyc == 66 || linecyc == 98 || linecyc == 130 || linecyc == 162); |
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1012 } |
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1013 } |
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1014 |
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1015 void check_render_bg(vdp_context * context, int32_t line) |
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1016 { |
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1017 if (line > 0) { |
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1018 line -= 1; |
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1019 uint16_t * start = NULL, *end = NULL; |
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1020 uint32_t linecyc = (context->cycles % MCLKS_LINE); |
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1021 if (context->latched_mode & BIT_H40) { |
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1022 linecyc /= 16; |
|
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1023 if (linecyc >= 50 && linecyc < 210) { |
|
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1024 uint32_t x = (linecyc-50)*2; |
|
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1025 start = context->framebuf + line * 320 + x; |
|
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1026 end = start + 2; |
|
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1027 } |
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1028 } else { |
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1029 linecyc /= 20; |
|
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1030 if (linecyc >= 43 && linecyc < 171) { |
|
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1031 uint32_t x = (linecyc-43)*2; |
|
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1032 start = context->framebuf + line * 320 + x; |
|
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1033 end = start + 2; |
|
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1034 } |
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1035 } |
|
291
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1036 uint16_t color = (context->cram[context->regs[REG_BG_COLOR] & 0x3F] & 0xEEE); |
|
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1037 while (start != end) { |
|
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1038 *start = color; |
|
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1039 ++start; |
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1040 } |
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1041 } |
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1042 } |
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1043 |
|
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1044 void vdp_run_context(vdp_context * context, uint32_t target_cycles) |
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1045 { |
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1046 while(context->cycles < target_cycles) |
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1047 { |
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1048 uint32_t line = context->cycles / MCLKS_LINE; |
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1049 uint32_t active_lines = context->latched_mode & BIT_PAL ? PAL_ACTIVE : NTSC_ACTIVE; |
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1050 if (!line) { |
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1051 latch_mode(context); |
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1052 } |
|
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1053 uint32_t linecyc = context->cycles % MCLKS_LINE; |
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1054 if (linecyc == 0) { |
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1055 if (line <= 1 || line >= active_lines) { |
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1056 context->hint_counter = context->regs[REG_HINT]; |
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1057 } else if (context->hint_counter) { |
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1058 context->hint_counter--; |
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1059 } else { |
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1060 context->flags2 |= FLAG2_HINT_PENDING; |
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1061 context->hint_counter = context->regs[REG_HINT]; |
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1062 } |
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1063 } else if(line == active_lines) { |
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1064 uint32_t intcyc = context->latched_mode & BIT_H40 ? (148 + 40) * 4 : (132 + 28) * 5;; |
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1065 if (linecyc == intcyc) { |
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1066 context->flags2 |= FLAG2_VINT_PENDING; |
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1067 } |
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1068 } |
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1069 if (line < active_lines && context->regs[REG_MODE_2] & DISPLAY_ENABLE) { |
|
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1070 //first sort-of active line is treated as 255 internally |
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1071 //it's used for gathering sprite info for line |
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1072 line = (line - 1) & 0xFF; |
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1073 |
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1074 //Convert to slot number |
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1075 if (context->latched_mode & BIT_H40){ |
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1076 //TODO: Deal with nasty clock switching during HBLANK |
|
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1077 uint32_t clock_inc = MCLKS_LINE-linecyc < 16 ? MCLKS_LINE-linecyc : 16; |
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1078 linecyc = linecyc/16; |
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1079 vdp_h40(line, linecyc, context); |
|
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1080 context->cycles += clock_inc; |
|
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1081 } else { |
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1082 linecyc = linecyc/20; |
|
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1083 vdp_h32(line, linecyc, context); |
|
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1084 context->cycles += 20; |
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1085 } |
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1086 } else { |
|
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1087 if (!is_refresh(context)) { |
|
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|
1088 external_slot(context); |
|
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1089 } |
|
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1090 if (line < active_lines) { |
|
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|
1091 check_render_bg(context, line); |
|
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1092 } |
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1093 if (context->latched_mode & BIT_H40){ |
|
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1094 uint32_t clock_inc = MCLKS_LINE-linecyc < 16 ? MCLKS_LINE-linecyc : 16; |
|
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1095 //TODO: Deal with nasty clock switching during HBLANK |
|
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1096 context->cycles += clock_inc; |
|
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1097 } else { |
|
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|
1098 context->cycles += 20; |
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1099 } |
|
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1100 } |
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1101 } |
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1102 } |
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1103 |
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1104 uint32_t vdp_run_to_vblank(vdp_context * context) |
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1105 { |
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1106 uint32_t target_cycles = ((context->latched_mode & BIT_PAL) ? PAL_ACTIVE : NTSC_ACTIVE) * MCLKS_LINE; |
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1107 vdp_run_context(context, target_cycles); |
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1108 return context->cycles; |
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1109 } |
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1110 |
| 75 | 1111 void vdp_run_dma_done(vdp_context * context, uint32_t target_cycles) |
| 1112 { | |
| 1113 for(;;) { | |
| 1114 uint32_t dmalen = (context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L]; | |
| 1115 if (!dmalen) { | |
| 1116 dmalen = 0x10000; | |
| 1117 } | |
| 1118 uint32_t min_dma_complete = dmalen * (context->latched_mode & BIT_H40 ? 16 : 20); | |
| 1119 if ((context->regs[REG_DMASRC_H] & 0xC0) == 0xC0 || (context->cd & 0xF) == VRAM_WRITE) { | |
| 1120 //DMA copies take twice as long to complete since they require a read and a write | |
| 1121 //DMA Fills and transfers to VRAM also take twice as long as it requires 2 writes for a single word | |
| 1122 min_dma_complete *= 2; | |
| 1123 } | |
| 1124 min_dma_complete += context->cycles; | |
| 1125 if (target_cycles < min_dma_complete) { | |
| 1126 vdp_run_context(context, target_cycles); | |
| 1127 return; | |
| 1128 } else { | |
| 1129 vdp_run_context(context, min_dma_complete); | |
| 1130 if (!(context->flags & FLAG_DMA_RUN)) { | |
| 1131 return; | |
| 1132 } | |
| 1133 } | |
| 1134 } | |
| 1135 } | |
| 1136 | |
| 1137 int vdp_control_port_write(vdp_context * context, uint16_t value) | |
|
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1138 { |
|
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1139 //printf("control port write: %X\n", value); |
|
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1140 if (context->flags & FLAG_DMA_RUN) { |
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1141 return -1; |
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1142 } |
|
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1143 if (context->flags & FLAG_PENDING) { |
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1144 context->address = (context->address & 0x3FFF) | (value << 14); |
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1145 context->cd = (context->cd & 0x3) | ((value >> 2) & 0x3C); |
| 75 | 1146 context->flags &= ~FLAG_PENDING; |
|
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1147 //printf("New Address: %X, New CD: %X\n", context->address, context->cd); |
| 75 | 1148 if (context->cd & 0x20) { |
| 1149 if((context->regs[REG_DMASRC_H] & 0xC0) != 0x80) { | |
| 1150 //DMA copy or 68K -> VDP, transfer starts immediately | |
| 1151 context->flags |= FLAG_DMA_RUN; | |
|
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1152 context->dma_cd = context->cd; |
| 75 | 1153 if (!(context->regs[REG_DMASRC_H] & 0x80)) { |
| 1154 return 1; | |
| 1155 } | |
| 1156 } | |
|
63
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1157 } |
|
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1158 } else { |
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1159 if ((value & 0xC000) == 0x8000) { |
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1160 //Register write |
|
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1161 uint8_t reg = (value >> 8) & 0x1F; |
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1162 if (reg < VDP_REGS) { |
|
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1163 //printf("register %d set to %X\n", reg, value & 0xFF); |
|
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1164 context->regs[reg] = value; |
|
151
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1165 if (reg == REG_MODE_2) { |
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1166 //printf("Display is now %s\n", (context->regs[REG_MODE_2] & DISPLAY_ENABLE) ? "enabled" : "disabled"); |
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1167 } |
|
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1168 } |
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1169 } else { |
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1170 context->flags |= FLAG_PENDING; |
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1171 context->address = (context->address &0xC000) | (value & 0x3FFF); |
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1172 context->cd = (context->cd &0x3C) | (value >> 14); |
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1173 } |
|
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1174 } |
| 75 | 1175 return 0; |
|
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1176 } |
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1177 |
|
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1178 int vdp_data_port_write(vdp_context * context, uint16_t value) |
|
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1179 { |
|
58
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|
1180 //printf("data port write: %X\n", value); |
|
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1181 if (context->flags & FLAG_DMA_RUN) { |
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|
1182 return -1; |
|
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1183 } |
|
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1184 if (!(context->cd & 1)) { |
|
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1185 //ignore writes when cd is configured for read |
|
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1186 return 0; |
|
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1187 } |
|
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|
1188 context->flags &= ~FLAG_PENDING; |
|
109
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1189 /*if (context->fifo_cur == context->fifo_end) { |
|
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1190 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles); |
|
109
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1191 }*/ |
|
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1192 while (context->fifo_cur == context->fifo_end) { |
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1193 vdp_run_context(context, context->cycles + ((context->latched_mode & BIT_H40) ? 16 : 20)); |
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1194 } |
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|
1195 context->fifo_cur->cycle = context->cycles; |
| 138 | 1196 context->fifo_cur->address = context->address; |
|
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|
1197 context->fifo_cur->value = value; |
| 138 | 1198 context->fifo_cur->cd = context->cd; |
|
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1199 context->fifo_cur->partial = 0; |
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|
1200 context->fifo_cur++; |
| 138 | 1201 context->address += context->regs[REG_AUTOINC]; |
|
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1202 return 0; |
|
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1203 } |
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1204 |
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|
1205 uint16_t vdp_control_port_read(vdp_context * context) |
|
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1206 { |
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|
1207 context->flags &= ~FLAG_PENDING; |
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1208 uint16_t value = 0x3400; |
|
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1209 if (context->fifo_cur == (context->fifo_end - FIFO_SIZE)) { |
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1210 value |= 0x200; |
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1211 } |
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1212 if (context->fifo_cur == context->fifo_end) { |
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1213 value |= 0x100; |
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1214 } |
|
317
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1215 if (context->flags2 & FLAG2_VINT_PENDING) { |
|
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1216 value |- 0x80; |
|
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1217 } |
|
318
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1218 uint32_t line= context->cycles / MCLKS_LINE; |
|
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1219 uint32_t linecyc = context->cycles % MCLKS_LINE; |
|
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1220 if (line >= (context->latched_mode & BIT_PAL ? PAL_ACTIVE : NTSC_ACTIVE)) { |
|
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1221 value |= 0x8; |
|
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1222 } |
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1223 if (linecyc < (context->latched_mode & BIT_H40 ? (148 + 61) * 4 : ( + 46) * 5)) { |
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1224 value |= 0x4; |
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1225 } |
|
149
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|
1226 if (context->flags & FLAG_DMA_RUN) { |
|
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1227 value |= 0x2; |
| 75 | 1228 } |
|
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1229 if (context->latched_mode & BIT_PAL) {//Not sure about this, need to verify |
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1230 value |= 0x1; |
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|
1231 } |
|
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1232 //TODO: Sprite overflow, sprite collision, odd frame flag |
|
54
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1233 return value; |
|
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1234 } |
|
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1235 |
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1236 uint16_t vdp_data_port_read(vdp_context * context) |
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1237 { |
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1238 context->flags &= ~FLAG_PENDING; |
| 138 | 1239 if (context->cd & 1) { |
|
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1240 return 0; |
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1241 } |
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1242 //Not sure if the FIFO should be drained before processing a read or not, but it would make sense |
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1243 context->flags &= ~FLAG_UNUSED_SLOT; |
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1244 while (!(context->flags & FLAG_UNUSED_SLOT)) { |
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1245 vdp_run_context(context, context->cycles + ((context->latched_mode & BIT_H40) ? 16 : 20)); |
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1246 } |
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1247 uint16_t value = 0; |
| 138 | 1248 switch (context->cd & 0xF) |
|
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1249 { |
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1250 case VRAM_READ: |
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1251 value = context->vdpmem[context->address] << 8; |
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1252 context->flags &= ~FLAG_UNUSED_SLOT; |
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1253 while (!(context->flags & FLAG_UNUSED_SLOT)) { |
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1254 vdp_run_context(context, context->cycles + ((context->latched_mode & BIT_H40) ? 16 : 20)); |
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1255 } |
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1256 value |= context->vdpmem[context->address ^ 1]; |
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|
1257 break; |
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1258 case CRAM_READ: |
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1259 value = context->cram[(context->address/2) & (CRAM_SIZE-1)]; |
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1260 break; |
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1261 case VSRAM_READ: |
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1262 if (((context->address / 2) & 63) < VSRAM_SIZE) { |
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1263 value = context->vsram[context->address & 63]; |
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1264 } |
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|
1265 break; |
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|
1266 } |
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1267 context->address += context->regs[REG_AUTOINC]; |
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|
1268 return value; |
|
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|
1269 } |
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1270 |
| 137 | 1271 uint16_t vdp_hv_counter_read(vdp_context * context) |
| 1272 { | |
| 1273 uint32_t line= context->cycles / MCLKS_LINE; | |
| 1274 if (!line) { | |
| 1275 line = 0xFF; | |
| 1276 } else { | |
| 1277 line--; | |
| 1278 if (line > 0xEA) { | |
| 1279 line = (line + 0xFA) & 0xFF; | |
| 1280 } | |
| 1281 } | |
| 1282 uint32_t linecyc = context->cycles % MCLKS_LINE; | |
| 1283 if (context->latched_mode & BIT_H40) { | |
| 1284 linecyc /= 8; | |
| 1285 if (linecyc >= 86) { | |
| 1286 linecyc -= 86; | |
| 1287 } else { | |
| 1288 linecyc += 334; | |
| 1289 } | |
| 1290 if (linecyc > 0x16C) { | |
| 1291 linecyc += 92; | |
| 1292 } | |
| 1293 } else { | |
| 1294 linecyc /= 10; | |
| 1295 if (linecyc >= 74) { | |
| 1296 linecyc -= 74; | |
| 1297 } else { | |
| 1298 linecyc += 268; | |
| 1299 } | |
| 1300 if (linecyc > 0x127) { | |
| 1301 linecyc += 170; | |
| 1302 } | |
| 1303 } | |
| 1304 linecyc &= 0xFF; | |
| 1305 return (line << 8) | linecyc; | |
| 1306 } | |
| 1307 | |
|
65
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1308 void vdp_adjust_cycles(vdp_context * context, uint32_t deduction) |
|
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|
1309 { |
|
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|
1310 context->cycles -= deduction; |
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|
1311 for(fifo_entry * start = (context->fifo_end - FIFO_SIZE); start < context->fifo_cur; start++) { |
|
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|
1312 if (start->cycle >= deduction) { |
|
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|
1313 start->cycle -= deduction; |
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1314 } else { |
|
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|
1315 start->cycle = 0; |
|
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|
1316 } |
|
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1317 } |
|
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|
1318 } |
|
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1319 |
|
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1320 uint32_t vdp_next_hint(vdp_context * context) |
|
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1321 { |
|
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1322 if (!(context->regs[REG_MODE_1] & 0x10)) { |
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1323 return 0xFFFFFFFF; |
|
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1324 } |
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1325 if (context->flags2 & FLAG2_HINT_PENDING) { |
|
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1326 return context->cycles; |
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1327 } |
|
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1328 uint32_t active_lines = context->latched_mode & BIT_PAL ? PAL_ACTIVE : NTSC_ACTIVE; |
|
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1329 uint32_t line = context->cycles / MCLKS_LINE; |
|
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|
1330 if (line >= active_lines) { |
|
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|
1331 return 0xFFFFFFFF; |
|
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|
1332 } |
|
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|
1333 uint32_t linecyc = context->cycles % MCLKS_LINE; |
|
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1334 uint32_t hcycle = context->cycles + context->hint_counter * MCLKS_LINE + MCLKS_LINE - linecyc; |
|
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|
1335 if (!line) { |
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|
1336 hcycle += MCLKS_LINE; |
|
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|
1337 } |
|
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|
1338 return hcycle; |
|
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|
1339 } |
|
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|
1340 |
|
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|
1341 uint32_t vdp_next_vint(vdp_context * context) |
|
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|
1342 { |
|
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|
1343 if (!(context->regs[REG_MODE_2] & 0x20)) { |
|
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1344 return 0xFFFFFFFF; |
|
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|
1345 } |
|
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|
1346 if (context->flags2 & FLAG2_VINT_PENDING) { |
|
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1347 return context->cycles; |
|
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|
1348 } |
|
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1349 uint32_t active_lines = context->latched_mode & BIT_PAL ? PAL_ACTIVE : NTSC_ACTIVE; |
|
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|
1350 uint32_t vcycle = MCLKS_LINE * active_lines; |
|
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|
1351 if (context->latched_mode & BIT_H40) { |
|
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|
1352 vcycle += (148 + 40) * 4; |
|
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|
1353 } else { |
|
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|
1354 vcycle += (132 + 28) * 5; |
|
e5e8b48ad157
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1355 } |
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1356 if (vcycle < context->cycles) { |
|
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1357 return 0xFFFFFFFF; |
|
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1358 } |
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1359 return vcycle; |
|
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1360 } |
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1361 |
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291
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|
1362 void vdp_int_ack(vdp_context * context, uint16_t int_num) |
|
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1363 { |
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1364 if (int_num == 6) { |
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|
1365 context->flags2 &= ~FLAG2_VINT_PENDING; |
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1366 } else if(int_num ==4) { |
|
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291
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1367 context->flags2 &= ~FLAG2_HINT_PENDING; |
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1368 } |
|
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1369 } |
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|
1370 |
|
20
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|
1371 #define GST_VDP_REGS 0xFA |
|
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diff
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|
1372 #define GST_VDP_MEM 0x12478 |
|
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diff
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|
1373 |
|
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diff
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|
1374 void vdp_load_savestate(vdp_context * context, FILE * state_file) |
|
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|
1375 { |
|
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|
1376 uint8_t tmp_buf[CRAM_SIZE*2]; |
|
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|
1377 fseek(state_file, GST_VDP_REGS, SEEK_SET); |
|
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|
1378 fread(context->regs, 1, VDP_REGS, state_file); |
|
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|
1379 latch_mode(context); |
|
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diff
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|
1380 fread(tmp_buf, 1, sizeof(tmp_buf), state_file); |
|
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diff
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|
1381 for (int i = 0; i < CRAM_SIZE; i++) { |
|
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diff
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|
1382 context->cram[i] = (tmp_buf[i*2+1] << 8) | tmp_buf[i*2]; |
|
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|
1383 } |
|
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|
1384 fread(tmp_buf, 2, VSRAM_SIZE, state_file); |
|
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diff
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|
1385 for (int i = 0; i < VSRAM_SIZE; i++) { |
|
23
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diff
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|
1386 context->vsram[i] = (tmp_buf[i*2+1] << 8) | tmp_buf[i*2]; |
|
20
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|
1387 } |
|
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|
1388 fseek(state_file, GST_VDP_MEM, SEEK_SET); |
|
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diff
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|
1389 fread(context->vdpmem, 1, VRAM_SIZE, state_file); |
|
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|
1390 } |
|
54
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|
1391 |
|
56
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|
1392 void vdp_save_state(vdp_context * context, FILE * outfile) |
|
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|
1393 { |
|
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|
1394 uint8_t tmp_buf[CRAM_SIZE*2]; |
|
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|
1395 fseek(outfile, GST_VDP_REGS, SEEK_SET); |
|
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|
1396 fwrite(context->regs, 1, VDP_REGS, outfile); |
|
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|
1397 for (int i = 0; i < CRAM_SIZE; i++) { |
|
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|
1398 tmp_buf[i*2] = context->cram[i]; |
|
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|
1399 tmp_buf[i*2+1] = context->cram[i] >> 8; |
|
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|
1400 } |
|
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|
1401 fwrite(tmp_buf, 1, sizeof(tmp_buf), outfile); |
|
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|
1402 for (int i = 0; i < VSRAM_SIZE; i++) { |
|
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|
1403 tmp_buf[i*2] = context->vsram[i]; |
|
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|
1404 tmp_buf[i*2+1] = context->vsram[i] >> 8; |
|
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|
1405 } |
|
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diff
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|
1406 fwrite(tmp_buf, 2, VSRAM_SIZE, outfile); |
|
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|
1407 fseek(outfile, GST_VDP_MEM, SEEK_SET); |
|
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|
1408 fwrite(context->vdpmem, 1, VRAM_SIZE, outfile); |
|
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diff
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|
1409 } |
|
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diff
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|
1410 |