annotate runtime.S @ 541:a59ac6b4b5b5

Get rid of the native stack option the 68K core. Trying to make it work with code that messes with the stack is not worth the trouble.
author Michael Pavone <pavone@retrodev.com>
date Sat, 15 Feb 2014 22:35:18 -0800
parents 4ca826862174
children 5d57fd8b44f8
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
17
de0085d4ea40 Add asssembly runtime code stub
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
2 .global handle_cycle_limit
150
3e68e517cc01 Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
3 .global do_sync
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
4 handle_cycle_limit:
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
5 cmp 84(%rsi), %eax
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
6 jb skip_sync
150
3e68e517cc01 Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
Mike Pavone <pavone@retrodev.com>
parents: 149
diff changeset
7 do_sync:
343
467bfa17004a Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents: 321
diff changeset
8 push %rcx
467bfa17004a Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents: 321
diff changeset
9 push %rdi
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 53
diff changeset
10 call m68k_save_context
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 53
diff changeset
11 mov %rsi, %rdi
198
209a37eed3e7 Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents: 194
diff changeset
12 xor %esi, %esi
485
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
13 test $8, %esp
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
14 jnz adjust_rsp
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 53
diff changeset
15 call sync_components
485
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
16 jmp done_adjust
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
17 adjust_rsp:
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
18 sub $8, %rsp
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
19 call sync_components
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
20 add $8, %rsp
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
21 done_adjust:
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 53
diff changeset
22 mov %rax, %rsi
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 53
diff changeset
23 call m68k_load_context
343
467bfa17004a Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents: 321
diff changeset
24 pop %rdi
467bfa17004a Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents: 321
diff changeset
25 pop %rcx
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
26 skip_sync:
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
27 ret
485
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
28
321
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
29 sr_msg_int:
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
30 .asciz "SR set to $%X due to interrupt\n"
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
31 debug_print_sr_int:
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
32 call m68k_save_context
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
33 push %rsi
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
34 lea sr_msg_int(%rip), %rdi
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
35 movzxb 5(%rsi), %rsi
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
36 xor %rax, %rax
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
37 call printf
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
38 pop %rsi
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
39 call m68k_load_context
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
40 ret
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
41
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
42 sr_msg:
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
43 .asciz "SR set to $%X\n"
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
44 .global debug_print_sr
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
45 debug_print_sr:
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
46 call m68k_save_context
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
47 push %rsi
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
48 lea sr_msg(%rip), %rdi
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
49 movzxb 5(%rsi), %rsi
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
50 xor %rax, %rax
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
51 call printf
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
52 pop %rsi
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
53 call m68k_load_context
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
54 ret
176
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
55
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
56 invalid_msg:
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
57 .asciz "Invalid instruction at %X\n"
485
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
58
176
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
59 .global m68k_invalid
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
60 m68k_invalid:
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
61 lea invalid_msg(%rip), %rdi
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
62 mov %ecx, %esi
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
63 xor %rax, %rax
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
64 call printf
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
65 mov $1, %rdi
e2918b5208eb Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents: 175
diff changeset
66 call exit
194
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
67
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
68 .global bcd_add
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
69 bcd_add:
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
70 xchg %rax, %rdi
485
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
71
194
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
72 mov %cl, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
73 mov %al, %ah
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
74 and $0xF, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
75 and $0xF, %ah
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
76 and $0xF0, %cl
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
77 and $0xF0, %al
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
78 add %ah, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
79 cmp $10, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
80 jb no_adjust
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
81 add $6, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
82 no_adjust:
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
83 add %ch, %al
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
84 add %al, %cl
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
85 mov $0, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
86 jc def_adjust
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
87 cmp $0xA0, %cl
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
88 jb no_adjust_h
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
89 def_adjust:
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
90 add $0x60, %cl
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
91 mov $1, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
92 no_adjust_h:
485
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
93
194
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
94 mov %rdi, %rax
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
95 ret
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
96
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
97 .global bcd_sub
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
98 bcd_sub:
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
99 xchg %rax, %rdi
485
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
100
194
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
101 mov %cl, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
102 mov %al, %ah
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
103 and $0xF, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
104 and $0xF, %ah
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
105 and $0xF0, %cl
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
106 and $0xF0, %al
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
107 sub %ah, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
108 cmp $10, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
109 jb no_adjusts
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
110 sub $6, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
111 no_adjusts:
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
112 add %ch, %cl
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
113 sub %al, %cl
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
114 mov $0, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
115 jc def_adjusts
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
116 cmp $0xA0, %cl
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
117 jb no_adjust_hs
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
118 def_adjusts:
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
119 sub $0x60, %cl
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
120 mov $1, %ch
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
121 no_adjust_hs:
485
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
122
194
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
123 mov %rdi, %rax
811163790e6c Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
124 ret
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
125
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
126 .global get_sr
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
127 get_sr:
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
128 mov 5(%rsi), %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
129 shl $8, %cx
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
130 mov (%rsi), %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
131 shl $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
132 or %bl, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
133 shl $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
134 or %dl, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
135 shl $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
136 or %bh, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
137 shl $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
138 or %dh, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
139 ret
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
140
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
141 .global set_sr
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
142 set_sr:
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
143 mov %cl, %dh
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
144 and $1, %dh
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
145 shr $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
146 mov %cl, %bh
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
147 and $1, %bh
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
148 shr $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
149 mov %cl, %dl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
150 and $1, %dl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
151 shr $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
152 mov %cl, %bl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
153 and $1, %bl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
154 shr $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
155 and $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
156 mov %cl, (%rsi)
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
157 shr $8, %cx
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
158 mov %cl, 5(%rsi)
321
146c87616b05 Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents: 320
diff changeset
159 /* call debug_print_sr */
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
160 ret
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
161
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
162 .global set_ccr
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
163 set_ccr:
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
164 mov %cl, %dh
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
165 and $1, %dh
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
166 shr $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
167 mov %cl, %bh
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
168 and $1, %bh
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
169 shr $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
170 mov %cl, %dl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
171 and $1, %dl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
172 shr $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
173 mov %cl, %bl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
174 and $1, %bl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
175 shr $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
176 and $1, %cl
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
177 mov %cl, (%rsi)
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 53
diff changeset
178 ret
485
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
179
86
3d3966c254b2 RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents: 85
diff changeset
180 .global m68k_native_addr_and_sync
3d3966c254b2 RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents: 85
diff changeset
181 m68k_native_addr_and_sync:
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
182 call m68k_save_context
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
183 push %rcx
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
184 mov %rsi, %rdi
198
209a37eed3e7 Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents: 194
diff changeset
185 xor %esi, %esi
485
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
186 test $8, %rsp
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
187 jnz adjust_rsp_na
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
188 call sync_components
485
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
189 jmp no_adjust_rsp_na
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
190 adjust_rsp_na:
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
191 sub $8, %rsp
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
192 call sync_components
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
193 add $8, %rsp
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
194 no_adjust_rsp_na:
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
195 pop %rsi
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
196 push %rax
95
dd3c680c618c Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents: 87
diff changeset
197 mov %rax, %rdi
dd3c680c618c Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents: 87
diff changeset
198 call get_native_address_trans
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
199 mov %rax, %rcx
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
200 pop %rsi
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
201 call m68k_load_context
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
202 ret
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
203
86
3d3966c254b2 RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents: 85
diff changeset
204 .global m68k_native_addr
3d3966c254b2 RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents: 85
diff changeset
205 m68k_native_addr:
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
206 call m68k_save_context
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
207 push %rsi
95
dd3c680c618c Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents: 87
diff changeset
208 mov %rsi, %rdi
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
209 mov %ecx, %esi
95
dd3c680c618c Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents: 87
diff changeset
210 call get_native_address_trans
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
211 mov %rax, %rcx
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
212 pop %rsi
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
213 call m68k_load_context
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 72
diff changeset
214 ret
485
b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents: 423
diff changeset
215
193
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
216 .global m68k_retrans_stub
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
217 m68k_retrans_stub:
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
218 call m68k_save_context
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
219 push %rsi
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
220 call m68k_retranslate_inst
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
221 pop %rsi
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
222 mov %rax, %rcx
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
223 call m68k_load_context
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 176
diff changeset
224 jmp *%rcx
53
44e661913a51 Add preliminary support for JMP
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
225
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
226 .global m68k_save_context
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
227 m68k_save_context:
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
228 mov %bl, 1(%rsi) /* N Flag */
207
c82f65a87a53 Fix overflow flag on ASL
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
229 mov %dl, 2(%rsi) /* Z flag */
c82f65a87a53 Fix overflow flag on ASL
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
230 mov %bh, 3(%rsi) /* V flag */
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
231 mov %dh, 4(%rsi) /* C flag */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
232 mov %r10d, 8(%rsi) /* d0 */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
233 mov %r11d, 12(%rsi) /* d1 */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
234 mov %r12d, 16(%rsi) /* d2 */
423
8e136187c0e0 Use the registers that were freed up by the memory map function changes
Mike Pavone <pavone@retrodev.com>
parents: 348
diff changeset
235 mov %r8d, 20(%rsi) /* d3 */
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
236 mov %r13d, 40(%rsi) /* a0 */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
237 mov %r14d, 44(%rsi) /* a1 */
423
8e136187c0e0 Use the registers that were freed up by the memory map function changes
Mike Pavone <pavone@retrodev.com>
parents: 348
diff changeset
238 mov %r9d, 48(%rsi) /* a2 */
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
239 mov %r15d, 68(%rsi) /* a7 */
72
7935cd64d5c8 Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents: 66
diff changeset
240 mov %eax, 80(%rsi) /* current cycle count */
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
241 ret
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
242
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
243 .global m68k_load_context
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
244 m68k_load_context:
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
245 mov 1(%rsi), %bl /* N Flag */
207
c82f65a87a53 Fix overflow flag on ASL
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
246 mov 2(%rsi), %dl /* Z flag */
c82f65a87a53 Fix overflow flag on ASL
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
247 mov 3(%rsi), %bh /* V flag */
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
248 mov 4(%rsi), %dh /* C flag */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
249 mov 8(%rsi), %r10d /* d0 */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
250 mov 12(%rsi), %r11d /* d1 */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
251 mov 16(%rsi), %r12d /* d2 */
423
8e136187c0e0 Use the registers that were freed up by the memory map function changes
Mike Pavone <pavone@retrodev.com>
parents: 348
diff changeset
252 mov 20(%rsi), %r8d /* d3 */
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
253 mov 40(%rsi), %r13d /* a0 */
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
254 mov 44(%rsi), %r14d /* a1 */
423
8e136187c0e0 Use the registers that were freed up by the memory map function changes
Mike Pavone <pavone@retrodev.com>
parents: 348
diff changeset
255 mov 48(%rsi), %r9d /* a2 */
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
256 mov 68(%rsi), %r15d /* a7 */
72
7935cd64d5c8 Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents: 66
diff changeset
257 mov 76(%rsi), %ebp /* target cycle count */
7935cd64d5c8 Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents: 66
diff changeset
258 mov 80(%rsi), %eax /* current cycle count */
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
259 ret
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 17
diff changeset
260