Mercurial > repos > blastem
annotate ym2612.c @ 437:afbea09d7fb4
Restore one of the VDP debugging modes
| author | Mike Pavone <pavone@retrodev.com> |
|---|---|
| date | Mon, 15 Jul 2013 23:07:45 -0700 |
| parents | 7e8e179116af |
| children | e85a107e6ec0 |
| rev | line source |
|---|---|
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1 #include <string.h> |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
2 #include <math.h> |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
3 #include <stdio.h> |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
4 #include <stdlib.h> |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
5 #include "ym2612.h" |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
6 #include "render.h" |
|
407
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
7 #include "wave.h" |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
8 |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
9 //#define DO_DEBUG_PRINT |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
10 #ifdef DO_DEBUG_PRINT |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
11 #define dfprintf fprintf |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
12 #define dfopen(var, fname, mode) var=fopen(fname, mode) |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
13 #else |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
14 #define dfprintf |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
15 #define dfopen(var, fname, mode) |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
16 #endif |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
17 |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
18 #define BUSY_CYCLES 17 |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
19 #define OP_UPDATE_PERIOD 144 |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
20 |
| 362 | 21 enum { |
|
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
22 REG_LFO = 0x22, |
| 362 | 23 REG_TIMERA_HIGH = 0x24, |
| 24 REG_TIMERA_LOW, | |
| 25 REG_TIMERB, | |
| 26 REG_TIME_CTRL, | |
| 27 REG_KEY_ONOFF, | |
| 28 REG_DAC = 0x2A, | |
| 29 REG_DAC_ENABLE, | |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
30 |
| 362 | 31 REG_DETUNE_MULT = 0x30, |
| 32 REG_TOTAL_LEVEL = 0x40, | |
| 33 REG_ATTACK_KS = 0x50, | |
| 34 REG_DECAY_AM = 0x60, | |
| 35 REG_SUSTAIN_RATE = 0x70, | |
| 36 REG_S_LVL_R_RATE = 0x80, | |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
37 |
| 362 | 38 REG_FNUM_LOW = 0xA0, |
| 39 REG_BLOCK_FNUM_H = 0xA4, | |
| 40 REG_FNUM_LOW_CH3 = 0xA8, | |
| 41 REG_BLOCK_FN_CH3 = 0xAC, | |
| 42 REG_ALG_FEEDBACK = 0xB0, | |
| 43 REG_LR_AMS_PMS = 0xB4 | |
| 44 }; | |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
45 |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
46 #define BIT_TIMERA_ENABLE 0x1 |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
47 #define BIT_TIMERB_ENABLE 0x2 |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
48 #define BIT_TIMERA_OVEREN 0x4 |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
49 #define BIT_TIMERB_OVEREN 0x8 |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
50 #define BIT_TIMERA_RESET 0x10 |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
51 #define BIT_TIMERB_RESET 0x20 |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
52 |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
53 #define BIT_STATUS_TIMERA 0x1 |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
54 #define BIT_STATUS_TIMERB 0x2 |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
55 |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
56 enum { |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
57 PHASE_ATTACK, |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
58 PHASE_DECAY, |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
59 PHASE_SUSTAIN, |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
60 PHASE_RELEASE |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
61 }; |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
62 |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
63 uint8_t did_tbl_init = 0; |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
64 //According to Nemesis, real hardware only uses a 256 entry quarter sine table; however, |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
65 //memory is cheap so using a half sine table will probably save some cycles |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
66 //a full sine table would be nice, but negative numbers don't get along with log2 |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
67 #define SINE_TABLE_SIZE 512 |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
68 uint16_t sine_table[SINE_TABLE_SIZE]; |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
69 //Similar deal here with the power table for log -> linear conversion |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
70 //According to Nemesis, real hardware only uses a 256 entry table for the fractional part |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
71 //and uses the whole part as a shift amount. |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
72 #define POW_TABLE_SIZE (1 << 13) |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
73 uint16_t pow_table[POW_TABLE_SIZE]; |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
74 |
| 362 | 75 uint16_t rate_table_base[] = { |
| 76 //main portion | |
| 77 0,1,0,1,0,1,0,1, | |
| 78 0,1,0,1,1,1,0,1, | |
| 79 0,1,1,1,0,1,1,1, | |
| 80 0,1,1,1,1,1,1,1, | |
| 81 //top end | |
| 82 1,1,1,1,1,1,1,1, | |
| 83 1,1,1,2,1,1,1,2, | |
| 84 1,2,1,2,1,2,1,2, | |
| 85 1,2,2,2,1,2,2,2, | |
| 86 }; | |
| 87 | |
|
365
3ba3b6656fff
Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents:
364
diff
changeset
|
88 uint16_t rate_table[64*8]; |
| 362 | 89 |
|
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
90 uint8_t lfo_timer_values[] = {108, 77, 71, 67, 62, 44, 8, 5}; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
91 uint8_t lfo_pm_base[][8] = { |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
92 {0, 0, 0, 0, 0, 0, 0, 0}, |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
93 {0, 0, 0, 0, 4, 4, 4, 4}, |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
94 {0, 0, 0, 4, 4, 4, 8, 8}, |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
95 {0, 0, 4, 4, 8, 8, 0xc, 0xc}, |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
96 {0, 0, 4, 8, 8, 8, 0xc,0x10}, |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
97 {0, 0, 8, 0xc,0x10,0x10,0x14,0x18}, |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
98 {0, 0,0x10,0x18,0x20,0x20,0x28,0x30}, |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
99 {0, 0,0x20,0x30,0x40,0x40,0x50,0x60} |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
100 }; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
101 int16_t lfo_pm_table[128 * 32 * 8]; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
102 |
| 362 | 103 #define MAX_ENVELOPE 0xFFC |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
104 #define YM_DIVIDER 2 |
| 374 | 105 #define CYCLE_NEVER 0xFFFFFFFF |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
106 |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
107 uint16_t round_fixed_point(double value, int dec_bits) |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
108 { |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
109 return value * (1 << dec_bits) + 0.5; |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
110 } |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
111 |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
112 FILE * debug_file = NULL; |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
113 uint32_t first_key_on=0; |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
114 |
|
407
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
115 ym2612_context * log_context = NULL; |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
116 |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
117 void ym_finalize_log() |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
118 { |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
119 for (int i = 0; i < NUM_CHANNELS; i++) { |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
120 if (log_context->channels[i].logfile) { |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
121 wave_finalize(log_context->channels[i].logfile); |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
122 } |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
123 } |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
124 } |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
125 |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
126 void ym_init(ym2612_context * context, uint32_t sample_rate, uint32_t master_clock, uint32_t clock_div, uint32_t sample_limit, uint32_t options) |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
127 { |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
128 dfopen(debug_file, "ym_debug.txt", "w"); |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
129 memset(context, 0, sizeof(*context)); |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
130 context->audio_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
|
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
131 context->back_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
|
380
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents:
379
diff
changeset
|
132 context->buffer_inc = ((double)sample_rate / (double)master_clock) * clock_div * 6; |
|
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents:
379
diff
changeset
|
133 context->clock_inc = clock_div * 6; |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
134 context->sample_limit = sample_limit*2; |
| 374 | 135 context->write_cycle = CYCLE_NEVER; |
| 362 | 136 for (int i = 0; i < NUM_OPERATORS; i++) { |
| 137 context->operators[i].envelope = MAX_ENVELOPE; | |
| 138 context->operators[i].env_phase = PHASE_RELEASE; | |
| 139 } | |
|
369
fc820ab1394b
Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents:
365
diff
changeset
|
140 //some games seem to expect that the LR flags start out as 1 |
|
fc820ab1394b
Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents:
365
diff
changeset
|
141 for (int i = 0; i < NUM_CHANNELS; i++) { |
|
fc820ab1394b
Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents:
365
diff
changeset
|
142 context->channels[i].lr = 0xC0; |
|
407
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
143 if (options & YM_OPT_WAVE_LOG) { |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
144 char fname[64]; |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
145 sprintf(fname, "ym_channel_%d.wav", i); |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
146 FILE * f = context->channels[i].logfile = fopen(fname, "wb"); |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
147 if (!f) { |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
148 fprintf(stderr, "Failed to open WAVE log file %s for writing\n", fname); |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
149 continue; |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
150 } |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
151 if (!wave_init(f, sample_rate, 16, 1)) { |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
152 fclose(f); |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
153 context->channels[i].logfile = NULL; |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
154 } |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
155 } |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
156 } |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
157 if (options & YM_OPT_WAVE_LOG) { |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
158 log_context = context; |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
159 atexit(ym_finalize_log); |
|
369
fc820ab1394b
Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents:
365
diff
changeset
|
160 } |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
161 if (!did_tbl_init) { |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
162 //populate sine table |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
163 for (int32_t i = 0; i < 512; i++) { |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
164 double sine = sin( ((double)(i*2+1) / SINE_TABLE_SIZE) * M_PI_2 ); |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
165 |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
166 //table stores 4.8 fixed pointed representation of the base 2 log |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
167 sine_table[i] = round_fixed_point(-log2(sine), 8); |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
168 } |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
169 //populate power table |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
170 for (int32_t i = 0; i < POW_TABLE_SIZE; i++) { |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
171 double linear = pow(2, -((double)((i & 0xFF)+1) / 256.0)); |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
172 int32_t tmp = round_fixed_point(linear, 11); |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
173 int32_t shift = (i >> 8) - 2; |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
174 if (shift < 0) { |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
175 tmp <<= 0-shift; |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
176 } else { |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
177 tmp >>= shift; |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
178 } |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
179 pow_table[i] = tmp; |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
180 } |
| 362 | 181 //populate envelope generator rate table, from small base table |
| 182 for (int rate = 0; rate < 64; rate++) { | |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
183 for (int cycle = 0; cycle < 8; cycle++) { |
| 362 | 184 uint16_t value; |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
185 if (rate < 2) { |
| 362 | 186 value = 0; |
|
365
3ba3b6656fff
Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents:
364
diff
changeset
|
187 } else if (rate >= 60) { |
| 362 | 188 value = 8; |
|
365
3ba3b6656fff
Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents:
364
diff
changeset
|
189 } else if (rate < 8) { |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
190 value = rate_table_base[((rate & 6) == 6 ? 16 : 0) + cycle]; |
|
365
3ba3b6656fff
Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents:
364
diff
changeset
|
191 } else if (rate < 48) { |
| 362 | 192 value = rate_table_base[(rate & 0x3) * 8 + cycle]; |
| 193 } else { | |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
194 value = rate_table_base[32 + (rate & 0x3) * 8 + cycle] << ((rate - 48) >> 2); |
| 362 | 195 } |
|
365
3ba3b6656fff
Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents:
364
diff
changeset
|
196 rate_table[rate * 8 + cycle] = value; |
| 362 | 197 } |
| 198 } | |
|
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
199 //populate LFO PM table from small base table |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
200 //seems like there must be a better way to derive this |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
201 for (int freq = 0; freq < 128; freq++) { |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
202 for (int pms = 0; pms < 8; pms++) { |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
203 for (int step = 0; step < 32; step++) { |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
204 int16_t value = 0; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
205 for (int bit = 0x40, shift = 0; bit > 0; bit >>= 1, shift++) { |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
206 if (freq & bit) { |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
207 value += lfo_pm_base[pms][(step & 0x8) ? 7-step & 7 : step & 7] >> shift; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
208 } |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
209 } |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
210 if (step & 0x10) { |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
211 value = -value; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
212 } |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
213 lfo_pm_table[freq * 256 + pms * 32 + step] = value; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
214 } |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
215 } |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
216 } |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
217 } |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
218 } |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
219 |
| 377 | 220 #define YM_VOLUME_DIVIDER 2 |
|
381
7815ebbbd705
Fix modulation shift value
Mike Pavone <pavone@retrodev.com>
parents:
380
diff
changeset
|
221 #define YM_MOD_SHIFT 1 |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
222 |
| 403 | 223 #define TIMER_A_MAX 1023 |
| 224 #define TIMER_B_MAX (255*16) | |
| 225 | |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
226 void ym_run(ym2612_context * context, uint32_t to_cycle) |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
227 { |
| 362 | 228 //printf("Running YM2612 from cycle %d to cycle %d\n", context->current_cycle, to_cycle); |
| 229 //TODO: Fix channel update order OR remap channels in register write | |
|
380
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents:
379
diff
changeset
|
230 for (; context->current_cycle < to_cycle; context->current_cycle += context->clock_inc) { |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
231 //Update timers at beginning of 144 cycle period |
| 403 | 232 if (!context->current_op) { |
| 233 if (context->timer_control & BIT_TIMERA_ENABLE) { | |
| 234 if (context->timer_a != TIMER_A_MAX) { | |
| 235 context->timer_a++; | |
| 236 } else { | |
| 237 if (context->timer_control & BIT_TIMERA_OVEREN) { | |
| 238 context->status |= BIT_STATUS_TIMERA; | |
| 239 } | |
| 240 context->timer_a = context->timer_a_load; | |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
241 } |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
242 } |
| 362 | 243 if (context->timer_control & BIT_TIMERB_ENABLE) { |
| 403 | 244 if (context->timer_b != TIMER_B_MAX) { |
| 245 context->timer_b++; | |
| 246 } else { | |
| 247 if (context->timer_control & BIT_TIMERB_OVEREN) { | |
| 248 context->status |= BIT_STATUS_TIMERB; | |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
249 } |
| 403 | 250 context->timer_b = context->timer_b_load; |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
251 } |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
252 } |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
253 } |
|
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
254 //Update LFO |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
255 if (context->lfo_enable) { |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
256 if (context->lfo_counter) { |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
257 context->lfo_counter--; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
258 } else { |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
259 context->lfo_counter = lfo_timer_values[context->lfo_freq]; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
260 context->lfo_am_step += 2; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
261 context->lfo_am_step &= 0xFE; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
262 context->lfo_pm_step = context->lfo_am_step / 8; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
263 } |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
264 } |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
265 //Update Envelope Generator |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
266 if (!(context->current_op % 3)) { |
|
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
267 uint32_t env_cyc = context->env_counter; |
|
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
268 uint32_t op = context->current_env_op; |
| 362 | 269 ym_operator * operator = context->operators + op; |
| 270 ym_channel * channel = context->channels + op/4; | |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
271 uint8_t rate; |
| 362 | 272 for(;;) { |
| 273 rate = operator->rates[operator->env_phase]; | |
| 274 if (rate) { | |
| 275 uint8_t ks = channel->keycode >> operator->key_scaling;; | |
| 276 rate = rate*2 + ks; | |
| 277 if (rate > 63) { | |
| 278 rate = 63; | |
| 279 } | |
| 280 } | |
| 281 //Deal with "infinite" rates | |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
282 //According to Nemesis this should be handled in key-on instead |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
283 if (rate >= 62 && operator->env_phase == PHASE_ATTACK) { |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
284 operator->env_phase = PHASE_DECAY; |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
285 operator->envelope = 0; |
| 362 | 286 } else { |
| 287 break; | |
| 288 } | |
| 289 } | |
| 290 uint32_t cycle_shift = rate < 0x30 ? ((0x2F - rate) >> 2) : 0; | |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
291 if (first_key_on) { |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
292 dfprintf(debug_file, "Operator: %d, env rate: %d (2*%d+%d), env_cyc: %d, cycle_shift: %d, env_cyc & ((1 << cycle_shift) - 1): %d\n", op, rate, operator->rates[operator->env_phase], channel->keycode >> operator->key_scaling,env_cyc, cycle_shift, env_cyc & ((1 << cycle_shift) - 1)); |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
293 } |
| 362 | 294 if (!(env_cyc & ((1 << cycle_shift) - 1))) { |
| 295 uint32_t update_cycle = env_cyc >> cycle_shift & 0x7; | |
| 296 //envelope value is 10-bits, but it will be used as a 4.8 value | |
| 297 uint16_t envelope_inc = rate_table[rate * 8 + update_cycle] << 2; | |
| 298 if (operator->env_phase == PHASE_ATTACK) { | |
| 299 //this can probably be optimized to a single shift rather than a multiply + shift | |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
300 if (first_key_on) { |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
301 dfprintf(debug_file, "Changing op %d envelope %d by %d(%d * %d) in attack phase\n", op, operator->envelope, (~operator->envelope * envelope_inc) >> 4, ~operator->envelope, envelope_inc); |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
302 } |
| 362 | 303 operator->envelope += (~operator->envelope * envelope_inc) >> 4; |
| 304 operator->envelope &= MAX_ENVELOPE; | |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
305 if (!operator->envelope) { |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
306 operator->envelope = 0; |
| 362 | 307 operator->env_phase = PHASE_DECAY; |
| 308 } | |
| 309 } else { | |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
310 if (first_key_on) { |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
311 dfprintf(debug_file, "Changing op %d envelope %d by %d in %s phase\n", op, operator->envelope, envelope_inc, |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
312 operator->env_phase == PHASE_SUSTAIN ? "sustain" : (operator->env_phase == PHASE_DECAY ? "decay": "release")); |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
313 } |
| 362 | 314 operator->envelope += envelope_inc; |
| 315 //clamp to max attenuation value | |
| 316 if (operator->envelope > MAX_ENVELOPE) { | |
| 317 operator->envelope = MAX_ENVELOPE; | |
| 318 } | |
| 319 if (operator->env_phase == PHASE_DECAY && operator->envelope >= operator->sustain_level) { | |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
320 //operator->envelope = operator->sustain_level; |
| 362 | 321 operator->env_phase = PHASE_SUSTAIN; |
| 322 } | |
| 323 } | |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
324 } |
|
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
325 context->current_env_op++; |
|
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
326 if (context->current_env_op == NUM_OPERATORS) { |
|
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
327 context->current_env_op = 0; |
|
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
328 context->env_counter++; |
| 362 | 329 } |
| 330 } | |
| 331 | |
| 332 //Update Phase Generator | |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
333 uint32_t channel = context->current_op / 4; |
| 362 | 334 if (channel != 5 || !context->dac_enable) { |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
335 uint32_t op = context->current_op; |
| 362 | 336 //printf("updating operator %d of channel %d\n", op, channel); |
| 337 ym_operator * operator = context->operators + op; | |
| 338 ym_channel * chan = context->channels + channel; | |
| 339 //TODO: Modulate phase by LFO if necessary | |
|
396
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
340 uint16_t phase = operator->phase_counter >> 10 & 0x3FF; |
| 362 | 341 operator->phase_counter += operator->phase_inc; |
|
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
342 if (chan->pms) { |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
343 //not entirely sure this will get the precision correct, but I'd like to avoid recalculating phase |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
344 //increment every update when LFO phase modulation is enabled |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
345 int16_t lfo_mod = lfo_pm_table[(chan->fnum & 0x7F0) * 16 + chan->pms + context->lfo_pm_step]; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
346 if (operator->multiple) { |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
347 lfo_mod *= operator->multiple; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
348 } else { |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
349 lfo_mod >>= 1; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
350 } |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
351 operator->phase_counter += lfo_mod; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
352 } |
|
371
0f8a759f1ff4
Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
370
diff
changeset
|
353 int16_t mod = 0; |
| 362 | 354 switch (op % 4) |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
355 { |
| 362 | 356 case 0://Operator 1 |
| 377 | 357 if (chan->feedback) { |
|
378
92947faa258a
Adjust shift for feedback
Mike Pavone <pavone@retrodev.com>
parents:
377
diff
changeset
|
358 mod = operator->output >> (9-chan->feedback); |
| 377 | 359 } |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
360 break; |
| 362 | 361 case 1://Operator 3 |
| 362 switch(chan->algorithm) | |
| 363 { | |
| 364 case 0: | |
| 365 case 2: | |
| 366 //modulate by operator 2 | |
|
379
3218e2f8d685
Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents:
378
diff
changeset
|
367 mod = context->operators[op+1].output >> YM_MOD_SHIFT; |
| 362 | 368 break; |
| 369 case 1: | |
| 370 //modulate by operator 1+2 | |
|
379
3218e2f8d685
Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents:
378
diff
changeset
|
371 mod = (context->operators[op-1].output + context->operators[op+1].output) >> YM_MOD_SHIFT; |
| 362 | 372 break; |
| 373 case 5: | |
| 374 //modulate by operator 1 | |
|
379
3218e2f8d685
Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents:
378
diff
changeset
|
375 mod = context->operators[op-1].output >> YM_MOD_SHIFT; |
| 362 | 376 } |
| 377 break; | |
| 378 case 2://Operator 2 | |
|
406
b1bc1947d949
Fix modulation condition for operator 2
Mike Pavone <pavone@retrodev.com>
parents:
403
diff
changeset
|
379 if (chan->algorithm != 1 && chan->algorithm != 2 && chan->algorithm != 7) { |
| 362 | 380 //modulate by Operator 1 |
|
379
3218e2f8d685
Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents:
378
diff
changeset
|
381 mod = context->operators[op-2].output >> YM_MOD_SHIFT; |
| 362 | 382 } |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
383 break; |
| 362 | 384 case 3://Operator 4 |
| 385 switch(chan->algorithm) | |
| 386 { | |
| 387 case 0: | |
| 388 case 1: | |
| 389 case 4: | |
| 390 //modulate by operator 3 | |
|
379
3218e2f8d685
Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents:
378
diff
changeset
|
391 mod = context->operators[op-2].output >> YM_MOD_SHIFT; |
| 362 | 392 break; |
| 393 case 2: | |
| 394 //modulate by operator 1+3 | |
|
379
3218e2f8d685
Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents:
378
diff
changeset
|
395 mod = (context->operators[op-3].output + context->operators[op-2].output) >> YM_MOD_SHIFT; |
| 362 | 396 break; |
| 397 case 3: | |
| 398 //modulate by operator 2+3 | |
|
379
3218e2f8d685
Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents:
378
diff
changeset
|
399 mod = (context->operators[op-1].output + context->operators[op-2].output) >> YM_MOD_SHIFT; |
| 362 | 400 break; |
| 401 case 5: | |
| 402 //modulate by operator 1 | |
|
379
3218e2f8d685
Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents:
378
diff
changeset
|
403 mod = context->operators[op-3].output >> YM_MOD_SHIFT; |
| 362 | 404 break; |
| 405 } | |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
406 break; |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
407 } |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
408 uint16_t env = operator->envelope + operator->total_level; |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
409 if (env > MAX_ENVELOPE) { |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
410 env = MAX_ENVELOPE; |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
411 } |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
412 if (first_key_on) { |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
413 dfprintf(debug_file, "op %d, base phase: %d, mod: %d, sine: %d, out: %d\n", op, phase, mod, sine_table[(phase+mod) & 0x1FF], pow_table[sine_table[phase & 0x1FF] + env]); |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
414 } |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
415 phase += mod; |
|
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
416 |
|
371
0f8a759f1ff4
Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
370
diff
changeset
|
417 int16_t output = pow_table[sine_table[phase & 0x1FF] + env]; |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
418 if (phase & 0x200) { |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
419 output = -output; |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
420 } |
| 362 | 421 operator->output = output; |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
422 //Update the channel output if we've updated all operators |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
423 if (op % 4 == 3) { |
| 362 | 424 if (chan->algorithm < 4) { |
| 425 chan->output = operator->output; | |
| 426 } else if(chan->algorithm == 4) { | |
|
396
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
427 chan->output = operator->output + context->operators[channel * 4 + 2].output; |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
428 } else { |
|
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
429 output = 0; |
| 362 | 430 for (uint32_t op = ((chan->algorithm == 7) ? 0 : 1) + channel*4; op < (channel+1)*4; op++) { |
| 431 output += context->operators[op].output; | |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
432 } |
| 362 | 433 chan->output = output; |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
434 } |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
435 if (first_key_on) { |
|
371
0f8a759f1ff4
Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
370
diff
changeset
|
436 int16_t value = context->channels[channel].output & 0x3FE0; |
|
0f8a759f1ff4
Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
370
diff
changeset
|
437 if (value & 0x2000) { |
|
0f8a759f1ff4
Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
370
diff
changeset
|
438 value |= 0xC000; |
|
0f8a759f1ff4
Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
370
diff
changeset
|
439 } |
|
0f8a759f1ff4
Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
370
diff
changeset
|
440 dfprintf(debug_file, "channel %d output: %d\n", channel, value / YM_VOLUME_DIVIDER); |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
441 } |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
442 } |
| 362 | 443 //puts("operator update done"); |
|
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents:
288
diff
changeset
|
444 } |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
445 context->current_op++; |
|
380
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents:
379
diff
changeset
|
446 context->buffer_fraction += context->buffer_inc; |
|
396
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
447 if (context->current_op == NUM_OPERATORS) { |
|
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
448 context->current_op = 0; |
|
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
449 if (context->buffer_fraction > 1.0) { |
|
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
450 context->buffer_fraction -= 1.0; |
|
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
451 context->audio_buffer[context->buffer_pos] = 0; |
|
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
452 context->audio_buffer[context->buffer_pos + 1] = 0; |
|
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
453 for (int i = 0; i < NUM_CHANNELS; i++) { |
|
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
454 int16_t value = context->channels[i].output & 0x3FE0; |
|
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
455 if (value & 0x2000) { |
|
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
456 value |= 0xC000; |
|
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
457 } |
|
407
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
458 if (context->channels[i].logfile) { |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
459 fwrite(&value, sizeof(value), 1, context->channels[i].logfile); |
|
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
460 } |
|
396
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
461 if (context->channels[i].lr & 0x80) { |
|
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
462 context->audio_buffer[context->buffer_pos] += value / YM_VOLUME_DIVIDER; |
|
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
463 } |
|
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
464 if (context->channels[i].lr & 0x40) { |
|
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
465 context->audio_buffer[context->buffer_pos+1] += value / YM_VOLUME_DIVIDER; |
|
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
466 } |
|
380
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents:
379
diff
changeset
|
467 } |
|
396
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
468 context->buffer_pos += 2; |
|
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
469 if (context->buffer_pos == context->sample_limit) { |
|
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
470 render_wait_ym(context); |
|
380
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents:
379
diff
changeset
|
471 } |
|
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents:
379
diff
changeset
|
472 } |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
473 } |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
474 } |
|
380
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents:
379
diff
changeset
|
475 if (context->current_cycle >= context->write_cycle + (BUSY_CYCLES * context->clock_inc / 6)) { |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
476 context->status &= 0x7F; |
| 374 | 477 context->write_cycle = CYCLE_NEVER; |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
478 } |
| 362 | 479 //printf("Done running YM2612 at cycle %d\n", context->current_cycle, to_cycle); |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
480 } |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
481 |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
482 void ym_address_write_part1(ym2612_context * context, uint8_t address) |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
483 { |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
484 //printf("address_write_part1: %X\n", address); |
| 362 | 485 context->selected_reg = address; |
| 486 context->selected_part = 0; | |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
487 } |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
488 |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
489 void ym_address_write_part2(ym2612_context * context, uint8_t address) |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
490 { |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
491 //printf("address_write_part2: %X\n", address); |
| 362 | 492 context->selected_reg = address; |
| 493 context->selected_part = 1; | |
| 494 } | |
| 495 | |
| 496 uint8_t fnum_to_keycode[] = { | |
| 497 //F11 = 0 | |
| 498 0,0,0,0,0,0,0,1, | |
| 499 //F11 = 1 | |
| 500 2,3,3,3,3,3,3,3 | |
| 501 }; | |
| 502 | |
| 503 //table courtesy of Nemesis | |
| 504 uint32_t detune_table[][4] = { | |
| 505 {0, 0, 1, 2}, //0 (0x00) | |
| 506 {0, 0, 1, 2}, //1 (0x01) | |
| 507 {0, 0, 1, 2}, //2 (0x02) | |
| 508 {0, 0, 1, 2}, //3 (0x03) | |
| 509 {0, 1, 2, 2}, //4 (0x04) | |
| 510 {0, 1, 2, 3}, //5 (0x05) | |
| 511 {0, 1, 2, 3}, //6 (0x06) | |
| 512 {0, 1, 2, 3}, //7 (0x07) | |
| 513 {0, 1, 2, 4}, //8 (0x08) | |
| 514 {0, 1, 3, 4}, //9 (0x09) | |
| 515 {0, 1, 3, 4}, //10 (0x0A) | |
| 516 {0, 1, 3, 5}, //11 (0x0B) | |
| 517 {0, 2, 4, 5}, //12 (0x0C) | |
| 518 {0, 2, 4, 6}, //13 (0x0D) | |
| 519 {0, 2, 4, 6}, //14 (0x0E) | |
| 520 {0, 2, 5, 7}, //15 (0x0F) | |
| 521 {0, 2, 5, 8}, //16 (0x10) | |
| 522 {0, 3, 6, 8}, //17 (0x11) | |
| 523 {0, 3, 6, 9}, //18 (0x12) | |
| 524 {0, 3, 7,10}, //19 (0x13) | |
| 525 {0, 4, 8,11}, //20 (0x14) | |
| 526 {0, 4, 8,12}, //21 (0x15) | |
| 527 {0, 4, 9,13}, //22 (0x16) | |
| 528 {0, 5,10,14}, //23 (0x17) | |
| 529 {0, 5,11,16}, //24 (0x18) | |
| 530 {0, 6,12,17}, //25 (0x19) | |
| 531 {0, 6,13,19}, //26 (0x1A) | |
| 532 {0, 7,14,20}, //27 (0x1B) | |
| 533 {0, 8,16,22}, //28 (0x1C) | |
| 534 {0, 8,16,22}, //29 (0x1D) | |
| 535 {0, 8,16,22}, //30 (0x1E) | |
| 536 {0, 8,16,22} | |
| 537 }; //31 (0x1F) | |
| 538 | |
| 539 void ym_update_phase_inc(ym2612_context * context, ym_operator * operator, uint32_t op) | |
| 540 { | |
| 541 uint32_t chan_num = op / 4; | |
| 542 //printf("ym_update_phase_inc | channel: %d, op: %d\n", chan_num, op); | |
| 543 //base frequency | |
| 544 ym_channel * channel = context->channels + chan_num; | |
|
383
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
545 uint32_t inc, detune; |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
546 if (chan_num == 2 && context->ch3_mode && (op < (2*4 + 3))) { |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
547 inc = context->ch3_supp[op-2*4].fnum; |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
548 if (!context->ch3_supp[op-2*4].block) { |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
549 inc >>= 1; |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
550 } else { |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
551 inc <<= (context->ch3_supp[op-2*4].block-1); |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
552 } |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
553 //detune |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
554 detune = detune_table[context->ch3_supp[op-2*4].keycode][operator->detune & 0x3]; |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
555 } else { |
|
383
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
556 inc = channel->fnum; |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
557 if (!channel->block) { |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
558 inc >>= 1; |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
559 } else { |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
560 inc <<= (channel->block-1); |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
561 } |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
562 //detune |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
563 detune = detune_table[channel->keycode][operator->detune & 0x3]; |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
564 } |
| 362 | 565 if (operator->detune & 0x40) { |
| 566 inc -= detune; | |
| 567 //this can underflow, mask to 17-bit result | |
| 568 inc &= 0x1FFFF; | |
| 569 } else { | |
| 570 inc += detune; | |
| 571 } | |
| 572 //multiple | |
| 573 if (operator->multiple) { | |
| 574 inc *= operator->multiple; | |
| 575 } else { | |
| 576 //0.5 | |
| 577 inc >>= 1; | |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
578 } |
|
365
3ba3b6656fff
Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents:
364
diff
changeset
|
579 //printf("phase_inc for operator %d: %d, block: %d, fnum: %d, detune: %d, multiple: %d\n", op, inc, channel->block, channel->fnum, detune, operator->multiple); |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
580 operator->phase_inc = inc; |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
581 } |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
582 |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
583 void ym_data_write(ym2612_context * context, uint8_t value) |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
584 { |
| 362 | 585 if (context->selected_reg < 0x21 || context->selected_reg > 0xB6 || (context->selected_reg < 0x30 && context->selected_part)) { |
| 586 return; | |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
587 } |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
588 dfprintf(debug_file, "write of %X to reg %X in part %d\n", value, context->selected_reg, context->selected_part+1); |
| 362 | 589 if (context->selected_reg < 0x30) { |
| 590 //Shared regs | |
| 591 switch (context->selected_reg) | |
| 592 { | |
|
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
593 //TODO: Test reg |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
594 case REG_LFO: |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
595 if ((value & 0x8) && !context->lfo_enable) { |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
596 printf("LFO Enabled, Freq: %d\n", value & 0x7); |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
597 } |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
598 context->lfo_enable = value & 0x8; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
599 if (!context->lfo_enable) { |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
600 context->lfo_am_step = context->lfo_pm_step = 0; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
601 } |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
602 context->lfo_freq = value & 0x7; |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
603 |
|
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
604 break; |
| 362 | 605 case REG_TIMERA_HIGH: |
| 606 context->timer_a_load &= 0x3; | |
| 607 context->timer_a_load |= value << 2; | |
| 608 break; | |
| 609 case REG_TIMERA_LOW: | |
| 610 context->timer_a_load &= 0xFFFC; | |
| 611 context->timer_a_load |= value & 0x3; | |
| 612 break; | |
| 613 case REG_TIMERB: | |
| 403 | 614 context->timer_b_load = value * 16; |
| 362 | 615 break; |
|
383
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
616 case REG_TIME_CTRL: { |
| 403 | 617 if (value & BIT_TIMERA_ENABLE && !(context->timer_control & BIT_TIMERA_ENABLE)) { |
| 618 context->timer_a = context->timer_a_load; | |
| 619 } | |
| 620 if (value & BIT_TIMERB_ENABLE && !(context->timer_control & BIT_TIMERB_ENABLE)) { | |
| 621 context->timer_b = context->timer_b_load; | |
| 622 } | |
| 623 context->timer_control = value & 0xF; | |
| 624 if (value & BIT_TIMERA_RESET) { | |
| 625 context->status &= ~BIT_STATUS_TIMERA; | |
| 626 } | |
| 627 if (value & BIT_TIMERB_RESET) { | |
| 628 context->status &= ~BIT_STATUS_TIMERB; | |
| 629 } | |
|
383
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
630 uint8_t old_mode = context->ch3_mode; |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
631 context->ch3_mode = value & 0xC0; |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
632 if (context->ch3_mode != old_mode) { |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
633 ym_update_phase_inc(context, context->operators + 2*4, 2*4); |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
634 ym_update_phase_inc(context, context->operators + 2*4+1, 2*4+1); |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
635 ym_update_phase_inc(context, context->operators + 2*4+2, 2*4+2); |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
636 } |
| 362 | 637 break; |
|
383
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
638 } |
| 362 | 639 case REG_KEY_ONOFF: { |
| 640 uint8_t channel = value & 0x7; | |
|
386
6e5c4f3ab0e2
Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents:
383
diff
changeset
|
641 if (channel != 3 && channel != 7) { |
|
6e5c4f3ab0e2
Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents:
383
diff
changeset
|
642 if (channel > 2) { |
|
6e5c4f3ab0e2
Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents:
383
diff
changeset
|
643 channel--; |
|
6e5c4f3ab0e2
Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents:
383
diff
changeset
|
644 } |
| 362 | 645 for (uint8_t op = channel * 4, bit = 0x10; op < (channel + 1) * 4; op++, bit <<= 1) { |
| 646 if (value & bit) { | |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
647 first_key_on = 1; |
| 362 | 648 //printf("Key On for operator %d in channel %d\n", op, channel); |
| 649 context->operators[op].phase_counter = 0; | |
| 650 context->operators[op].env_phase = PHASE_ATTACK; | |
| 651 context->operators[op].envelope = MAX_ENVELOPE; | |
| 652 } else { | |
| 653 //printf("Key Off for operator %d in channel %d\n", op, channel); | |
| 654 context->operators[op].env_phase = PHASE_RELEASE; | |
| 655 } | |
| 656 } | |
| 657 } | |
| 658 break; | |
| 659 } | |
| 660 case REG_DAC: | |
| 661 if (context->dac_enable) { | |
| 662 context->channels[5].output = (((int16_t)value) - 0x80) << 6; | |
|
396
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
663 //printf("DAC Write %X(%d) @ %d\n", value, context->channels[5].output, context->current_cycle); |
| 362 | 664 } |
| 665 break; | |
| 666 case REG_DAC_ENABLE: | |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
667 //printf("DAC Enable: %X\n", value); |
| 362 | 668 context->dac_enable = value & 0x80; |
| 669 break; | |
| 670 } | |
| 671 } else if (context->selected_reg < 0xA0) { | |
| 672 //part | |
| 673 uint8_t op = context->selected_part ? (NUM_OPERATORS/2) : 0; | |
| 674 //channel in part | |
| 675 if ((context->selected_reg & 0x3) != 0x3) { | |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
676 op += 4 * (context->selected_reg & 0x3) + ((context->selected_reg & 0xC) / 4); |
| 362 | 677 //printf("write targets operator %d (%d of channel %d)\n", op, op % 4, op / 4); |
| 678 ym_operator * operator = context->operators + op; | |
| 679 switch (context->selected_reg & 0xF0) | |
| 680 { | |
| 681 case REG_DETUNE_MULT: | |
| 682 operator->detune = value >> 4 & 0x7; | |
| 683 operator->multiple = value & 0xF; | |
| 684 ym_update_phase_inc(context, operator, op); | |
| 685 break; | |
| 686 case REG_TOTAL_LEVEL: | |
| 687 operator->total_level = (value & 0x7F) << 5; | |
| 688 break; | |
| 689 case REG_ATTACK_KS: | |
| 376 | 690 operator->key_scaling = 3 - (value >> 6); |
| 362 | 691 operator->rates[PHASE_ATTACK] = value & 0x1F; |
| 692 break; | |
| 693 case REG_DECAY_AM: | |
| 694 //TODO: AM flag for LFO | |
| 695 operator->rates[PHASE_DECAY] = value & 0x1F; | |
| 696 break; | |
| 697 case REG_SUSTAIN_RATE: | |
| 698 operator->rates[PHASE_SUSTAIN] = value & 0x1F; | |
| 699 break; | |
| 700 case REG_S_LVL_R_RATE: | |
| 701 operator->rates[PHASE_RELEASE] = (value & 0xF) << 1 | 1; | |
|
382
b904859964e5
Fix operator precedence bug with sustain level
Mike Pavone <pavone@retrodev.com>
parents:
381
diff
changeset
|
702 operator->sustain_level = (value & 0xF0) << 4; |
| 362 | 703 break; |
| 704 } | |
| 705 } | |
| 706 } else { | |
| 707 uint8_t channel = context->selected_reg & 0x3; | |
| 708 if (channel != 3) { | |
| 709 if (context->selected_part) { | |
| 710 channel += 3; | |
| 711 } | |
| 712 //printf("write targets channel %d\n", channel); | |
| 713 switch (context->selected_reg & 0xFC) | |
| 714 { | |
| 715 case REG_FNUM_LOW: | |
| 716 context->channels[channel].block = context->channels[channel].block_fnum_latch >> 3 & 0x7; | |
| 717 context->channels[channel].fnum = (context->channels[channel].block_fnum_latch & 0x7) << 8 | value; | |
| 718 context->channels[channel].keycode = context->channels[channel].block << 2 | fnum_to_keycode[context->channels[channel].fnum >> 7]; | |
| 719 ym_update_phase_inc(context, context->operators + channel*4, channel*4); | |
| 720 ym_update_phase_inc(context, context->operators + channel*4+1, channel*4+1); | |
| 721 ym_update_phase_inc(context, context->operators + channel*4+2, channel*4+2); | |
| 722 ym_update_phase_inc(context, context->operators + channel*4+3, channel*4+3); | |
| 723 break; | |
| 724 case REG_BLOCK_FNUM_H:{ | |
| 725 context->channels[channel].block_fnum_latch = value; | |
| 726 break; | |
| 727 } | |
|
383
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
728 case REG_FNUM_LOW_CH3: |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
729 if (channel < 3) { |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
730 context->ch3_supp[channel].block = context->ch3_supp[channel].block_fnum_latch >> 3 & 0x7; |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
731 context->ch3_supp[channel].fnum = (context->ch3_supp[channel].block_fnum_latch & 0x7) << 8 | value; |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
732 context->ch3_supp[channel].keycode = context->ch3_supp[channel].block << 2 | fnum_to_keycode[context->ch3_supp[channel].fnum >> 7]; |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
733 if (context->ch3_mode) { |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
734 ym_update_phase_inc(context, context->operators + 2*4 + channel, 2*4); |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
735 } |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
736 } |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
737 break; |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
738 case REG_BLOCK_FN_CH3: |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
739 if (channel < 3) { |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
740 context->ch3_supp[channel].block_fnum_latch = value; |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
741 } |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
742 break; |
| 362 | 743 case REG_ALG_FEEDBACK: |
| 744 context->channels[channel].algorithm = value & 0x7; | |
| 745 context->channels[channel].feedback = value >> 3 & 0x7; | |
| 746 break; | |
| 747 case REG_LR_AMS_PMS: | |
|
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
748 context->channels[channel].pms = (value & 0x7) * 32; |
| 362 | 749 context->channels[channel].ams = value >> 4 & 0x3; |
| 750 context->channels[channel].lr = value & 0xC0; | |
|
369
fc820ab1394b
Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents:
365
diff
changeset
|
751 //printf("Write of %X to LR_AMS_PMS reg for channel %d\n", value, channel); |
| 362 | 752 break; |
| 753 } | |
| 754 } | |
| 755 } | |
| 756 | |
| 757 context->write_cycle = context->current_cycle; | |
| 374 | 758 context->status |= 0x80; |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
759 } |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
760 |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
761 uint8_t ym_read_status(ym2612_context * context) |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
762 { |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
763 return context->status; |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
764 } |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
765 |
|
424
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
766 #define GST_YM_OFFSET 0x1E4 |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
767 #define GST_YM_SIZE (0x3E4-GST_YM_OFFSET) |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
768 |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
769 uint8_t ym_load_gst(ym2612_context * context, FILE * gstfile) |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
770 { |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
771 uint8_t regdata[GST_YM_SIZE]; |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
772 fseek(gstfile, GST_YM_OFFSET, SEEK_SET); |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
773 if (fread(regdata, 1, sizeof(regdata), gstfile) != sizeof(regdata)) { |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
774 return 0; |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
775 } |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
776 for (int i = 0; i < sizeof(regdata); i++) { |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
777 if (i & 0x100) { |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
778 ym_address_write_part2(context, i & 0xFF); |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
779 } else { |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
780 ym_address_write_part1(context, i); |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
781 } |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
782 ym_data_write(context, regdata[i]); |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
783 } |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
784 return 1; |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
785 } |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
786 |