Mercurial > repos > blastem
annotate runtime.S @ 505:b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
author | Michael Pavone <pavone@retrodev.com> |
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date | Mon, 06 Jan 2014 22:54:05 -0800 |
parents | b449af228c63 |
children | 4ca826862174 |
rev | line source |
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17
de0085d4ea40
Add asssembly runtime code stub
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1 |
18
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M68K to x86 translation works for a limited subset of instructions and addressing modes
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2 .global handle_cycle_limit |
150
3e68e517cc01
Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
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3 .global do_sync |
18
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4 handle_cycle_limit: |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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5 cmp 84(%rsi), %eax |
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6 jb skip_sync |
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7 do_sync: |
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Mostly working runtime generation of memory map read/write functions
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8 push %rcx |
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9 push %rdi |
54
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Get Flavio's color bar demo kind of sort of working
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10 call m68k_save_context |
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11 mov %rsi, %rdi |
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12 xor %esi, %esi |
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13 test $8, %esp |
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14 jnz adjust_rsp |
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15 call sync_components |
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16 jmp done_adjust |
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17 adjust_rsp: |
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18 sub $8, %rsp |
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19 call sync_components |
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20 add $8, %rsp |
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21 done_adjust: |
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22 mov %rax, %rsi |
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23 call m68k_load_context |
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24 pop %rdi |
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25 pop %rcx |
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26 skip_sync: |
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27 ret |
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28 |
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29 sr_msg_int: |
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30 .asciz "SR set to $%X due to interrupt\n" |
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31 debug_print_sr_int: |
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32 call m68k_save_context |
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33 push %rsi |
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34 lea sr_msg_int(%rip), %rdi |
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35 movzxb 5(%rsi), %rsi |
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36 xor %rax, %rax |
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37 call printf |
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38 pop %rsi |
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39 call m68k_load_context |
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40 ret |
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41 |
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42 sr_msg: |
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43 .asciz "SR set to $%X\n" |
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44 .global debug_print_sr |
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45 debug_print_sr: |
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46 call m68k_save_context |
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47 push %rsi |
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48 lea sr_msg(%rip), %rdi |
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49 movzxb 5(%rsi), %rsi |
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50 xor %rax, %rax |
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51 call printf |
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52 pop %rsi |
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53 call m68k_load_context |
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54 ret |
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55 |
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56 invalid_msg: |
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57 .asciz "Invalid instruction at %X\n" |
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58 |
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59 .global m68k_invalid |
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60 m68k_invalid: |
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61 lea invalid_msg(%rip), %rdi |
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62 mov %ecx, %esi |
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63 xor %rax, %rax |
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64 call printf |
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65 mov $1, %rdi |
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66 call exit |
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67 |
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68 .global bcd_add |
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69 bcd_add: |
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70 xchg %rax, %rdi |
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71 |
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72 mov %cl, %ch |
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73 mov %al, %ah |
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74 and $0xF, %ch |
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75 and $0xF, %ah |
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76 and $0xF0, %cl |
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77 and $0xF0, %al |
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78 add %ah, %ch |
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79 cmp $10, %ch |
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80 jb no_adjust |
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81 add $6, %ch |
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82 no_adjust: |
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83 add %ch, %al |
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84 add %al, %cl |
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85 mov $0, %ch |
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86 jc def_adjust |
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87 cmp $0xA0, %cl |
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88 jb no_adjust_h |
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89 def_adjust: |
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90 add $0x60, %cl |
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91 mov $1, %ch |
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92 no_adjust_h: |
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93 |
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94 mov %rdi, %rax |
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95 ret |
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96 |
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97 .global bcd_sub |
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98 bcd_sub: |
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99 xchg %rax, %rdi |
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100 |
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101 mov %cl, %ch |
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102 mov %al, %ah |
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103 and $0xF, %ch |
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104 and $0xF, %ah |
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105 and $0xF0, %cl |
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106 and $0xF0, %al |
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107 sub %ah, %ch |
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108 cmp $10, %ch |
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109 jb no_adjusts |
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110 sub $6, %ch |
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111 no_adjusts: |
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112 add %ch, %cl |
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113 sub %al, %cl |
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114 mov $0, %ch |
811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
115 jc def_adjusts |
811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
116 cmp $0xA0, %cl |
811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
117 jb no_adjust_hs |
811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
118 def_adjusts: |
811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
119 sub $0x60, %cl |
811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
120 mov $1, %ch |
811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
121 no_adjust_hs: |
485
b449af228c63
Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents:
423
diff
changeset
|
122 |
194
811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
123 mov %rdi, %rax |
811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
124 ret |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
125 |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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changeset
|
126 .global get_sr |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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changeset
|
127 get_sr: |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
128 mov 5(%rsi), %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
129 shl $8, %cx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
130 mov (%rsi), %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
131 shl $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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|
132 or %bl, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
133 shl $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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changeset
|
134 or %dl, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
135 shl $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
136 or %bh, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
137 shl $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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changeset
|
138 or %dh, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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changeset
|
139 ret |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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changeset
|
140 |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
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changeset
|
141 .global set_sr |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
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changeset
|
142 set_sr: |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
143 mov %cl, %dh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
144 and $1, %dh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
145 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
146 mov %cl, %bh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
147 and $1, %bh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
148 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
149 mov %cl, %dl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
150 and $1, %dl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
151 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
152 mov %cl, %bl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
153 and $1, %bl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
154 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
155 and $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
156 mov %cl, (%rsi) |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
157 shr $8, %cx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
158 mov %cl, 5(%rsi) |
321
146c87616b05
Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents:
320
diff
changeset
|
159 /* call debug_print_sr */ |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
160 ret |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
161 |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
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changeset
|
162 .global set_ccr |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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changeset
|
163 set_ccr: |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
164 mov %cl, %dh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
165 and $1, %dh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
166 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
167 mov %cl, %bh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
168 and $1, %bh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
169 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
170 mov %cl, %dl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
171 and $1, %dl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
172 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
173 mov %cl, %bl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
174 and $1, %bl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
175 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
176 and $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
177 mov %cl, (%rsi) |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
178 ret |
485
b449af228c63
Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents:
423
diff
changeset
|
179 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
180 .global m68k_modified_ret_addr |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
181 m68k_modified_ret_addr: |
145
15b8dce19cf4
Implement m68k_modified_ret_addr
Mike Pavone <pavone@retrodev.com>
parents:
138
diff
changeset
|
182 add $16, %rsp |
15b8dce19cf4
Implement m68k_modified_ret_addr
Mike Pavone <pavone@retrodev.com>
parents:
138
diff
changeset
|
183 call m68k_native_addr |
15b8dce19cf4
Implement m68k_modified_ret_addr
Mike Pavone <pavone@retrodev.com>
parents:
138
diff
changeset
|
184 jmp *%rcx |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
185 |
86
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
186 .global m68k_native_addr_and_sync |
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
187 m68k_native_addr_and_sync: |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
188 call m68k_save_context |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
189 push %rcx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
190 mov %rsi, %rdi |
198
209a37eed3e7
Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
191 xor %esi, %esi |
485
b449af228c63
Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents:
423
diff
changeset
|
192 test $8, %rsp |
b449af228c63
Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents:
423
diff
changeset
|
193 jnz adjust_rsp_na |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
194 call sync_components |
485
b449af228c63
Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents:
423
diff
changeset
|
195 jmp no_adjust_rsp_na |
b449af228c63
Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents:
423
diff
changeset
|
196 adjust_rsp_na: |
b449af228c63
Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents:
423
diff
changeset
|
197 sub $8, %rsp |
b449af228c63
Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents:
423
diff
changeset
|
198 call sync_components |
b449af228c63
Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents:
423
diff
changeset
|
199 add $8, %rsp |
b449af228c63
Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents:
423
diff
changeset
|
200 no_adjust_rsp_na: |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
201 pop %rsi |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
202 push %rax |
95
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
203 mov %rax, %rdi |
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
204 call get_native_address_trans |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
205 mov %rax, %rcx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
206 pop %rsi |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
207 call m68k_load_context |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
208 ret |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
209 |
86
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
210 .global m68k_native_addr |
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
211 m68k_native_addr: |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
212 call m68k_save_context |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
213 push %rsi |
95
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
214 mov %rsi, %rdi |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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215 mov %ecx, %esi |
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dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
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216 call get_native_address_trans |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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217 mov %rax, %rcx |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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218 pop %rsi |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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219 call m68k_load_context |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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220 ret |
485
b449af228c63
Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
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221 |
193
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Implement support for self-modifying code
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222 .global m68k_retrans_stub |
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223 m68k_retrans_stub: |
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224 call m68k_save_context |
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225 push %rsi |
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226 call m68k_retranslate_inst |
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227 pop %rsi |
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228 mov %rax, %rcx |
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229 call m68k_load_context |
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230 jmp *%rcx |
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44e661913a51
Add preliminary support for JMP
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231 |
18
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232 .global m68k_save_context |
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233 m68k_save_context: |
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234 mov %bl, 1(%rsi) /* N Flag */ |
207 | 235 mov %dl, 2(%rsi) /* Z flag */ |
236 mov %bh, 3(%rsi) /* V flag */ | |
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237 mov %dh, 4(%rsi) /* C flag */ |
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238 mov %r10d, 8(%rsi) /* d0 */ |
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239 mov %r11d, 12(%rsi) /* d1 */ |
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240 mov %r12d, 16(%rsi) /* d2 */ |
423
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Use the registers that were freed up by the memory map function changes
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241 mov %r8d, 20(%rsi) /* d3 */ |
18
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242 mov %r13d, 40(%rsi) /* a0 */ |
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243 mov %r14d, 44(%rsi) /* a1 */ |
423
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244 mov %r9d, 48(%rsi) /* a2 */ |
18
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245 mov %r15d, 68(%rsi) /* a7 */ |
72
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246 mov %eax, 80(%rsi) /* current cycle count */ |
18
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247 ret |
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248 |
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249 .global m68k_load_context |
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250 m68k_load_context: |
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251 mov 1(%rsi), %bl /* N Flag */ |
207 | 252 mov 2(%rsi), %dl /* Z flag */ |
253 mov 3(%rsi), %bh /* V flag */ | |
18
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254 mov 4(%rsi), %dh /* C flag */ |
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255 mov 8(%rsi), %r10d /* d0 */ |
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256 mov 12(%rsi), %r11d /* d1 */ |
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257 mov 16(%rsi), %r12d /* d2 */ |
423
8e136187c0e0
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diff
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258 mov 20(%rsi), %r8d /* d3 */ |
18
3e7bfde7606e
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259 mov 40(%rsi), %r13d /* a0 */ |
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260 mov 44(%rsi), %r14d /* a1 */ |
423
8e136187c0e0
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261 mov 48(%rsi), %r9d /* a2 */ |
18
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262 mov 68(%rsi), %r15d /* a7 */ |
72
7935cd64d5c8
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263 mov 76(%rsi), %ebp /* target cycle count */ |
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264 mov 80(%rsi), %eax /* current cycle count */ |
18
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265 ret |
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266 |
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267 .global m68k_start_context |
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268 m68k_start_context: |
208
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Tweaks to make blastem compatible with m68k-tester
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269 push %rbp |
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Tweaks to make blastem compatible with m68k-tester
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270 push %r12 |
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Tweaks to make blastem compatible with m68k-tester
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diff
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271 push %r13 |
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Tweaks to make blastem compatible with m68k-tester
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parents:
207
diff
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272 push %r14 |
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Tweaks to make blastem compatible with m68k-tester
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207
diff
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273 push %r15 |
485
b449af228c63
Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents:
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diff
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274 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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275 call m68k_load_context |
208
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Tweaks to make blastem compatible with m68k-tester
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276 call *%rdi |
209
922b59c09259
Flag fixes for div, negx and not
Mike Pavone <pavone@retrodev.com>
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208
diff
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|
277 call m68k_save_context |
485
b449af228c63
Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents:
423
diff
changeset
|
278 |
208
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
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parents:
207
diff
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|
279 pop %r15 |
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Tweaks to make blastem compatible with m68k-tester
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parents:
207
diff
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|
280 pop %r14 |
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
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parents:
207
diff
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|
281 pop %r13 |
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
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parents:
207
diff
changeset
|
282 pop %r12 |
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
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parents:
207
diff
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|
283 pop %rbp |
485
b449af228c63
Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
Mike Pavone <pavone@retrodev.com>
parents:
423
diff
changeset
|
284 |
208
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
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207
diff
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285 ret |