Mercurial > repos > blastem
annotate blastem.c @ 333:f16136a3835d
Update Z80 vint timing
author | Mike Pavone <pavone@retrodev.com> |
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date | Tue, 14 May 2013 00:40:10 -0700 |
parents | 1b00258b1f29 |
children | 14a937097c2b |
rev | line source |
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1 #include "68kinst.h" |
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2 #include "m68k_to_x86.h" |
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3 #include "z80_to_x86.h" |
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4 #include "mem.h" |
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5 #include "vdp.h" |
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6 #include "render.h" |
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7 #include "blastem.h" |
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8 #include <stdio.h> |
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9 #include <stdlib.h> |
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10 #include <string.h> |
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11 |
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12 #define CARTRIDGE_WORDS 0x200000 |
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13 #define RAM_WORDS 32 * 1024 |
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14 #define Z80_RAM_BYTES 8 * 1024 |
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15 #define MCLKS_PER_68K 7 |
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16 #define MCLKS_PER_Z80 15 |
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17 //TODO: Figure out the exact value for this |
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18 #define MCLKS_PER_FRAME (MCLKS_LINE*262) |
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19 #define CYCLE_NEVER 0xFFFFFFFF |
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20 |
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21 uint16_t cart[CARTRIDGE_WORDS]; |
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22 uint16_t ram[RAM_WORDS]; |
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23 uint8_t z80_ram[Z80_RAM_BYTES]; |
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24 |
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25 io_port gamepad_1; |
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26 io_port gamepad_2; |
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27 |
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28 int headless = 0; |
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29 int z80_enabled = 1; |
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30 |
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31 #ifndef MIN |
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32 #define MIN(a,b) ((a) < (b) ? (a) : (b)) |
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33 #endif |
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34 |
166 | 35 #define SMD_HEADER_SIZE 512 |
36 #define SMD_MAGIC1 0x03 | |
37 #define SMD_MAGIC2 0xAA | |
38 #define SMD_MAGIC3 0xBB | |
39 #define SMD_BLOCK_SIZE 0x4000 | |
40 | |
41 int load_smd_rom(long filesize, FILE * f) | |
42 { | |
43 uint8_t block[SMD_BLOCK_SIZE]; | |
44 filesize -= SMD_HEADER_SIZE; | |
45 fseek(f, SMD_HEADER_SIZE, SEEK_SET); | |
46 | |
47 uint16_t * dst = cart; | |
48 while (filesize > 0) { | |
49 fread(block, 1, SMD_BLOCK_SIZE, f); | |
50 for (uint8_t *low = block, *high = (block+SMD_BLOCK_SIZE/2), *end = block+SMD_BLOCK_SIZE; high < end; high++, low++) { | |
51 *(dst++) = *high << 8 | *low; | |
52 } | |
53 filesize -= SMD_BLOCK_SIZE; | |
54 } | |
55 return 1; | |
56 } | |
57 | |
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58 int load_rom(char * filename) |
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59 { |
166 | 60 uint8_t header[10]; |
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61 FILE * f = fopen(filename, "rb"); |
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62 if (!f) { |
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63 return 0; |
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64 } |
166 | 65 fread(header, 1, sizeof(header), f); |
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66 fseek(f, 0, SEEK_END); |
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67 long filesize = ftell(f); |
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68 if (filesize/2 > CARTRIDGE_WORDS) { |
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69 //carts bigger than 4MB not currently supported |
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70 filesize = CARTRIDGE_WORDS*2; |
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71 } |
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72 fseek(f, 0, SEEK_SET); |
166 | 73 if (header[1] == SMD_MAGIC1 && header[8] == SMD_MAGIC2 && header[9] == SMD_MAGIC3) { |
74 int i; | |
75 for (i = 3; i < 8; i++) { | |
76 if (header[i] != 0) { | |
77 break; | |
78 } | |
79 } | |
80 if (i == 8) { | |
81 if (header[2]) { | |
82 fprintf(stderr, "%s is a split SMD ROM which is not currently supported", filename); | |
83 exit(1); | |
84 } | |
85 return load_smd_rom(filesize, f); | |
86 } | |
87 } | |
88 fread(cart, 2, filesize/2, f); | |
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89 fclose(f); |
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90 for(unsigned short * cur = cart; cur - cart < (filesize/2); ++cur) |
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91 { |
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92 *cur = (*cur >> 8) | (*cur << 8); |
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93 } |
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94 //TODO: Mirror ROM |
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95 return 1; |
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96 } |
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97 |
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98 uint16_t read_dma_value(uint32_t address) |
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99 { |
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100 //addresses here are word addresses (i.e. bit 0 corresponds to A1), so no need to do div by 2 |
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101 if (address < 0x200000) { |
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102 return cart[address]; |
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103 } else if(address >= 0x700000) { |
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104 return ram[address & 0x7FFF]; |
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105 } |
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106 //TODO: Figure out what happens when you try to DMA from weird adresses like IO or banked Z80 area |
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107 return 0; |
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108 } |
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109 |
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110 //TODO: Make these dependent on the video mode |
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111 //#define VINT_CYCLE ((MCLKS_LINE * 225 + (148 + 40) * 4)/MCLKS_PER_68K) |
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112 #define ZVINT_CYCLE ((MCLKS_LINE * 225 + (148 + 40) * 4)/MCLKS_PER_Z80) |
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113 //#define VINT_CYCLE ((MCLKS_LINE * 226)/MCLKS_PER_68K) |
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114 //#define ZVINT_CYCLE ((MCLKS_LINE * 226)/MCLKS_PER_Z80) |
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115 |
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116 void adjust_int_cycle(m68k_context * context, vdp_context * v_context) |
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117 { |
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118 context->int_cycle = CYCLE_NEVER; |
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119 if ((context->status & 0x7) < 6) { |
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120 uint32_t next_vint = vdp_next_vint(v_context); |
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121 if (next_vint != CYCLE_NEVER) { |
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122 next_vint /= MCLKS_PER_68K; |
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123 context->int_cycle = next_vint; |
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124 context->int_num = 6; |
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125 } |
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126 if ((context->status & 0x7) < 4) { |
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127 uint32_t next_hint = vdp_next_hint(v_context); |
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128 if (next_hint != CYCLE_NEVER) { |
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129 next_hint /= MCLKS_PER_68K; |
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130 if (next_hint < context->int_cycle) { |
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131 context->int_cycle = next_hint; |
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132 context->int_num = 4; |
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133 |
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134 } |
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135 } |
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136 } |
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137 } |
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138 |
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139 context->target_cycle = context->int_cycle < context->sync_cycle ? context->int_cycle : context->sync_cycle; |
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140 /*printf("Cyc: %d, Trgt: %d, Int Cyc: %d, Int: %d, Mask: %X, V: %d, H: %d, HICount: %d, HReg: %d, Line: %d\n", |
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141 context->current_cycle, context->target_cycle, context->int_cycle, context->int_num, (context->status & 0x7), |
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142 v_context->regs[REG_MODE_2] & 0x20, v_context->regs[REG_MODE_1] & 0x10, v_context->hint_counter, v_context->regs[REG_HINT], v_context->cycles / MCLKS_LINE);*/ |
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143 } |
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144 |
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145 int break_on_sync = 0; |
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146 |
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147 uint8_t reset = 1; |
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148 uint8_t need_reset = 0; |
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149 uint8_t busreq = 0; |
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150 uint8_t busack = 0; |
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151 uint32_t busack_cycle = CYCLE_NEVER; |
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152 uint8_t new_busack = 0; |
280 | 153 //#define DO_DEBUG_PRINT |
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154 #ifdef DO_DEBUG_PRINT |
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155 #define dprintf printf |
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156 #define dputs puts |
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157 #else |
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158 #define dprintf |
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159 #define dputs |
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160 #endif |
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161 |
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162 void sync_z80(z80_context * z_context, uint32_t mclks) |
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163 { |
265
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164 if (z80_enabled && !reset && !busreq) { |
333 | 165 genesis_context * gen = z_context->system; |
260
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166 if (need_reset) { |
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167 z80_reset(z_context); |
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168 need_reset = 0; |
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169 } |
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170 z_context->sync_cycle = mclks / MCLKS_PER_Z80; |
333 | 171 uint32_t vint_cycle = vdp_next_vint_z80(gen->vdp) / MCLKS_PER_Z80; |
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172 while (z_context->current_cycle < z_context->sync_cycle) { |
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173 if (z_context->iff1 && z_context->current_cycle < ZVINT_CYCLE) { |
333 | 174 z_context->int_cycle = vint_cycle; |
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175 } |
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176 z_context->target_cycle = z_context->sync_cycle < z_context->int_cycle ? z_context->sync_cycle : z_context->int_cycle; |
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177 dprintf("Running Z80 from cycle %d to cycle %d. Native PC: %p\n", z_context->current_cycle, z_context->sync_cycle, z_context->native_pc); |
260
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178 z80_run(z_context); |
268
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179 dprintf("Z80 ran to cycle %d\n", z_context->current_cycle); |
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180 } |
289
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181 } else { |
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182 z_context->current_cycle = mclks / MCLKS_PER_Z80; |
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183 } |
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184 } |
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185 uint32_t frame=0; |
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186 m68k_context * sync_components(m68k_context * context, uint32_t address) |
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187 { |
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188 //TODO: Handle sync targets smaller than a single frame |
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189 genesis_context * gen = context->system; |
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190 vdp_context * v_context = gen->vdp; |
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191 z80_context * z_context = gen->z80; |
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192 uint32_t mclks = context->current_cycle * MCLKS_PER_68K; |
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193 sync_z80(z_context, mclks); |
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194 if (mclks >= MCLKS_PER_FRAME) { |
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195 ym_run(gen->ym, context->current_cycle); |
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196 gen->ym->current_cycle -= MCLKS_PER_FRAME/MCLKS_PER_68K; |
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197 //printf("reached frame end | 68K Cycles: %d, MCLK Cycles: %d\n", context->current_cycle, mclks); |
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198 vdp_run_context(v_context, MCLKS_PER_FRAME); |
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199 if (!headless) { |
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200 break_on_sync |= wait_render_frame(v_context); |
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201 } |
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202 frame++; |
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203 mclks -= MCLKS_PER_FRAME; |
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204 vdp_adjust_cycles(v_context, MCLKS_PER_FRAME); |
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205 io_adjust_cycles(&gamepad_1, context->current_cycle, MCLKS_PER_FRAME/MCLKS_PER_68K); |
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206 io_adjust_cycles(&gamepad_2, context->current_cycle, MCLKS_PER_FRAME/MCLKS_PER_68K); |
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207 context->current_cycle -= MCLKS_PER_FRAME/MCLKS_PER_68K; |
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208 if (z_context->current_cycle >= MCLKS_PER_FRAME/MCLKS_PER_Z80) { |
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209 z_context->current_cycle -= MCLKS_PER_FRAME/MCLKS_PER_Z80; |
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210 } else { |
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211 z_context->current_cycle = 0; |
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212 } |
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213 if (mclks) { |
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214 vdp_run_context(v_context, mclks); |
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215 } |
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216 } else { |
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217 //printf("running VDP for %d cycles\n", mclks - v_context->cycles); |
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218 vdp_run_context(v_context, mclks); |
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219 } |
317
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220 if (context->int_ack) { |
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221 vdp_int_ack(v_context, context->int_ack); |
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222 context->int_ack = 0; |
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223 } |
186
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224 adjust_int_cycle(context, v_context); |
198
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225 if (break_on_sync && address) { |
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226 break_on_sync = 0; |
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227 debugger(context, address); |
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228 } |
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229 return context; |
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230 } |
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231 |
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232 m68k_context * vdp_port_write(uint32_t vdp_port, m68k_context * context, uint16_t value) |
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233 { |
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234 //printf("vdp_port write: %X, value: %X, cycle: %d\n", vdp_port, value, context->current_cycle); |
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235 sync_components(context, 0); |
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236 vdp_context * v_context = context->video_context; |
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237 if (vdp_port < 0x10) { |
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238 int blocked; |
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239 if (vdp_port < 4) { |
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240 while (vdp_data_port_write(v_context, value) < 0) { |
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241 while(v_context->flags & FLAG_DMA_RUN) { |
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242 vdp_run_dma_done(v_context, MCLKS_PER_FRAME); |
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243 if (v_context->cycles >= MCLKS_PER_FRAME) { |
215
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244 if (!headless) { |
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245 wait_render_frame(v_context); |
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246 } |
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247 vdp_adjust_cycles(v_context, MCLKS_PER_FRAME); |
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248 io_adjust_cycles(&gamepad_1, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K); |
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249 io_adjust_cycles(&gamepad_2, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K); |
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250 } |
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251 } |
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252 context->current_cycle = v_context->cycles / MCLKS_PER_68K; |
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253 } |
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254 } else if(vdp_port < 8) { |
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255 blocked = vdp_control_port_write(v_context, value); |
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256 if (blocked) { |
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257 while (blocked) { |
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258 while(v_context->flags & FLAG_DMA_RUN) { |
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259 vdp_run_dma_done(v_context, MCLKS_PER_FRAME); |
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260 if (v_context->cycles >= MCLKS_PER_FRAME) { |
215
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261 if (!headless) { |
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262 wait_render_frame(v_context); |
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263 } |
149
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264 vdp_adjust_cycles(v_context, MCLKS_PER_FRAME); |
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265 io_adjust_cycles(&gamepad_1, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K); |
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266 io_adjust_cycles(&gamepad_2, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K); |
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267 } |
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268 } |
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269 if (blocked < 0) { |
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270 blocked = vdp_control_port_write(v_context, value); |
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271 } else { |
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272 blocked = 0; |
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273 } |
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274 } |
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275 context->current_cycle = v_context->cycles / MCLKS_PER_68K; |
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276 } else { |
186
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277 adjust_int_cycle(context, v_context); |
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278 } |
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279 } else { |
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280 printf("Illegal write to HV Counter port %X\n", vdp_port); |
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281 exit(1); |
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282 } |
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283 context->current_cycle = v_context->cycles/MCLKS_PER_68K; |
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284 } else if (vdp_port < 0x18) { |
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285 //TODO: Implement PSG |
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286 } else { |
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287 //TODO: Implement undocumented test register(s) |
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288 } |
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289 return context; |
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290 } |
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291 |
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292 m68k_context * vdp_port_read(uint32_t vdp_port, m68k_context * context) |
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293 { |
198
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294 sync_components(context, 0); |
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295 vdp_context * v_context = context->video_context; |
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296 if (vdp_port < 0x10) { |
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297 if (vdp_port < 4) { |
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298 context->value = vdp_data_port_read(v_context); |
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299 } else if(vdp_port < 8) { |
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300 context->value = vdp_control_port_read(v_context); |
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301 } else { |
137 | 302 context->value = vdp_hv_counter_read(v_context); |
303 //printf("HV Counter: %X at cycle %d\n", context->value, v_context->cycles); | |
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304 } |
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305 context->current_cycle = v_context->cycles/MCLKS_PER_68K; |
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306 } else { |
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307 printf("Illegal read from PSG or test register port %X\n", vdp_port); |
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308 exit(1); |
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309 } |
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310 return context; |
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311 } |
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312 |
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313 #define TH 0x40 |
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314 #define TH_TIMEOUT 8000 |
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315 |
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316 void io_adjust_cycles(io_port * pad, uint32_t current_cycle, uint32_t deduction) |
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317 { |
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318 /*uint8_t control = pad->control | 0x80; |
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319 uint8_t th = control & pad->output; |
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320 if (pad->input[GAMEPAD_TH0] || pad->input[GAMEPAD_TH1]) { |
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321 printf("adjust_cycles | control: %X, TH: %X, GAMEPAD_TH0: %X, GAMEPAD_TH1: %X, TH Counter: %d, Timeout: %d, Cycle: %d\n", control, th, pad->input[GAMEPAD_TH0], pad->input[GAMEPAD_TH1], pad->th_counter,pad->timeout_cycle, current_cycle); |
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322 }*/ |
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323 if (current_cycle >= pad->timeout_cycle) { |
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324 pad->th_counter = 0; |
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325 } else { |
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326 pad->timeout_cycle -= deduction; |
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327 } |
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328 if (busack_cycle < CYCLE_NEVER && current_cycle < busack_cycle) { |
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329 busack_cycle -= deduction; |
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330 } |
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331 } |
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332 |
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333 void io_data_write(io_port * pad, m68k_context * context, uint8_t value) |
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334 { |
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335 if (pad->control & TH) { |
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336 //check if TH has changed |
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337 if ((pad->output & TH) ^ (value & TH)) { |
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338 if (context->current_cycle >= pad->timeout_cycle) { |
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339 pad->th_counter = 0; |
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340 } |
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341 if (!(value & TH)) { |
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342 pad->th_counter++; |
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343 } |
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344 pad->timeout_cycle = context->current_cycle + TH_TIMEOUT; |
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345 } |
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346 } |
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347 pad->output = value; |
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348 } |
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349 |
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350 void io_data_read(io_port * pad, m68k_context * context) |
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351 { |
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352 uint8_t control = pad->control | 0x80; |
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353 uint8_t th = control & pad->output; |
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354 uint8_t input; |
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355 if (context->current_cycle >= pad->timeout_cycle) { |
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356 pad->th_counter = 0; |
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357 } |
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358 /*if (pad->input[GAMEPAD_TH0] || pad->input[GAMEPAD_TH1]) { |
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359 printf("io_data_read | control: %X, TH: %X, GAMEPAD_TH0: %X, GAMEPAD_TH1: %X, TH Counter: %d, Timeout: %d, Cycle: %d\n", control, th, pad->input[GAMEPAD_TH0], pad->input[GAMEPAD_TH1], pad->th_counter,pad->timeout_cycle, context->current_cycle); |
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360 }*/ |
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361 if (th) { |
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362 if (pad->th_counter == 3) { |
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363 input = pad->input[GAMEPAD_EXTRA]; |
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364 } else { |
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365 input = pad->input[GAMEPAD_TH1]; |
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366 } |
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367 } else { |
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368 if (pad->th_counter == 3) { |
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369 input = pad->input[GAMEPAD_TH0] | 0xF; |
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370 } else if(pad->th_counter == 4) { |
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371 input = pad->input[GAMEPAD_TH0] & 0x30; |
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372 } else { |
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373 input = pad->input[GAMEPAD_TH0] | 0xC; |
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374 } |
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375 } |
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376 context->value = ((~input) & (~control)) | (pad->output & control); |
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377 /*if (pad->input[GAMEPAD_TH0] || pad->input[GAMEPAD_TH1]) { |
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378 printf ("value: %X\n", context->value); |
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379 }*/ |
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380 } |
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381 |
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382 uint32_t zram_counter = 0; |
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383 #define Z80_ACK_DELAY 3 |
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384 #define Z80_BUSY_DELAY 2//TODO: Find the actual value for this |
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385 #define Z80_REQ_BUSY 1 |
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386 #define Z80_REQ_ACK 0 |
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387 #define Z80_RES_BUSACK reset |
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388 |
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389 m68k_context * io_write(uint32_t location, m68k_context * context, uint8_t value) |
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390 { |
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391 genesis_context * gen = context->system; |
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392 if (location < 0x10000) { |
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393 if (busack_cycle > context->current_cycle) { |
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394 busack = new_busack; |
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395 busack_cycle = CYCLE_NEVER; |
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396 } |
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397 if (!(busack || reset)) { |
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398 location &= 0x7FFF; |
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399 if (location < 0x4000) { |
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400 z80_ram[location & 0x1FFF] = value; |
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401 z80_handle_code_write(location & 0x1FFF, gen->z80); |
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402 } else if (location < 0x6000) { |
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403 ym_run(gen->ym, context->current_cycle); |
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404 if (location & 1) { |
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405 ym_data_write(gen->ym, value); |
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406 } else if(location & 2) { |
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407 ym_address_write_part2(gen->ym, value); |
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408 } else { |
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409 ym_address_write_part1(gen->ym, value); |
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410 } |
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411 } |
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412 } |
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413 } else { |
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414 location &= 0x1FFF; |
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415 if (location < 0x100) { |
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416 switch(location/2) |
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417 { |
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418 case 0x1: |
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419 io_data_write(&gamepad_1, context, value); |
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420 break; |
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421 case 0x2: |
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422 io_data_write(&gamepad_2, context, value); |
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423 break; |
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424 case 0x3://PORT C Data |
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425 break; |
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426 case 0x4: |
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427 gamepad_1.control = value; |
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428 break; |
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429 case 0x5: |
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430 gamepad_2.control = value; |
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431 break; |
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432 } |
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433 } else { |
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434 if (location == 0x1100) { |
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435 sync_z80(gen->z80, context->current_cycle * MCLKS_PER_68K); |
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436 if (busack_cycle > context->current_cycle) { |
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437 busack = new_busack; |
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438 busack_cycle = CYCLE_NEVER; |
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439 } |
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440 if (value & 1) { |
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441 dputs("bus requesting Z80"); |
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442 busreq = 1; |
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443 if(!reset) { |
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444 busack_cycle = ((gen->z80->current_cycle + Z80_ACK_DELAY) * MCLKS_PER_Z80) / MCLKS_PER_68K;//context->current_cycle + Z80_ACK_DELAY; |
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445 new_busack = Z80_REQ_ACK; |
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446 } |
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447 } else { |
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448 if (busreq) { |
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449 dputs("releasing z80 bus"); |
280 | 450 #ifdef DO_DEBUG_PRINT |
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451 char fname[20]; |
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452 sprintf(fname, "zram-%d", zram_counter++); |
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453 FILE * f = fopen(fname, "wb"); |
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454 fwrite(z80_ram, 1, sizeof(z80_ram), f); |
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455 fclose(f); |
280 | 456 #endif |
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457 //TODO: Add necessary delay between release of busreq and resumption of execution |
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458 } |
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459 busreq = 0; |
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460 //busack_cycle = CYCLE_NEVER; |
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461 //busack = Z80_REQ_BUSY; |
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462 busack_cycle = ((gen->z80->current_cycle + Z80_BUSY_DELAY) * MCLKS_PER_Z80) / MCLKS_PER_68K; |
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463 new_busack = Z80_REQ_BUSY; |
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464 } |
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465 } else if (location == 0x1200) { |
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466 sync_z80(gen->z80, context->current_cycle * MCLKS_PER_68K); |
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467 if (value & 1) { |
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468 if (reset && busreq) { |
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469 new_busack = 0; |
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470 busack_cycle = ((gen->z80->current_cycle + Z80_ACK_DELAY) * MCLKS_PER_Z80) / MCLKS_PER_68K;//context->current_cycle + Z80_ACK_DELAY; |
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471 } |
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472 //TODO: Deal with the scenario in which reset is not asserted long enough |
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473 if (reset) { |
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474 need_reset = 1; |
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475 //TODO: Add necessary delay between release of reset and start of execution |
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476 gen->z80->current_cycle = (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80; |
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477 } |
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478 reset = 0; |
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479 } else { |
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480 reset = 1; |
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481 } |
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482 } |
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483 } |
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484 } |
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485 return context; |
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486 } |
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487 |
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488 m68k_context * io_write_w(uint32_t location, m68k_context * context, uint16_t value) |
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489 { |
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490 genesis_context * gen = context->system; |
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491 if (location < 0x10000) { |
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492 if (busack_cycle > context->current_cycle) { |
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493 busack = new_busack; |
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494 busack_cycle = CYCLE_NEVER; |
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495 } |
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496 if (!(busack || reset)) { |
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497 location &= 0x7FFF; |
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498 if (location < 0x4000) { |
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499 z80_ram[location & 0x1FFE] = value >> 8; |
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500 z80_handle_code_write(location & 0x1FFE, gen->z80); |
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501 } else if (location < 0x6000) { |
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502 ym_run(gen->ym, context->current_cycle); |
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503 if (location & 1) { |
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504 ym_data_write(gen->ym, value >> 8); |
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505 } else if(location & 2) { |
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506 ym_address_write_part2(gen->ym, value >> 8); |
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507 } else { |
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508 ym_address_write_part1(gen->ym, value >> 8); |
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509 } |
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510 } |
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511 } |
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512 } else { |
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513 location &= 0x1FFF; |
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514 if (location < 0x100) { |
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515 switch(location/2) |
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516 { |
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517 case 0x1: |
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518 io_data_write(&gamepad_1, context, value); |
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519 break; |
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520 case 0x2: |
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521 io_data_write(&gamepad_2, context, value); |
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522 break; |
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523 case 0x3://PORT C Data |
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524 break; |
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525 case 0x4: |
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526 gamepad_1.control = value; |
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527 break; |
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528 case 0x5: |
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529 gamepad_2.control = value; |
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530 break; |
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531 } |
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532 } else { |
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533 //printf("IO Write of %X to %X @ %d\n", value, location, context->current_cycle); |
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534 if (location == 0x1100) { |
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535 sync_z80(gen->z80, context->current_cycle * MCLKS_PER_68K); |
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536 if (busack_cycle > context->current_cycle) { |
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537 busack = new_busack; |
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538 busack_cycle = CYCLE_NEVER; |
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539 } |
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540 if (value & 0x100) { |
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541 dprintf("bus requesting Z80 @ %d\n", (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80); |
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542 busreq = 1; |
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543 if(!reset) { |
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544 busack_cycle = ((gen->z80->current_cycle + Z80_ACK_DELAY) * MCLKS_PER_Z80) / MCLKS_PER_68K;//context->current_cycle + Z80_ACK_DELAY; |
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545 new_busack = Z80_REQ_ACK; |
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546 } |
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547 } else { |
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548 if (busreq) { |
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549 dprintf("releasing Z80 bus @ %d\n", (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80); |
280 | 550 #ifdef DO_DEBUG_PRINT |
279
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551 char fname[20]; |
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552 sprintf(fname, "zram-%d", zram_counter++); |
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553 FILE * f = fopen(fname, "wb"); |
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554 fwrite(z80_ram, 1, sizeof(z80_ram), f); |
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555 fclose(f); |
280 | 556 #endif |
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557 //TODO: Add necessary delay between release of busreq and resumption of execution |
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558 } |
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559 busreq = 0; |
289
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|
560 //busack_cycle = CYCLE_NEVER; |
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|
561 //busack = Z80_REQ_BUSY; |
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diff
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|
562 busack_cycle = ((gen->z80->current_cycle + Z80_BUSY_DELAY) * MCLKS_PER_Z80) / MCLKS_PER_68K; |
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563 new_busack = Z80_REQ_BUSY; |
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|
564 } |
153
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565 } else if (location == 0x1200) { |
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566 sync_z80(gen->z80, context->current_cycle * MCLKS_PER_68K); |
153
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|
567 if (value & 0x100) { |
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diff
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|
568 if (reset && busreq) { |
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diff
changeset
|
569 new_busack = 0; |
289
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570 busack_cycle = ((gen->z80->current_cycle + Z80_ACK_DELAY) * MCLKS_PER_Z80) / MCLKS_PER_68K;//context->current_cycle + Z80_ACK_DELAY; |
153
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571 } |
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572 //TODO: Deal with the scenario in which reset is not asserted long enough |
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573 if (reset) { |
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574 need_reset = 1; |
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575 //TODO: Add necessary delay between release of reset and start of execution |
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576 } |
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577 reset = 0; |
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578 } else { |
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579 reset = 1; |
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580 } |
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581 } |
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582 } |
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|
583 } |
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parents:
diff
changeset
|
584 return context; |
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diff
changeset
|
585 } |
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diff
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|
586 |
130
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115
diff
changeset
|
587 #define USA 0x80 |
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115
diff
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|
588 #define JAP 0x00 |
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diff
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|
589 #define EUR 0xC0 |
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115
diff
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|
590 #define NO_DISK 0x20 |
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591 uint8_t version_reg = NO_DISK | USA; |
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|
592 |
88
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|
593 m68k_context * io_read(uint32_t location, m68k_context * context) |
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diff
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|
594 { |
288
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280
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|
595 genesis_context *gen = context->system; |
153
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596 if (location < 0x10000) { |
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597 if (busack_cycle > context->current_cycle) { |
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|
598 busack = new_busack; |
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|
599 busack_cycle = CYCLE_NEVER; |
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diff
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|
600 } |
289
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288
diff
changeset
|
601 if (!(busack==Z80_REQ_BUSY || reset)) { |
153
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602 location &= 0x7FFF; |
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603 if (location < 0x4000) { |
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604 context->value = z80_ram[location & 0x1FFF]; |
288
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280
diff
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|
605 } else if (location < 0x6000) { |
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606 ym_run(gen->ym, context->current_cycle); |
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|
607 context->value = ym_read_status(gen->ym); |
153
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149
diff
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608 } else { |
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609 context->value = 0xFF; |
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diff
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610 } |
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611 } else { |
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612 context->value = 0xFF; |
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diff
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|
613 } |
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|
614 } else { |
153
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615 location &= 0x1FFF; |
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diff
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616 if (location < 0x100) { |
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617 switch(location/2) |
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618 { |
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619 case 0x0: |
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620 //version bits should be 0 for now since we're not emulating TMSS |
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621 //Not sure about the other bits |
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622 context->value = version_reg; |
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623 break; |
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624 case 0x1: |
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625 io_data_read(&gamepad_1, context); |
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626 break; |
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627 case 0x2: |
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628 io_data_read(&gamepad_2, context); |
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629 break; |
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630 case 0x3://PORT C Data |
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631 break; |
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632 case 0x4: |
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633 context->value = gamepad_1.control; |
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634 break; |
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635 case 0x5: |
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636 context->value = gamepad_2.control; |
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637 break; |
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638 } |
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639 } else { |
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640 if (location == 0x1100) { |
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641 if (busack_cycle > context->current_cycle) { |
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642 busack = new_busack; |
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643 busack_cycle = CYCLE_NEVER; |
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644 } |
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645 context->value = Z80_RES_BUSACK || busack; |
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646 //printf("Byte read of BUSREQ returned %d @ %d (reset: %d, busack: %d)\n", context->value, context->current_cycle, reset, busack); |
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647 } else if (location == 0x1200) { |
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648 context->value = !reset; |
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649 } else { |
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650 printf("Byte read of unknown IO location: %X\n", location); |
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651 } |
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652 } |
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653 } |
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|
654 return context; |
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|
655 } |
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656 |
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657 m68k_context * io_read_w(uint32_t location, m68k_context * context) |
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658 { |
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659 genesis_context * gen = context->system; |
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660 if (location < 0x10000) { |
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661 if (busack_cycle > context->current_cycle) { |
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662 busack = new_busack; |
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663 busack_cycle = CYCLE_NEVER; |
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664 } |
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665 if (!(busack==Z80_REQ_BUSY || reset)) { |
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666 location &= 0x7FFF; |
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667 uint16_t value; |
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668 if (location < 0x4000) { |
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669 value = z80_ram[location & 0x1FFE]; |
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670 } else if (location < 0x6000) { |
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671 ym_run(gen->ym, context->current_cycle); |
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672 value = ym_read_status(gen->ym); |
153
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673 } else { |
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674 value = 0xFF; |
153
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675 } |
288
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676 context->value = value | (value << 8); |
153
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677 } else { |
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678 context->value = 0xFFFF; |
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|
679 } |
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|
680 } else { |
153
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|
681 location &= 0x1FFF; |
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|
682 if (location < 0x100) { |
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149
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|
683 switch(location/2) |
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diff
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|
684 { |
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|
685 case 0x0: |
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|
686 //version bits should be 0 for now since we're not emulating TMSS |
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149
diff
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|
687 //Not sure about the other bits |
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|
688 context->value = 0; |
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|
689 break; |
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|
690 case 0x1: |
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|
691 io_data_read(&gamepad_1, context); |
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|
692 break; |
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|
693 case 0x2: |
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|
694 io_data_read(&gamepad_2, context); |
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|
695 break; |
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|
696 case 0x3://PORT C Data |
42c031184e8a
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diff
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|
697 break; |
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diff
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|
698 case 0x4: |
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|
699 context->value = gamepad_1.control; |
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|
700 break; |
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|
701 case 0x5: |
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|
702 context->value = gamepad_2.control; |
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|
703 break; |
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|
704 case 0x6: |
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|
705 //PORT C Control |
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|
706 context->value = 0; |
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|
707 break; |
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|
708 } |
153
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|
709 context->value = context->value | (context->value << 8); |
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|
710 //printf("Word read to %X returned %d\n", location, context->value); |
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|
711 } else { |
153
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|
712 if (location == 0x1100) { |
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|
713 if (busack_cycle > context->current_cycle) { |
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|
714 busack = new_busack; |
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|
715 busack_cycle = CYCLE_NEVER; |
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|
716 } |
289
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|
717 context->value = (Z80_RES_BUSACK || busack) << 8; |
153
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718 //printf("Word read of BUSREQ returned %d\n", context->value); |
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719 } else if (location == 0x1200) { |
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720 context->value = (!reset) << 8; |
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|
721 } else { |
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diff
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|
722 printf("Word read of unknown IO location: %X\n", location); |
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|
723 } |
88
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|
724 } |
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diff
changeset
|
725 } |
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parents:
diff
changeset
|
726 return context; |
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diff
changeset
|
727 } |
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diff
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|
728 |
290
171f97e70d85
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289
diff
changeset
|
729 z80_context * z80_write_ym(uint16_t location, z80_context * context, uint8_t value) |
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289
diff
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|
730 { |
171f97e70d85
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diff
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|
731 genesis_context * gen = context->system; |
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|
732 ym_run(gen->ym, (context->current_cycle * MCLKS_PER_Z80) / MCLKS_PER_68K); |
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|
733 if (location & 1) { |
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|
734 ym_data_write(gen->ym, value); |
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735 } else if (location & 2) { |
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736 ym_address_write_part2(gen->ym, value); |
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737 } else { |
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|
738 ym_address_write_part1(gen->ym, value); |
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739 } |
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740 return context; |
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741 } |
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742 |
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743 uint8_t z80_read_ym(uint16_t location, z80_context * context) |
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744 { |
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745 genesis_context * gen = context->system; |
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746 ym_run(gen->ym, (context->current_cycle * MCLKS_PER_Z80) / MCLKS_PER_68K); |
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747 return ym_read_status(gen->ym); |
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748 } |
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|
749 |
184
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750 typedef struct bp_def { |
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751 struct bp_def * next; |
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752 uint32_t address; |
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753 uint32_t index; |
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754 } bp_def; |
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755 |
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756 bp_def * breakpoints = NULL; |
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757 uint32_t bp_index = 0; |
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758 |
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759 bp_def ** find_breakpoint(bp_def ** cur, uint32_t address) |
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760 { |
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761 while (*cur) { |
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762 if ((*cur)->address == address) { |
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763 break; |
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764 } |
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765 cur = &((*cur)->next); |
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766 } |
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767 return cur; |
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768 } |
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769 |
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770 bp_def ** find_breakpoint_idx(bp_def ** cur, uint32_t index) |
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771 { |
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772 while (*cur) { |
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773 if ((*cur)->index == index) { |
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774 break; |
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775 } |
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776 cur = &((*cur)->next); |
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777 } |
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778 return cur; |
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779 } |
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780 |
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781 char * find_param(char * buf) |
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782 { |
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783 for (; *buf; buf++) { |
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784 if (*buf == ' ') { |
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785 if (*(buf+1)) { |
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786 return buf+1; |
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787 } |
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788 } |
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789 } |
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790 return NULL; |
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791 } |
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792 |
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793 void strip_nl(char * buf) |
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794 { |
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795 for(; *buf; buf++) { |
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796 if (*buf == '\n') { |
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797 *buf = 0; |
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798 return; |
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|
799 } |
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800 } |
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|
801 } |
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802 |
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803 m68k_context * debugger(m68k_context * context, uint32_t address) |
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804 { |
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805 static char last_cmd[1024]; |
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806 char input_buf[1024]; |
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807 static uint32_t branch_t; |
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808 static uint32_t branch_f; |
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|
809 m68kinst inst; |
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810 //probably not necessary, but let's play it safe |
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811 address &= 0xFFFFFF; |
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812 if (address == branch_t) { |
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813 bp_def ** f_bp = find_breakpoint(&breakpoints, branch_f); |
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814 if (!*f_bp) { |
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815 remove_breakpoint(context, branch_f); |
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816 } |
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817 branch_t = branch_f = 0; |
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818 } else if(address == branch_f) { |
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819 bp_def ** t_bp = find_breakpoint(&breakpoints, branch_t); |
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820 if (!*t_bp) { |
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821 remove_breakpoint(context, branch_t); |
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822 } |
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823 branch_t = branch_f = 0; |
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824 } |
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825 //Check if this is a user set breakpoint, or just a temporary one |
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826 bp_def ** this_bp = find_breakpoint(&breakpoints, address); |
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827 if (*this_bp) { |
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828 printf("Breakpoint %d hit\n", (*this_bp)->index); |
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829 } else { |
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830 remove_breakpoint(context, address); |
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831 } |
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832 uint16_t * pc; |
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833 if (address < 0x400000) { |
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834 pc = cart + address/2; |
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835 } else if(address > 0xE00000) { |
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836 pc = ram + (address & 0xFFFF)/2; |
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837 } else { |
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838 fprintf(stderr, "Entered debugger at address %X\n", address); |
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839 exit(1); |
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840 } |
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841 uint16_t * after_pc = m68k_decode(pc, &inst, address); |
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842 m68k_disasm(&inst, input_buf); |
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843 printf("%X: %s\n", address, input_buf); |
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844 uint32_t after = address + (after_pc-pc)*2; |
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845 int debugging = 1; |
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|
846 while (debugging) { |
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847 fputs(">", stdout); |
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848 if (!fgets(input_buf, sizeof(input_buf), stdin)) { |
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849 fputs("fgets failed", stderr); |
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850 break; |
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851 } |
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852 strip_nl(input_buf); |
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853 //hitting enter repeats last command |
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854 if (input_buf[0]) { |
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855 strcpy(last_cmd, input_buf); |
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856 } else { |
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857 strcpy(input_buf, last_cmd); |
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858 } |
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859 char * param; |
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860 char format[8]; |
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861 uint32_t value; |
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862 bp_def * new_bp; |
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863 switch(input_buf[0]) |
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864 { |
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865 case 'c': |
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866 puts("Continuing"); |
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867 debugging = 0; |
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868 break; |
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869 case 'b': |
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870 param = find_param(input_buf); |
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871 if (!param) { |
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872 fputs("b command requires a parameter\n", stderr); |
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873 break; |
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874 } |
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875 value = strtol(param, NULL, 16); |
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876 insert_breakpoint(context, value, (uint8_t *)debugger); |
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877 new_bp = malloc(sizeof(bp_def)); |
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878 new_bp->next = breakpoints; |
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879 new_bp->address = value; |
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880 new_bp->index = bp_index++; |
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881 breakpoints = new_bp; |
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882 printf("Breakpoint %d set at %X\n", new_bp->index, value); |
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883 break; |
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884 case 'a': |
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885 param = find_param(input_buf); |
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886 if (!param) { |
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887 fputs("a command requires a parameter\n", stderr); |
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888 break; |
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889 } |
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890 value = strtol(param, NULL, 16); |
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891 insert_breakpoint(context, value, (uint8_t *)debugger); |
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892 debugging = 0; |
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893 break; |
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894 case 'd': |
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|
895 param = find_param(input_buf); |
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896 if (!param) { |
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897 fputs("b command requires a parameter\n", stderr); |
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898 break; |
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899 } |
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|
900 value = atoi(param); |
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901 this_bp = find_breakpoint_idx(&breakpoints, value); |
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|
902 if (!*this_bp) { |
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|
903 fprintf(stderr, "Breakpoint %d does not exist\n", value); |
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|
904 break; |
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|
905 } |
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Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
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166
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|
906 new_bp = *this_bp; |
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|
907 *this_bp = (*this_bp)->next; |
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Fix a bunch of bugs in the CPU core, add a 68K debugger
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166
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|
908 free(new_bp); |
ebcbdd1c4cc8
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|
909 break; |
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Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
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|
910 case 'p': |
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|
911 strcpy(format, "%s: %d\n"); |
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|
912 if (input_buf[1] == '/') { |
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166
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|
913 switch (input_buf[2]) |
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Mike Pavone <pavone@retrodev.com>
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|
914 { |
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Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
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|
915 case 'x': |
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Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
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|
916 case 'X': |
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Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
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166
diff
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|
917 case 'd': |
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|
918 case 'c': |
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|
919 format[5] = input_buf[2]; |
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920 break; |
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|
921 default: |
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Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
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166
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|
922 fprintf(stderr, "Unrecognized format character: %c\n", input_buf[2]); |
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923 } |
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|
924 } |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
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|
925 param = find_param(input_buf); |
ebcbdd1c4cc8
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|
926 if (!param) { |
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|
927 fputs("p command requires a parameter\n", stderr); |
ebcbdd1c4cc8
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166
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|
928 break; |
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|
929 } |
ebcbdd1c4cc8
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|
930 if (param[0] == 'd' && param[1] >= '0' && param[1] <= '7') { |
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166
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|
931 value = context->dregs[param[1]-'0']; |
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|
932 } else if (param[0] == 'a' && param[1] >= '0' && param[1] <= '7') { |
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Fix a bunch of bugs in the CPU core, add a 68K debugger
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|
933 value = context->aregs[param[1]-'0']; |
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|
934 } else if (param[0] == 'S' && param[1] == 'R') { |
ebcbdd1c4cc8
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changeset
|
935 value = (context->status << 8); |
ebcbdd1c4cc8
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166
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|
936 for (int flag = 0; flag < 5; flag++) { |
ebcbdd1c4cc8
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|
937 value |= context->flags[flag] << (4-flag); |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
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166
diff
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|
938 } |
185
b204fbed4efe
Add ability to print out current 68K cycle in debugger
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parents:
184
diff
changeset
|
939 } else if(param[0] == 'c') { |
b204fbed4efe
Add ability to print out current 68K cycle in debugger
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184
diff
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|
940 value = context->current_cycle; |
184
ebcbdd1c4cc8
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|
941 } else if (param[0] == '0' && param[1] == 'x') { |
ebcbdd1c4cc8
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changeset
|
942 uint32_t p_addr = strtol(param+2, NULL, 16); |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
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166
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changeset
|
943 value = read_dma_value(p_addr/2); |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
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|
944 } else { |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
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166
diff
changeset
|
945 fprintf(stderr, "Unrecognized parameter to p: %s\n", param); |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
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166
diff
changeset
|
946 break; |
ebcbdd1c4cc8
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166
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|
947 } |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
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changeset
|
948 printf(format, param, value); |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
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166
diff
changeset
|
949 break; |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
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166
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changeset
|
950 case 'n': |
ebcbdd1c4cc8
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166
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changeset
|
951 //TODO: Deal with jmp, dbcc, rtr and rte |
ebcbdd1c4cc8
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parents:
166
diff
changeset
|
952 if (inst.op == M68K_RTS) { |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
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166
diff
changeset
|
953 after = (read_dma_value(context->aregs[7]/2) << 16) | read_dma_value(context->aregs[7]/2 + 1); |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
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166
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|
954 } else if(inst.op == M68K_BCC && inst.extra.cond != COND_FALSE) { |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
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166
diff
changeset
|
955 if (inst.extra.cond = COND_TRUE) { |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
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166
diff
changeset
|
956 after = inst.address + 2 + inst.src.params.immed; |
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957 } else { |
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958 branch_f = after; |
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959 branch_t = inst.address + 2 + inst.src.params.immed; |
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960 insert_breakpoint(context, branch_t, (uint8_t *)debugger); |
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961 } |
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962 } |
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963 insert_breakpoint(context, after, (uint8_t *)debugger); |
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964 debugging = 0; |
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965 break; |
327
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966 case 'v': { |
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967 genesis_context * gen = context->system; |
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968 //VDP debug commands |
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969 switch(input_buf[1]) |
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970 { |
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|
971 case 's': |
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972 vdp_print_sprite_table(gen->vdp); |
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|
973 break; |
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|
974 case 'r': |
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975 vdp_print_reg_explain(gen->vdp); |
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976 break; |
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|
977 } |
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|
978 break; |
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979 } |
184
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980 case 'q': |
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981 puts("Quitting"); |
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982 exit(0); |
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983 break; |
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984 default: |
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985 fprintf(stderr, "Unrecognized debugger command %s\n", input_buf); |
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986 break; |
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987 } |
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988 } |
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989 return context; |
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990 } |
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991 |
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992 void init_run_cpu(genesis_context * gen, int debug, FILE * address_log) |
211 | 993 { |
994 m68k_context context; | |
995 x86_68k_options opts; | |
288
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996 gen->m68k = &context; |
211 | 997 init_x86_68k_opts(&opts); |
998 opts.address_log = address_log; | |
999 init_68k_context(&context, opts.native_code_map, &opts); | |
1000 | |
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1001 context.video_context = gen->vdp; |
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1002 context.system = gen; |
211 | 1003 //cartridge ROM |
1004 context.mem_pointers[0] = cart; | |
1005 context.target_cycle = context.sync_cycle = MCLKS_PER_FRAME/MCLKS_PER_68K; | |
1006 //work RAM | |
1007 context.mem_pointers[1] = ram; | |
1008 uint32_t address; | |
1009 /*address = cart[0x68/2] << 16 | cart[0x6A/2]; | |
1010 translate_m68k_stream(address, &context); | |
1011 address = cart[0x70/2] << 16 | cart[0x72/2]; | |
1012 translate_m68k_stream(address, &context); | |
1013 address = cart[0x78/2] << 16 | cart[0x7A/2]; | |
1014 translate_m68k_stream(address, &context);*/ | |
1015 address = cart[2] << 16 | cart[3]; | |
1016 translate_m68k_stream(address, &context); | |
1017 if (debug) { | |
1018 insert_breakpoint(&context, address, (uint8_t *)debugger); | |
1019 } | |
1020 m68k_reset(&context); | |
1021 } | |
1022 | |
88
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1023 int main(int argc, char ** argv) |
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1024 { |
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1025 if (argc < 2) { |
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1026 fputs("Usage: blastem FILENAME\n", stderr); |
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1027 return 1; |
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1028 } |
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1029 if(!load_rom(argv[1])) { |
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|
1030 fprintf(stderr, "Failed to open %s for reading\n", argv[1]); |
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|
1031 return 1; |
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1032 } |
184
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1033 int width = -1; |
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1034 int height = -1; |
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1035 int debug = 0; |
197
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1036 FILE *address_log = NULL; |
184
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1037 for (int i = 2; i < argc; i++) { |
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1038 if (argv[i][0] == '-') { |
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1039 switch(argv[i][1]) { |
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1040 case 'd': |
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1041 debug = 1; |
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1042 break; |
197
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1043 case 'l': |
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1044 address_log = fopen("address.log", "w"); |
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1045 break; |
215
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diff
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|
1046 case 'v': |
2b1c2c28b261
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Mike Pavone <pavone@retrodev.com>
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diff
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|
1047 headless = 1; |
2b1c2c28b261
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211
diff
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|
1048 break; |
265
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264
diff
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|
1049 case 'n': |
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264
diff
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|
1050 z80_enabled = 0; |
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|
1051 break; |
184
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1052 default: |
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1053 fprintf(stderr, "Unrecognized switch %s\n", argv[i]); |
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1054 return 1; |
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1055 } |
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1056 } else if (width < 0) { |
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1057 width = atoi(argv[i]); |
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1058 } else if (height < 0) { |
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1059 height = atoi(argv[i]); |
88
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|
1060 } |
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|
1061 } |
184
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1062 width = width < 320 ? 320 : width; |
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1063 height = height < 240 ? (width/320) * 240 : height; |
215
2b1c2c28b261
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211
diff
changeset
|
1064 if (!headless) { |
2b1c2c28b261
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211
diff
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|
1065 render_init(width, height); |
2b1c2c28b261
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211
diff
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|
1066 } |
88
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|
1067 vdp_context v_context; |
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|
1068 |
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|
1069 init_vdp_context(&v_context); |
260
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1070 |
288
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1071 ym2612_context y_context; |
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1072 ym_init(&y_context); |
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1073 |
260
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|
1074 z80_context z_context; |
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|
1075 x86_z80_options z_opts; |
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|
1076 init_x86_z80_opts(&z_opts); |
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1077 init_z80_context(&z_context, &z_opts); |
290
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|
1078 |
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|
1079 genesis_context gen; |
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|
1080 |
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|
1081 z_context.system = &gen; |
260
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|
1082 z_context.mem_pointers[0] = z80_ram; |
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|
1083 z_context.sync_cycle = z_context.target_cycle = MCLKS_PER_FRAME/MCLKS_PER_Z80; |
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|
1084 z_context.int_cycle = CYCLE_NEVER; |
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|
1085 z_context.mem_pointers[1] = z_context.mem_pointers[2] = (uint8_t *)cart; |
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1086 |
288
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1087 gen.z80 = &z_context; |
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1088 gen.vdp = &v_context; |
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1089 gen.ym = &y_context; |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
280
diff
changeset
|
1090 |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
280
diff
changeset
|
1091 init_run_cpu(&gen, debug, address_log); |
88
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1092 return 0; |
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1093 } |