Mercurial > repos > blastem
annotate ym2612.c @ 473:1358045c0bdd
Implement undocumented 8-bit VRAM read
| author | Mike Pavone <pavone@retrodev.com> |
|---|---|
| date | Sun, 15 Sep 2013 23:00:17 -0700 |
| parents | 140af5509ce7 |
| children | 3e1573fa22cf |
| rev | line source |
|---|---|
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1 /* |
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2 Copyright 2013 Michael Pavone |
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #include <string.h> |
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7 #include <math.h> |
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8 #include <stdio.h> |
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9 #include <stdlib.h> |
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10 #include "ym2612.h" |
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11 #include "render.h" |
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12 #include "wave.h" |
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13 |
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14 //#define DO_DEBUG_PRINT |
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15 #ifdef DO_DEBUG_PRINT |
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16 #define dfprintf fprintf |
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17 #define dfopen(var, fname, mode) var=fopen(fname, mode) |
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18 #else |
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19 #define dfprintf |
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20 #define dfopen(var, fname, mode) |
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21 #endif |
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22 |
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23 #define BUSY_CYCLES 17 |
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24 #define OP_UPDATE_PERIOD 144 |
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25 |
| 362 | 26 enum { |
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27 REG_LFO = 0x22, |
| 362 | 28 REG_TIMERA_HIGH = 0x24, |
| 29 REG_TIMERA_LOW, | |
| 30 REG_TIMERB, | |
| 31 REG_TIME_CTRL, | |
| 32 REG_KEY_ONOFF, | |
| 33 REG_DAC = 0x2A, | |
| 34 REG_DAC_ENABLE, | |
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35 |
| 362 | 36 REG_DETUNE_MULT = 0x30, |
| 37 REG_TOTAL_LEVEL = 0x40, | |
| 38 REG_ATTACK_KS = 0x50, | |
| 39 REG_DECAY_AM = 0x60, | |
| 40 REG_SUSTAIN_RATE = 0x70, | |
| 41 REG_S_LVL_R_RATE = 0x80, | |
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42 |
| 362 | 43 REG_FNUM_LOW = 0xA0, |
| 44 REG_BLOCK_FNUM_H = 0xA4, | |
| 45 REG_FNUM_LOW_CH3 = 0xA8, | |
| 46 REG_BLOCK_FN_CH3 = 0xAC, | |
| 47 REG_ALG_FEEDBACK = 0xB0, | |
| 48 REG_LR_AMS_PMS = 0xB4 | |
| 49 }; | |
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50 |
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51 #define BIT_TIMERA_ENABLE 0x1 |
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52 #define BIT_TIMERB_ENABLE 0x2 |
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53 #define BIT_TIMERA_OVEREN 0x4 |
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54 #define BIT_TIMERB_OVEREN 0x8 |
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55 #define BIT_TIMERA_RESET 0x10 |
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56 #define BIT_TIMERB_RESET 0x20 |
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57 |
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58 #define BIT_STATUS_TIMERA 0x1 |
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59 #define BIT_STATUS_TIMERB 0x2 |
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60 |
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61 enum { |
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62 PHASE_ATTACK, |
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63 PHASE_DECAY, |
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64 PHASE_SUSTAIN, |
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65 PHASE_RELEASE |
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66 }; |
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67 |
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68 uint8_t did_tbl_init = 0; |
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69 //According to Nemesis, real hardware only uses a 256 entry quarter sine table; however, |
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70 //memory is cheap so using a half sine table will probably save some cycles |
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71 //a full sine table would be nice, but negative numbers don't get along with log2 |
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72 #define SINE_TABLE_SIZE 512 |
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73 uint16_t sine_table[SINE_TABLE_SIZE]; |
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74 //Similar deal here with the power table for log -> linear conversion |
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75 //According to Nemesis, real hardware only uses a 256 entry table for the fractional part |
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76 //and uses the whole part as a shift amount. |
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77 #define POW_TABLE_SIZE (1 << 13) |
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78 uint16_t pow_table[POW_TABLE_SIZE]; |
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79 |
| 362 | 80 uint16_t rate_table_base[] = { |
| 81 //main portion | |
| 82 0,1,0,1,0,1,0,1, | |
| 83 0,1,0,1,1,1,0,1, | |
| 84 0,1,1,1,0,1,1,1, | |
| 85 0,1,1,1,1,1,1,1, | |
| 86 //top end | |
| 87 1,1,1,1,1,1,1,1, | |
| 88 1,1,1,2,1,1,1,2, | |
| 89 1,2,1,2,1,2,1,2, | |
| 90 1,2,2,2,1,2,2,2, | |
| 91 }; | |
| 92 | |
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93 uint16_t rate_table[64*8]; |
| 362 | 94 |
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95 uint8_t lfo_timer_values[] = {108, 77, 71, 67, 62, 44, 8, 5}; |
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96 uint8_t lfo_pm_base[][8] = { |
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97 {0, 0, 0, 0, 0, 0, 0, 0}, |
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98 {0, 0, 0, 0, 4, 4, 4, 4}, |
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99 {0, 0, 0, 4, 4, 4, 8, 8}, |
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100 {0, 0, 4, 4, 8, 8, 0xc, 0xc}, |
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101 {0, 0, 4, 8, 8, 8, 0xc,0x10}, |
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102 {0, 0, 8, 0xc,0x10,0x10,0x14,0x18}, |
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103 {0, 0,0x10,0x18,0x20,0x20,0x28,0x30}, |
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104 {0, 0,0x20,0x30,0x40,0x40,0x50,0x60} |
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105 }; |
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106 int16_t lfo_pm_table[128 * 32 * 8]; |
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107 |
| 362 | 108 #define MAX_ENVELOPE 0xFFC |
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109 #define YM_DIVIDER 2 |
| 374 | 110 #define CYCLE_NEVER 0xFFFFFFFF |
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111 |
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112 uint16_t round_fixed_point(double value, int dec_bits) |
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113 { |
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114 return value * (1 << dec_bits) + 0.5; |
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115 } |
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116 |
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117 FILE * debug_file = NULL; |
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118 uint32_t first_key_on=0; |
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119 |
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120 ym2612_context * log_context = NULL; |
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121 |
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122 void ym_finalize_log() |
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123 { |
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124 for (int i = 0; i < NUM_CHANNELS; i++) { |
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125 if (log_context->channels[i].logfile) { |
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126 wave_finalize(log_context->channels[i].logfile); |
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127 } |
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128 } |
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129 } |
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130 |
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131 void ym_init(ym2612_context * context, uint32_t sample_rate, uint32_t master_clock, uint32_t clock_div, uint32_t sample_limit, uint32_t options) |
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132 { |
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133 dfopen(debug_file, "ym_debug.txt", "w"); |
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134 memset(context, 0, sizeof(*context)); |
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135 context->audio_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
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136 context->back_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
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137 context->buffer_inc = ((double)sample_rate / (double)master_clock) * clock_div * 6; |
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138 context->clock_inc = clock_div * 6; |
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139 context->sample_limit = sample_limit*2; |
| 374 | 140 context->write_cycle = CYCLE_NEVER; |
| 362 | 141 for (int i = 0; i < NUM_OPERATORS; i++) { |
| 142 context->operators[i].envelope = MAX_ENVELOPE; | |
| 143 context->operators[i].env_phase = PHASE_RELEASE; | |
| 144 } | |
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145 //some games seem to expect that the LR flags start out as 1 |
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146 for (int i = 0; i < NUM_CHANNELS; i++) { |
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147 context->channels[i].lr = 0xC0; |
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148 if (options & YM_OPT_WAVE_LOG) { |
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149 char fname[64]; |
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150 sprintf(fname, "ym_channel_%d.wav", i); |
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151 FILE * f = context->channels[i].logfile = fopen(fname, "wb"); |
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152 if (!f) { |
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153 fprintf(stderr, "Failed to open WAVE log file %s for writing\n", fname); |
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154 continue; |
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155 } |
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156 if (!wave_init(f, sample_rate, 16, 1)) { |
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157 fclose(f); |
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158 context->channels[i].logfile = NULL; |
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159 } |
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160 } |
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161 } |
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162 if (options & YM_OPT_WAVE_LOG) { |
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163 log_context = context; |
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164 atexit(ym_finalize_log); |
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165 } |
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166 if (!did_tbl_init) { |
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167 //populate sine table |
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168 for (int32_t i = 0; i < 512; i++) { |
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169 double sine = sin( ((double)(i*2+1) / SINE_TABLE_SIZE) * M_PI_2 ); |
|
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170 |
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171 //table stores 4.8 fixed pointed representation of the base 2 log |
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172 sine_table[i] = round_fixed_point(-log2(sine), 8); |
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173 } |
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174 //populate power table |
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175 for (int32_t i = 0; i < POW_TABLE_SIZE; i++) { |
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176 double linear = pow(2, -((double)((i & 0xFF)+1) / 256.0)); |
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177 int32_t tmp = round_fixed_point(linear, 11); |
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178 int32_t shift = (i >> 8) - 2; |
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179 if (shift < 0) { |
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180 tmp <<= 0-shift; |
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181 } else { |
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182 tmp >>= shift; |
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183 } |
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184 pow_table[i] = tmp; |
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185 } |
| 362 | 186 //populate envelope generator rate table, from small base table |
| 187 for (int rate = 0; rate < 64; rate++) { | |
|
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188 for (int cycle = 0; cycle < 8; cycle++) { |
| 362 | 189 uint16_t value; |
|
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190 if (rate < 2) { |
| 362 | 191 value = 0; |
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192 } else if (rate >= 60) { |
| 362 | 193 value = 8; |
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194 } else if (rate < 8) { |
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195 value = rate_table_base[((rate & 6) == 6 ? 16 : 0) + cycle]; |
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196 } else if (rate < 48) { |
| 362 | 197 value = rate_table_base[(rate & 0x3) * 8 + cycle]; |
| 198 } else { | |
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199 value = rate_table_base[32 + (rate & 0x3) * 8 + cycle] << ((rate - 48) >> 2); |
| 362 | 200 } |
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201 rate_table[rate * 8 + cycle] = value; |
| 362 | 202 } |
| 203 } | |
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204 //populate LFO PM table from small base table |
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205 //seems like there must be a better way to derive this |
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206 for (int freq = 0; freq < 128; freq++) { |
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207 for (int pms = 0; pms < 8; pms++) { |
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208 for (int step = 0; step < 32; step++) { |
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209 int16_t value = 0; |
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210 for (int bit = 0x40, shift = 0; bit > 0; bit >>= 1, shift++) { |
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211 if (freq & bit) { |
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212 value += lfo_pm_base[pms][(step & 0x8) ? 7-step & 7 : step & 7] >> shift; |
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213 } |
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214 } |
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215 if (step & 0x10) { |
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216 value = -value; |
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217 } |
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218 lfo_pm_table[freq * 256 + pms * 32 + step] = value; |
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219 } |
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220 } |
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221 } |
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222 } |
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223 } |
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224 |
| 377 | 225 #define YM_VOLUME_DIVIDER 2 |
|
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226 #define YM_MOD_SHIFT 1 |
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227 |
| 403 | 228 #define TIMER_A_MAX 1023 |
| 229 #define TIMER_B_MAX (255*16) | |
| 230 | |
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231 void ym_run(ym2612_context * context, uint32_t to_cycle) |
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232 { |
| 362 | 233 //printf("Running YM2612 from cycle %d to cycle %d\n", context->current_cycle, to_cycle); |
| 234 //TODO: Fix channel update order OR remap channels in register write | |
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235 for (; context->current_cycle < to_cycle; context->current_cycle += context->clock_inc) { |
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236 //Update timers at beginning of 144 cycle period |
| 403 | 237 if (!context->current_op) { |
| 238 if (context->timer_control & BIT_TIMERA_ENABLE) { | |
| 239 if (context->timer_a != TIMER_A_MAX) { | |
| 240 context->timer_a++; | |
| 241 } else { | |
| 242 if (context->timer_control & BIT_TIMERA_OVEREN) { | |
| 243 context->status |= BIT_STATUS_TIMERA; | |
| 244 } | |
| 245 context->timer_a = context->timer_a_load; | |
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246 } |
|
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247 } |
| 362 | 248 if (context->timer_control & BIT_TIMERB_ENABLE) { |
| 403 | 249 if (context->timer_b != TIMER_B_MAX) { |
| 250 context->timer_b++; | |
| 251 } else { | |
| 252 if (context->timer_control & BIT_TIMERB_OVEREN) { | |
| 253 context->status |= BIT_STATUS_TIMERB; | |
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254 } |
| 403 | 255 context->timer_b = context->timer_b_load; |
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256 } |
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257 } |
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258 } |
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259 //Update LFO |
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260 if (context->lfo_enable) { |
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261 if (context->lfo_counter) { |
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262 context->lfo_counter--; |
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263 } else { |
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264 context->lfo_counter = lfo_timer_values[context->lfo_freq]; |
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265 context->lfo_am_step += 2; |
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266 context->lfo_am_step &= 0xFE; |
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267 context->lfo_pm_step = context->lfo_am_step / 8; |
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268 } |
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269 } |
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270 //Update Envelope Generator |
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271 if (!(context->current_op % 3)) { |
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272 uint32_t env_cyc = context->env_counter; |
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273 uint32_t op = context->current_env_op; |
| 362 | 274 ym_operator * operator = context->operators + op; |
| 275 ym_channel * channel = context->channels + op/4; | |
|
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276 uint8_t rate; |
| 362 | 277 for(;;) { |
| 278 rate = operator->rates[operator->env_phase]; | |
| 279 if (rate) { | |
| 280 uint8_t ks = channel->keycode >> operator->key_scaling;; | |
| 281 rate = rate*2 + ks; | |
| 282 if (rate > 63) { | |
| 283 rate = 63; | |
| 284 } | |
| 285 } | |
| 286 //Deal with "infinite" rates | |
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287 //According to Nemesis this should be handled in key-on instead |
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288 if (rate >= 62 && operator->env_phase == PHASE_ATTACK) { |
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289 operator->env_phase = PHASE_DECAY; |
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290 operator->envelope = 0; |
| 362 | 291 } else { |
| 292 break; | |
| 293 } | |
| 294 } | |
| 295 uint32_t cycle_shift = rate < 0x30 ? ((0x2F - rate) >> 2) : 0; | |
|
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296 if (first_key_on) { |
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297 dfprintf(debug_file, "Operator: %d, env rate: %d (2*%d+%d), env_cyc: %d, cycle_shift: %d, env_cyc & ((1 << cycle_shift) - 1): %d\n", op, rate, operator->rates[operator->env_phase], channel->keycode >> operator->key_scaling,env_cyc, cycle_shift, env_cyc & ((1 << cycle_shift) - 1)); |
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298 } |
| 362 | 299 if (!(env_cyc & ((1 << cycle_shift) - 1))) { |
| 300 uint32_t update_cycle = env_cyc >> cycle_shift & 0x7; | |
| 301 //envelope value is 10-bits, but it will be used as a 4.8 value | |
| 302 uint16_t envelope_inc = rate_table[rate * 8 + update_cycle] << 2; | |
| 303 if (operator->env_phase == PHASE_ATTACK) { | |
| 304 //this can probably be optimized to a single shift rather than a multiply + shift | |
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305 if (first_key_on) { |
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306 dfprintf(debug_file, "Changing op %d envelope %d by %d(%d * %d) in attack phase\n", op, operator->envelope, (~operator->envelope * envelope_inc) >> 4, ~operator->envelope, envelope_inc); |
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307 } |
| 362 | 308 operator->envelope += (~operator->envelope * envelope_inc) >> 4; |
| 309 operator->envelope &= MAX_ENVELOPE; | |
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310 if (!operator->envelope) { |
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311 operator->envelope = 0; |
| 362 | 312 operator->env_phase = PHASE_DECAY; |
| 313 } | |
| 314 } else { | |
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315 if (first_key_on) { |
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316 dfprintf(debug_file, "Changing op %d envelope %d by %d in %s phase\n", op, operator->envelope, envelope_inc, |
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317 operator->env_phase == PHASE_SUSTAIN ? "sustain" : (operator->env_phase == PHASE_DECAY ? "decay": "release")); |
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318 } |
| 362 | 319 operator->envelope += envelope_inc; |
| 320 //clamp to max attenuation value | |
| 321 if (operator->envelope > MAX_ENVELOPE) { | |
| 322 operator->envelope = MAX_ENVELOPE; | |
| 323 } | |
| 324 if (operator->env_phase == PHASE_DECAY && operator->envelope >= operator->sustain_level) { | |
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325 //operator->envelope = operator->sustain_level; |
| 362 | 326 operator->env_phase = PHASE_SUSTAIN; |
| 327 } | |
| 328 } | |
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329 } |
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330 context->current_env_op++; |
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331 if (context->current_env_op == NUM_OPERATORS) { |
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332 context->current_env_op = 0; |
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333 context->env_counter++; |
| 362 | 334 } |
| 335 } | |
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336 |
| 362 | 337 //Update Phase Generator |
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338 uint32_t channel = context->current_op / 4; |
| 362 | 339 if (channel != 5 || !context->dac_enable) { |
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340 uint32_t op = context->current_op; |
| 362 | 341 //printf("updating operator %d of channel %d\n", op, channel); |
| 342 ym_operator * operator = context->operators + op; | |
| 343 ym_channel * chan = context->channels + channel; | |
| 344 //TODO: Modulate phase by LFO if necessary | |
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345 uint16_t phase = operator->phase_counter >> 10 & 0x3FF; |
| 362 | 346 operator->phase_counter += operator->phase_inc; |
|
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347 if (chan->pms) { |
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348 //not entirely sure this will get the precision correct, but I'd like to avoid recalculating phase |
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349 //increment every update when LFO phase modulation is enabled |
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350 int16_t lfo_mod = lfo_pm_table[(chan->fnum & 0x7F0) * 16 + chan->pms + context->lfo_pm_step]; |
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351 if (operator->multiple) { |
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352 lfo_mod *= operator->multiple; |
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353 } else { |
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354 lfo_mod >>= 1; |
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355 } |
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356 operator->phase_counter += lfo_mod; |
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357 } |
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358 int16_t mod = 0; |
| 362 | 359 switch (op % 4) |
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360 { |
| 362 | 361 case 0://Operator 1 |
| 377 | 362 if (chan->feedback) { |
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363 mod = operator->output >> (9-chan->feedback); |
| 377 | 364 } |
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365 break; |
| 362 | 366 case 1://Operator 3 |
| 367 switch(chan->algorithm) | |
| 368 { | |
| 369 case 0: | |
| 370 case 2: | |
| 371 //modulate by operator 2 | |
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372 mod = context->operators[op+1].output >> YM_MOD_SHIFT; |
| 362 | 373 break; |
| 374 case 1: | |
| 375 //modulate by operator 1+2 | |
|
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376 mod = (context->operators[op-1].output + context->operators[op+1].output) >> YM_MOD_SHIFT; |
| 362 | 377 break; |
| 378 case 5: | |
| 379 //modulate by operator 1 | |
|
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380 mod = context->operators[op-1].output >> YM_MOD_SHIFT; |
| 362 | 381 } |
| 382 break; | |
| 383 case 2://Operator 2 | |
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384 if (chan->algorithm != 1 && chan->algorithm != 2 && chan->algorithm != 7) { |
| 362 | 385 //modulate by Operator 1 |
|
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386 mod = context->operators[op-2].output >> YM_MOD_SHIFT; |
| 362 | 387 } |
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388 break; |
| 362 | 389 case 3://Operator 4 |
| 390 switch(chan->algorithm) | |
| 391 { | |
| 392 case 0: | |
| 393 case 1: | |
| 394 case 4: | |
| 395 //modulate by operator 3 | |
|
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396 mod = context->operators[op-2].output >> YM_MOD_SHIFT; |
| 362 | 397 break; |
| 398 case 2: | |
| 399 //modulate by operator 1+3 | |
|
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400 mod = (context->operators[op-3].output + context->operators[op-2].output) >> YM_MOD_SHIFT; |
| 362 | 401 break; |
| 402 case 3: | |
| 403 //modulate by operator 2+3 | |
|
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404 mod = (context->operators[op-1].output + context->operators[op-2].output) >> YM_MOD_SHIFT; |
| 362 | 405 break; |
| 406 case 5: | |
| 407 //modulate by operator 1 | |
|
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408 mod = context->operators[op-3].output >> YM_MOD_SHIFT; |
| 362 | 409 break; |
| 410 } | |
|
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411 break; |
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412 } |
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413 uint16_t env = operator->envelope + operator->total_level; |
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414 if (env > MAX_ENVELOPE) { |
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415 env = MAX_ENVELOPE; |
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416 } |
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417 if (first_key_on) { |
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418 dfprintf(debug_file, "op %d, base phase: %d, mod: %d, sine: %d, out: %d\n", op, phase, mod, sine_table[(phase+mod) & 0x1FF], pow_table[sine_table[phase & 0x1FF] + env]); |
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419 } |
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420 phase += mod; |
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421 |
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422 int16_t output = pow_table[sine_table[phase & 0x1FF] + env]; |
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423 if (phase & 0x200) { |
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424 output = -output; |
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425 } |
| 362 | 426 operator->output = output; |
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427 //Update the channel output if we've updated all operators |
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428 if (op % 4 == 3) { |
| 362 | 429 if (chan->algorithm < 4) { |
| 430 chan->output = operator->output; | |
| 431 } else if(chan->algorithm == 4) { | |
|
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432 chan->output = operator->output + context->operators[channel * 4 + 2].output; |
|
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433 } else { |
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434 output = 0; |
| 362 | 435 for (uint32_t op = ((chan->algorithm == 7) ? 0 : 1) + channel*4; op < (channel+1)*4; op++) { |
| 436 output += context->operators[op].output; | |
|
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437 } |
| 362 | 438 chan->output = output; |
|
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439 } |
|
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440 if (first_key_on) { |
|
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441 int16_t value = context->channels[channel].output & 0x3FE0; |
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442 if (value & 0x2000) { |
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443 value |= 0xC000; |
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444 } |
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445 dfprintf(debug_file, "channel %d output: %d\n", channel, value / YM_VOLUME_DIVIDER); |
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446 } |
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447 } |
| 362 | 448 //puts("operator update done"); |
|
359
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449 } |
|
364
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450 context->current_op++; |
|
380
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451 context->buffer_fraction += context->buffer_inc; |
|
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452 if (context->current_op == NUM_OPERATORS) { |
|
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453 context->current_op = 0; |
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454 if (context->buffer_fraction > 1.0) { |
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455 context->buffer_fraction -= 1.0; |
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456 context->audio_buffer[context->buffer_pos] = 0; |
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457 context->audio_buffer[context->buffer_pos + 1] = 0; |
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458 for (int i = 0; i < NUM_CHANNELS; i++) { |
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459 int16_t value = context->channels[i].output & 0x3FE0; |
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460 if (value & 0x2000) { |
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461 value |= 0xC000; |
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462 } |
|
407
c3abc4ada43d
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463 if (context->channels[i].logfile) { |
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464 fwrite(&value, sizeof(value), 1, context->channels[i].logfile); |
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465 } |
|
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466 if (context->channels[i].lr & 0x80) { |
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467 context->audio_buffer[context->buffer_pos] += value / YM_VOLUME_DIVIDER; |
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468 } |
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469 if (context->channels[i].lr & 0x40) { |
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470 context->audio_buffer[context->buffer_pos+1] += value / YM_VOLUME_DIVIDER; |
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471 } |
|
380
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472 } |
|
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473 context->buffer_pos += 2; |
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474 if (context->buffer_pos == context->sample_limit) { |
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475 render_wait_ym(context); |
|
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476 } |
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477 } |
|
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478 } |
|
288
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479 } |
|
380
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480 if (context->current_cycle >= context->write_cycle + (BUSY_CYCLES * context->clock_inc / 6)) { |
|
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481 context->status &= 0x7F; |
| 374 | 482 context->write_cycle = CYCLE_NEVER; |
|
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483 } |
| 362 | 484 //printf("Done running YM2612 at cycle %d\n", context->current_cycle, to_cycle); |
|
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485 } |
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486 |
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487 void ym_address_write_part1(ym2612_context * context, uint8_t address) |
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488 { |
|
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489 //printf("address_write_part1: %X\n", address); |
| 362 | 490 context->selected_reg = address; |
| 491 context->selected_part = 0; | |
|
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492 } |
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493 |
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494 void ym_address_write_part2(ym2612_context * context, uint8_t address) |
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495 { |
|
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496 //printf("address_write_part2: %X\n", address); |
| 362 | 497 context->selected_reg = address; |
| 498 context->selected_part = 1; | |
| 499 } | |
| 500 | |
| 501 uint8_t fnum_to_keycode[] = { | |
| 502 //F11 = 0 | |
| 503 0,0,0,0,0,0,0,1, | |
| 504 //F11 = 1 | |
| 505 2,3,3,3,3,3,3,3 | |
| 506 }; | |
| 507 | |
| 508 //table courtesy of Nemesis | |
| 509 uint32_t detune_table[][4] = { | |
| 510 {0, 0, 1, 2}, //0 (0x00) | |
| 511 {0, 0, 1, 2}, //1 (0x01) | |
| 512 {0, 0, 1, 2}, //2 (0x02) | |
| 513 {0, 0, 1, 2}, //3 (0x03) | |
| 514 {0, 1, 2, 2}, //4 (0x04) | |
| 515 {0, 1, 2, 3}, //5 (0x05) | |
| 516 {0, 1, 2, 3}, //6 (0x06) | |
| 517 {0, 1, 2, 3}, //7 (0x07) | |
| 518 {0, 1, 2, 4}, //8 (0x08) | |
| 519 {0, 1, 3, 4}, //9 (0x09) | |
| 520 {0, 1, 3, 4}, //10 (0x0A) | |
| 521 {0, 1, 3, 5}, //11 (0x0B) | |
| 522 {0, 2, 4, 5}, //12 (0x0C) | |
| 523 {0, 2, 4, 6}, //13 (0x0D) | |
| 524 {0, 2, 4, 6}, //14 (0x0E) | |
| 525 {0, 2, 5, 7}, //15 (0x0F) | |
| 526 {0, 2, 5, 8}, //16 (0x10) | |
| 527 {0, 3, 6, 8}, //17 (0x11) | |
| 528 {0, 3, 6, 9}, //18 (0x12) | |
| 529 {0, 3, 7,10}, //19 (0x13) | |
| 530 {0, 4, 8,11}, //20 (0x14) | |
| 531 {0, 4, 8,12}, //21 (0x15) | |
| 532 {0, 4, 9,13}, //22 (0x16) | |
| 533 {0, 5,10,14}, //23 (0x17) | |
| 534 {0, 5,11,16}, //24 (0x18) | |
| 535 {0, 6,12,17}, //25 (0x19) | |
| 536 {0, 6,13,19}, //26 (0x1A) | |
| 537 {0, 7,14,20}, //27 (0x1B) | |
| 538 {0, 8,16,22}, //28 (0x1C) | |
| 539 {0, 8,16,22}, //29 (0x1D) | |
| 540 {0, 8,16,22}, //30 (0x1E) | |
| 541 {0, 8,16,22} | |
| 542 }; //31 (0x1F) | |
| 543 | |
| 544 void ym_update_phase_inc(ym2612_context * context, ym_operator * operator, uint32_t op) | |
| 545 { | |
| 546 uint32_t chan_num = op / 4; | |
| 547 //printf("ym_update_phase_inc | channel: %d, op: %d\n", chan_num, op); | |
| 548 //base frequency | |
| 549 ym_channel * channel = context->channels + chan_num; | |
|
383
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550 uint32_t inc, detune; |
|
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551 if (chan_num == 2 && context->ch3_mode && (op < (2*4 + 3))) { |
|
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552 inc = context->ch3_supp[op-2*4].fnum; |
|
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553 if (!context->ch3_supp[op-2*4].block) { |
|
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554 inc >>= 1; |
|
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|
555 } else { |
|
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Initial implementation of channel 3 special mode
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|
556 inc <<= (context->ch3_supp[op-2*4].block-1); |
|
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|
557 } |
|
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Initial implementation of channel 3 special mode
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|
558 //detune |
|
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559 detune = detune_table[context->ch3_supp[op-2*4].keycode][operator->detune & 0x3]; |
|
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560 } else { |
|
383
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561 inc = channel->fnum; |
|
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562 if (!channel->block) { |
|
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563 inc >>= 1; |
|
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Initial implementation of channel 3 special mode
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|
564 } else { |
|
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565 inc <<= (channel->block-1); |
|
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566 } |
|
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567 //detune |
|
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568 detune = detune_table[channel->keycode][operator->detune & 0x3]; |
|
448
e85a107e6ec0
Fix handling of key on in YM2612 core
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diff
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|
569 } |
| 362 | 570 if (operator->detune & 0x40) { |
| 571 inc -= detune; | |
| 572 //this can underflow, mask to 17-bit result | |
| 573 inc &= 0x1FFFF; | |
| 574 } else { | |
| 575 inc += detune; | |
| 576 } | |
| 577 //multiple | |
| 578 if (operator->multiple) { | |
| 579 inc *= operator->multiple; | |
| 580 } else { | |
| 581 //0.5 | |
| 582 inc >>= 1; | |
|
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|
583 } |
|
365
3ba3b6656fff
Actually save the shifted phase inc after applying the block shift
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364
diff
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|
584 //printf("phase_inc for operator %d: %d, block: %d, fnum: %d, detune: %d, multiple: %d\n", op, inc, channel->block, channel->fnum, detune, operator->multiple); |
|
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585 operator->phase_inc = inc; |
|
288
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586 } |
|
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Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
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587 |
|
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588 void ym_data_write(ym2612_context * context, uint8_t value) |
|
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589 { |
|
451
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
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590 if (context->selected_reg >= YM_REG_END) { |
| 362 | 591 return; |
|
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592 } |
|
451
b7c3b2d22858
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593 if (context->selected_part) { |
|
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594 if (context->selected_reg < YM_PART2_START) { |
|
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595 return; |
|
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596 } |
|
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597 context->part2_regs[context->selected_reg - YM_PART2_START] = value; |
|
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598 } else { |
|
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599 if (context->selected_reg < YM_PART1_START) { |
|
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600 return; |
|
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601 } |
|
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602 context->part1_regs[context->selected_reg - YM_PART1_START] = value; |
|
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603 } |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
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parents:
369
diff
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|
604 dfprintf(debug_file, "write of %X to reg %X in part %d\n", value, context->selected_reg, context->selected_part+1); |
| 362 | 605 if (context->selected_reg < 0x30) { |
| 606 //Shared regs | |
| 607 switch (context->selected_reg) | |
| 608 { | |
|
411
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609 //TODO: Test reg |
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610 case REG_LFO: |
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611 if ((value & 0x8) && !context->lfo_enable) { |
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612 printf("LFO Enabled, Freq: %d\n", value & 0x7); |
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613 } |
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614 context->lfo_enable = value & 0x8; |
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615 if (!context->lfo_enable) { |
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616 context->lfo_am_step = context->lfo_pm_step = 0; |
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617 } |
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618 context->lfo_freq = value & 0x7; |
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619 |
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620 break; |
| 362 | 621 case REG_TIMERA_HIGH: |
| 622 context->timer_a_load &= 0x3; | |
| 623 context->timer_a_load |= value << 2; | |
| 624 break; | |
| 625 case REG_TIMERA_LOW: | |
| 626 context->timer_a_load &= 0xFFFC; | |
| 627 context->timer_a_load |= value & 0x3; | |
| 628 break; | |
| 629 case REG_TIMERB: | |
| 403 | 630 context->timer_b_load = value * 16; |
| 362 | 631 break; |
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632 case REG_TIME_CTRL: { |
| 403 | 633 if (value & BIT_TIMERA_ENABLE && !(context->timer_control & BIT_TIMERA_ENABLE)) { |
| 634 context->timer_a = context->timer_a_load; | |
| 635 } | |
| 636 if (value & BIT_TIMERB_ENABLE && !(context->timer_control & BIT_TIMERB_ENABLE)) { | |
| 637 context->timer_b = context->timer_b_load; | |
| 638 } | |
| 639 context->timer_control = value & 0xF; | |
| 640 if (value & BIT_TIMERA_RESET) { | |
| 641 context->status &= ~BIT_STATUS_TIMERA; | |
| 642 } | |
| 643 if (value & BIT_TIMERB_RESET) { | |
| 644 context->status &= ~BIT_STATUS_TIMERB; | |
| 645 } | |
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646 uint8_t old_mode = context->ch3_mode; |
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647 context->ch3_mode = value & 0xC0; |
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648 if (context->ch3_mode != old_mode) { |
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649 ym_update_phase_inc(context, context->operators + 2*4, 2*4); |
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650 ym_update_phase_inc(context, context->operators + 2*4+1, 2*4+1); |
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651 ym_update_phase_inc(context, context->operators + 2*4+2, 2*4+2); |
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652 } |
| 362 | 653 break; |
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654 } |
| 362 | 655 case REG_KEY_ONOFF: { |
| 656 uint8_t channel = value & 0x7; | |
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657 if (channel != 3 && channel != 7) { |
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658 if (channel > 2) { |
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659 channel--; |
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660 } |
| 362 | 661 for (uint8_t op = channel * 4, bit = 0x10; op < (channel + 1) * 4; op++, bit <<= 1) { |
| 662 if (value & bit) { | |
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663 if (context->operators[op].env_phase == PHASE_RELEASE) |
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664 { |
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665 first_key_on = 1; |
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666 //printf("Key On for operator %d in channel %d\n", op, channel); |
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667 context->operators[op].phase_counter = 0; |
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668 context->operators[op].env_phase = PHASE_ATTACK; |
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669 } |
| 362 | 670 } else { |
| 671 //printf("Key Off for operator %d in channel %d\n", op, channel); | |
| 672 context->operators[op].env_phase = PHASE_RELEASE; | |
| 673 } | |
| 674 } | |
| 675 } | |
| 676 break; | |
| 677 } | |
| 678 case REG_DAC: | |
| 679 if (context->dac_enable) { | |
| 680 context->channels[5].output = (((int16_t)value) - 0x80) << 6; | |
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681 //printf("DAC Write %X(%d) @ %d\n", value, context->channels[5].output, context->current_cycle); |
| 362 | 682 } |
| 683 break; | |
| 684 case REG_DAC_ENABLE: | |
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685 //printf("DAC Enable: %X\n", value); |
| 362 | 686 context->dac_enable = value & 0x80; |
| 687 break; | |
| 688 } | |
| 689 } else if (context->selected_reg < 0xA0) { | |
| 690 //part | |
| 691 uint8_t op = context->selected_part ? (NUM_OPERATORS/2) : 0; | |
| 692 //channel in part | |
| 693 if ((context->selected_reg & 0x3) != 0x3) { | |
|
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694 op += 4 * (context->selected_reg & 0x3) + ((context->selected_reg & 0xC) / 4); |
| 362 | 695 //printf("write targets operator %d (%d of channel %d)\n", op, op % 4, op / 4); |
| 696 ym_operator * operator = context->operators + op; | |
| 697 switch (context->selected_reg & 0xF0) | |
| 698 { | |
| 699 case REG_DETUNE_MULT: | |
| 700 operator->detune = value >> 4 & 0x7; | |
| 701 operator->multiple = value & 0xF; | |
| 702 ym_update_phase_inc(context, operator, op); | |
| 703 break; | |
| 704 case REG_TOTAL_LEVEL: | |
| 705 operator->total_level = (value & 0x7F) << 5; | |
| 706 break; | |
| 707 case REG_ATTACK_KS: | |
| 376 | 708 operator->key_scaling = 3 - (value >> 6); |
| 362 | 709 operator->rates[PHASE_ATTACK] = value & 0x1F; |
| 710 break; | |
| 711 case REG_DECAY_AM: | |
| 712 //TODO: AM flag for LFO | |
| 713 operator->rates[PHASE_DECAY] = value & 0x1F; | |
| 714 break; | |
| 715 case REG_SUSTAIN_RATE: | |
| 716 operator->rates[PHASE_SUSTAIN] = value & 0x1F; | |
| 717 break; | |
| 718 case REG_S_LVL_R_RATE: | |
| 719 operator->rates[PHASE_RELEASE] = (value & 0xF) << 1 | 1; | |
|
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720 operator->sustain_level = (value & 0xF0) << 4; |
| 362 | 721 break; |
| 722 } | |
| 723 } | |
| 724 } else { | |
| 725 uint8_t channel = context->selected_reg & 0x3; | |
| 726 if (channel != 3) { | |
| 727 if (context->selected_part) { | |
| 728 channel += 3; | |
| 729 } | |
| 730 //printf("write targets channel %d\n", channel); | |
| 731 switch (context->selected_reg & 0xFC) | |
| 732 { | |
| 733 case REG_FNUM_LOW: | |
| 734 context->channels[channel].block = context->channels[channel].block_fnum_latch >> 3 & 0x7; | |
| 735 context->channels[channel].fnum = (context->channels[channel].block_fnum_latch & 0x7) << 8 | value; | |
| 736 context->channels[channel].keycode = context->channels[channel].block << 2 | fnum_to_keycode[context->channels[channel].fnum >> 7]; | |
| 737 ym_update_phase_inc(context, context->operators + channel*4, channel*4); | |
| 738 ym_update_phase_inc(context, context->operators + channel*4+1, channel*4+1); | |
| 739 ym_update_phase_inc(context, context->operators + channel*4+2, channel*4+2); | |
| 740 ym_update_phase_inc(context, context->operators + channel*4+3, channel*4+3); | |
| 741 break; | |
| 742 case REG_BLOCK_FNUM_H:{ | |
| 743 context->channels[channel].block_fnum_latch = value; | |
| 744 break; | |
| 745 } | |
|
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746 case REG_FNUM_LOW_CH3: |
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747 if (channel < 3) { |
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748 context->ch3_supp[channel].block = context->ch3_supp[channel].block_fnum_latch >> 3 & 0x7; |
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749 context->ch3_supp[channel].fnum = (context->ch3_supp[channel].block_fnum_latch & 0x7) << 8 | value; |
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750 context->ch3_supp[channel].keycode = context->ch3_supp[channel].block << 2 | fnum_to_keycode[context->ch3_supp[channel].fnum >> 7]; |
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751 if (context->ch3_mode) { |
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752 ym_update_phase_inc(context, context->operators + 2*4 + channel, 2*4); |
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753 } |
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754 } |
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755 break; |
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756 case REG_BLOCK_FN_CH3: |
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757 if (channel < 3) { |
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758 context->ch3_supp[channel].block_fnum_latch = value; |
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759 } |
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760 break; |
| 362 | 761 case REG_ALG_FEEDBACK: |
| 762 context->channels[channel].algorithm = value & 0x7; | |
| 763 context->channels[channel].feedback = value >> 3 & 0x7; | |
| 764 break; | |
| 765 case REG_LR_AMS_PMS: | |
|
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766 context->channels[channel].pms = (value & 0x7) * 32; |
| 362 | 767 context->channels[channel].ams = value >> 4 & 0x3; |
| 768 context->channels[channel].lr = value & 0xC0; | |
|
369
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Fix left/right enable default value
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|
769 //printf("Write of %X to LR_AMS_PMS reg for channel %d\n", value, channel); |
| 362 | 770 break; |
| 771 } | |
| 772 } | |
| 773 } | |
|
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774 |
| 362 | 775 context->write_cycle = context->current_cycle; |
| 374 | 776 context->status |= 0x80; |
|
288
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|
777 } |
|
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778 |
|
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Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
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779 uint8_t ym_read_status(ym2612_context * context) |
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780 { |
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781 return context->status; |
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|
782 } |
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a8ee7934a1f8
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|
783 |