Mercurial > repos > blastem
annotate ym2612.c @ 448:e85a107e6ec0
Fix handling of key on in YM2612 core
| author | Mike Pavone <pavone@retrodev.com> |
|---|---|
| date | Sat, 20 Jul 2013 23:49:31 -0700 |
| parents | 7e8e179116af |
| children | b7c3b2d22858 |
| rev | line source |
|---|---|
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1 #include <string.h> |
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2 #include <math.h> |
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3 #include <stdio.h> |
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4 #include <stdlib.h> |
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5 #include "ym2612.h" |
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6 #include "render.h" |
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7 #include "wave.h" |
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8 |
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9 //#define DO_DEBUG_PRINT |
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10 #ifdef DO_DEBUG_PRINT |
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11 #define dfprintf fprintf |
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12 #define dfopen(var, fname, mode) var=fopen(fname, mode) |
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13 #else |
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14 #define dfprintf |
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15 #define dfopen(var, fname, mode) |
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16 #endif |
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17 |
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18 #define BUSY_CYCLES 17 |
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19 #define OP_UPDATE_PERIOD 144 |
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20 |
| 362 | 21 enum { |
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22 REG_LFO = 0x22, |
| 362 | 23 REG_TIMERA_HIGH = 0x24, |
| 24 REG_TIMERA_LOW, | |
| 25 REG_TIMERB, | |
| 26 REG_TIME_CTRL, | |
| 27 REG_KEY_ONOFF, | |
| 28 REG_DAC = 0x2A, | |
| 29 REG_DAC_ENABLE, | |
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30 |
| 362 | 31 REG_DETUNE_MULT = 0x30, |
| 32 REG_TOTAL_LEVEL = 0x40, | |
| 33 REG_ATTACK_KS = 0x50, | |
| 34 REG_DECAY_AM = 0x60, | |
| 35 REG_SUSTAIN_RATE = 0x70, | |
| 36 REG_S_LVL_R_RATE = 0x80, | |
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37 |
| 362 | 38 REG_FNUM_LOW = 0xA0, |
| 39 REG_BLOCK_FNUM_H = 0xA4, | |
| 40 REG_FNUM_LOW_CH3 = 0xA8, | |
| 41 REG_BLOCK_FN_CH3 = 0xAC, | |
| 42 REG_ALG_FEEDBACK = 0xB0, | |
| 43 REG_LR_AMS_PMS = 0xB4 | |
| 44 }; | |
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45 |
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46 #define BIT_TIMERA_ENABLE 0x1 |
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47 #define BIT_TIMERB_ENABLE 0x2 |
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48 #define BIT_TIMERA_OVEREN 0x4 |
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49 #define BIT_TIMERB_OVEREN 0x8 |
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50 #define BIT_TIMERA_RESET 0x10 |
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51 #define BIT_TIMERB_RESET 0x20 |
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52 |
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53 #define BIT_STATUS_TIMERA 0x1 |
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54 #define BIT_STATUS_TIMERB 0x2 |
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55 |
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56 enum { |
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57 PHASE_ATTACK, |
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58 PHASE_DECAY, |
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59 PHASE_SUSTAIN, |
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60 PHASE_RELEASE |
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61 }; |
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62 |
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63 uint8_t did_tbl_init = 0; |
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64 //According to Nemesis, real hardware only uses a 256 entry quarter sine table; however, |
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65 //memory is cheap so using a half sine table will probably save some cycles |
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66 //a full sine table would be nice, but negative numbers don't get along with log2 |
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67 #define SINE_TABLE_SIZE 512 |
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68 uint16_t sine_table[SINE_TABLE_SIZE]; |
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69 //Similar deal here with the power table for log -> linear conversion |
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70 //According to Nemesis, real hardware only uses a 256 entry table for the fractional part |
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71 //and uses the whole part as a shift amount. |
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72 #define POW_TABLE_SIZE (1 << 13) |
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73 uint16_t pow_table[POW_TABLE_SIZE]; |
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74 |
| 362 | 75 uint16_t rate_table_base[] = { |
| 76 //main portion | |
| 77 0,1,0,1,0,1,0,1, | |
| 78 0,1,0,1,1,1,0,1, | |
| 79 0,1,1,1,0,1,1,1, | |
| 80 0,1,1,1,1,1,1,1, | |
| 81 //top end | |
| 82 1,1,1,1,1,1,1,1, | |
| 83 1,1,1,2,1,1,1,2, | |
| 84 1,2,1,2,1,2,1,2, | |
| 85 1,2,2,2,1,2,2,2, | |
| 86 }; | |
| 87 | |
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88 uint16_t rate_table[64*8]; |
| 362 | 89 |
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90 uint8_t lfo_timer_values[] = {108, 77, 71, 67, 62, 44, 8, 5}; |
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91 uint8_t lfo_pm_base[][8] = { |
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92 {0, 0, 0, 0, 0, 0, 0, 0}, |
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93 {0, 0, 0, 0, 4, 4, 4, 4}, |
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94 {0, 0, 0, 4, 4, 4, 8, 8}, |
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95 {0, 0, 4, 4, 8, 8, 0xc, 0xc}, |
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96 {0, 0, 4, 8, 8, 8, 0xc,0x10}, |
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97 {0, 0, 8, 0xc,0x10,0x10,0x14,0x18}, |
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98 {0, 0,0x10,0x18,0x20,0x20,0x28,0x30}, |
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99 {0, 0,0x20,0x30,0x40,0x40,0x50,0x60} |
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100 }; |
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101 int16_t lfo_pm_table[128 * 32 * 8]; |
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102 |
| 362 | 103 #define MAX_ENVELOPE 0xFFC |
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104 #define YM_DIVIDER 2 |
| 374 | 105 #define CYCLE_NEVER 0xFFFFFFFF |
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106 |
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107 uint16_t round_fixed_point(double value, int dec_bits) |
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108 { |
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109 return value * (1 << dec_bits) + 0.5; |
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110 } |
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111 |
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112 FILE * debug_file = NULL; |
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113 uint32_t first_key_on=0; |
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114 |
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115 ym2612_context * log_context = NULL; |
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116 |
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117 void ym_finalize_log() |
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118 { |
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119 for (int i = 0; i < NUM_CHANNELS; i++) { |
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120 if (log_context->channels[i].logfile) { |
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121 wave_finalize(log_context->channels[i].logfile); |
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122 } |
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123 } |
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124 } |
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125 |
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126 void ym_init(ym2612_context * context, uint32_t sample_rate, uint32_t master_clock, uint32_t clock_div, uint32_t sample_limit, uint32_t options) |
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127 { |
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128 dfopen(debug_file, "ym_debug.txt", "w"); |
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129 memset(context, 0, sizeof(*context)); |
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130 context->audio_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
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131 context->back_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
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132 context->buffer_inc = ((double)sample_rate / (double)master_clock) * clock_div * 6; |
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133 context->clock_inc = clock_div * 6; |
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134 context->sample_limit = sample_limit*2; |
| 374 | 135 context->write_cycle = CYCLE_NEVER; |
| 362 | 136 for (int i = 0; i < NUM_OPERATORS; i++) { |
| 137 context->operators[i].envelope = MAX_ENVELOPE; | |
| 138 context->operators[i].env_phase = PHASE_RELEASE; | |
| 139 } | |
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140 //some games seem to expect that the LR flags start out as 1 |
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141 for (int i = 0; i < NUM_CHANNELS; i++) { |
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142 context->channels[i].lr = 0xC0; |
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143 if (options & YM_OPT_WAVE_LOG) { |
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144 char fname[64]; |
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145 sprintf(fname, "ym_channel_%d.wav", i); |
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146 FILE * f = context->channels[i].logfile = fopen(fname, "wb"); |
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147 if (!f) { |
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148 fprintf(stderr, "Failed to open WAVE log file %s for writing\n", fname); |
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149 continue; |
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150 } |
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151 if (!wave_init(f, sample_rate, 16, 1)) { |
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152 fclose(f); |
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153 context->channels[i].logfile = NULL; |
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154 } |
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155 } |
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156 } |
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157 if (options & YM_OPT_WAVE_LOG) { |
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158 log_context = context; |
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159 atexit(ym_finalize_log); |
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160 } |
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161 if (!did_tbl_init) { |
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162 //populate sine table |
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163 for (int32_t i = 0; i < 512; i++) { |
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164 double sine = sin( ((double)(i*2+1) / SINE_TABLE_SIZE) * M_PI_2 ); |
|
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165 |
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166 //table stores 4.8 fixed pointed representation of the base 2 log |
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167 sine_table[i] = round_fixed_point(-log2(sine), 8); |
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168 } |
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169 //populate power table |
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170 for (int32_t i = 0; i < POW_TABLE_SIZE; i++) { |
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171 double linear = pow(2, -((double)((i & 0xFF)+1) / 256.0)); |
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172 int32_t tmp = round_fixed_point(linear, 11); |
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173 int32_t shift = (i >> 8) - 2; |
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174 if (shift < 0) { |
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175 tmp <<= 0-shift; |
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176 } else { |
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177 tmp >>= shift; |
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178 } |
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179 pow_table[i] = tmp; |
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180 } |
| 362 | 181 //populate envelope generator rate table, from small base table |
| 182 for (int rate = 0; rate < 64; rate++) { | |
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183 for (int cycle = 0; cycle < 8; cycle++) { |
| 362 | 184 uint16_t value; |
|
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185 if (rate < 2) { |
| 362 | 186 value = 0; |
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187 } else if (rate >= 60) { |
| 362 | 188 value = 8; |
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189 } else if (rate < 8) { |
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190 value = rate_table_base[((rate & 6) == 6 ? 16 : 0) + cycle]; |
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191 } else if (rate < 48) { |
| 362 | 192 value = rate_table_base[(rate & 0x3) * 8 + cycle]; |
| 193 } else { | |
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194 value = rate_table_base[32 + (rate & 0x3) * 8 + cycle] << ((rate - 48) >> 2); |
| 362 | 195 } |
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196 rate_table[rate * 8 + cycle] = value; |
| 362 | 197 } |
| 198 } | |
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199 //populate LFO PM table from small base table |
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200 //seems like there must be a better way to derive this |
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201 for (int freq = 0; freq < 128; freq++) { |
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202 for (int pms = 0; pms < 8; pms++) { |
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203 for (int step = 0; step < 32; step++) { |
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204 int16_t value = 0; |
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205 for (int bit = 0x40, shift = 0; bit > 0; bit >>= 1, shift++) { |
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206 if (freq & bit) { |
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207 value += lfo_pm_base[pms][(step & 0x8) ? 7-step & 7 : step & 7] >> shift; |
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208 } |
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209 } |
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210 if (step & 0x10) { |
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211 value = -value; |
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212 } |
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213 lfo_pm_table[freq * 256 + pms * 32 + step] = value; |
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214 } |
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215 } |
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216 } |
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217 } |
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218 } |
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219 |
| 377 | 220 #define YM_VOLUME_DIVIDER 2 |
|
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221 #define YM_MOD_SHIFT 1 |
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222 |
| 403 | 223 #define TIMER_A_MAX 1023 |
| 224 #define TIMER_B_MAX (255*16) | |
| 225 | |
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226 void ym_run(ym2612_context * context, uint32_t to_cycle) |
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227 { |
| 362 | 228 //printf("Running YM2612 from cycle %d to cycle %d\n", context->current_cycle, to_cycle); |
| 229 //TODO: Fix channel update order OR remap channels in register write | |
|
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230 for (; context->current_cycle < to_cycle; context->current_cycle += context->clock_inc) { |
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231 //Update timers at beginning of 144 cycle period |
| 403 | 232 if (!context->current_op) { |
| 233 if (context->timer_control & BIT_TIMERA_ENABLE) { | |
| 234 if (context->timer_a != TIMER_A_MAX) { | |
| 235 context->timer_a++; | |
| 236 } else { | |
| 237 if (context->timer_control & BIT_TIMERA_OVEREN) { | |
| 238 context->status |= BIT_STATUS_TIMERA; | |
| 239 } | |
| 240 context->timer_a = context->timer_a_load; | |
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241 } |
|
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242 } |
| 362 | 243 if (context->timer_control & BIT_TIMERB_ENABLE) { |
| 403 | 244 if (context->timer_b != TIMER_B_MAX) { |
| 245 context->timer_b++; | |
| 246 } else { | |
| 247 if (context->timer_control & BIT_TIMERB_OVEREN) { | |
| 248 context->status |= BIT_STATUS_TIMERB; | |
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249 } |
| 403 | 250 context->timer_b = context->timer_b_load; |
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251 } |
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252 } |
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253 } |
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254 //Update LFO |
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255 if (context->lfo_enable) { |
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256 if (context->lfo_counter) { |
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257 context->lfo_counter--; |
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258 } else { |
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259 context->lfo_counter = lfo_timer_values[context->lfo_freq]; |
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260 context->lfo_am_step += 2; |
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261 context->lfo_am_step &= 0xFE; |
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262 context->lfo_pm_step = context->lfo_am_step / 8; |
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263 } |
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264 } |
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265 //Update Envelope Generator |
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266 if (!(context->current_op % 3)) { |
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267 uint32_t env_cyc = context->env_counter; |
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268 uint32_t op = context->current_env_op; |
| 362 | 269 ym_operator * operator = context->operators + op; |
| 270 ym_channel * channel = context->channels + op/4; | |
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271 uint8_t rate; |
| 362 | 272 for(;;) { |
| 273 rate = operator->rates[operator->env_phase]; | |
| 274 if (rate) { | |
| 275 uint8_t ks = channel->keycode >> operator->key_scaling;; | |
| 276 rate = rate*2 + ks; | |
| 277 if (rate > 63) { | |
| 278 rate = 63; | |
| 279 } | |
| 280 } | |
| 281 //Deal with "infinite" rates | |
|
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282 //According to Nemesis this should be handled in key-on instead |
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283 if (rate >= 62 && operator->env_phase == PHASE_ATTACK) { |
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284 operator->env_phase = PHASE_DECAY; |
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285 operator->envelope = 0; |
| 362 | 286 } else { |
| 287 break; | |
| 288 } | |
| 289 } | |
| 290 uint32_t cycle_shift = rate < 0x30 ? ((0x2F - rate) >> 2) : 0; | |
|
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291 if (first_key_on) { |
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292 dfprintf(debug_file, "Operator: %d, env rate: %d (2*%d+%d), env_cyc: %d, cycle_shift: %d, env_cyc & ((1 << cycle_shift) - 1): %d\n", op, rate, operator->rates[operator->env_phase], channel->keycode >> operator->key_scaling,env_cyc, cycle_shift, env_cyc & ((1 << cycle_shift) - 1)); |
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293 } |
| 362 | 294 if (!(env_cyc & ((1 << cycle_shift) - 1))) { |
| 295 uint32_t update_cycle = env_cyc >> cycle_shift & 0x7; | |
| 296 //envelope value is 10-bits, but it will be used as a 4.8 value | |
| 297 uint16_t envelope_inc = rate_table[rate * 8 + update_cycle] << 2; | |
| 298 if (operator->env_phase == PHASE_ATTACK) { | |
| 299 //this can probably be optimized to a single shift rather than a multiply + shift | |
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300 if (first_key_on) { |
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301 dfprintf(debug_file, "Changing op %d envelope %d by %d(%d * %d) in attack phase\n", op, operator->envelope, (~operator->envelope * envelope_inc) >> 4, ~operator->envelope, envelope_inc); |
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302 } |
| 362 | 303 operator->envelope += (~operator->envelope * envelope_inc) >> 4; |
| 304 operator->envelope &= MAX_ENVELOPE; | |
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305 if (!operator->envelope) { |
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306 operator->envelope = 0; |
| 362 | 307 operator->env_phase = PHASE_DECAY; |
| 308 } | |
| 309 } else { | |
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310 if (first_key_on) { |
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311 dfprintf(debug_file, "Changing op %d envelope %d by %d in %s phase\n", op, operator->envelope, envelope_inc, |
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312 operator->env_phase == PHASE_SUSTAIN ? "sustain" : (operator->env_phase == PHASE_DECAY ? "decay": "release")); |
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313 } |
| 362 | 314 operator->envelope += envelope_inc; |
| 315 //clamp to max attenuation value | |
| 316 if (operator->envelope > MAX_ENVELOPE) { | |
| 317 operator->envelope = MAX_ENVELOPE; | |
| 318 } | |
| 319 if (operator->env_phase == PHASE_DECAY && operator->envelope >= operator->sustain_level) { | |
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320 //operator->envelope = operator->sustain_level; |
| 362 | 321 operator->env_phase = PHASE_SUSTAIN; |
| 322 } | |
| 323 } | |
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324 } |
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325 context->current_env_op++; |
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326 if (context->current_env_op == NUM_OPERATORS) { |
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327 context->current_env_op = 0; |
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328 context->env_counter++; |
| 362 | 329 } |
| 330 } | |
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331 |
| 362 | 332 //Update Phase Generator |
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333 uint32_t channel = context->current_op / 4; |
| 362 | 334 if (channel != 5 || !context->dac_enable) { |
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335 uint32_t op = context->current_op; |
| 362 | 336 //printf("updating operator %d of channel %d\n", op, channel); |
| 337 ym_operator * operator = context->operators + op; | |
| 338 ym_channel * chan = context->channels + channel; | |
| 339 //TODO: Modulate phase by LFO if necessary | |
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340 uint16_t phase = operator->phase_counter >> 10 & 0x3FF; |
| 362 | 341 operator->phase_counter += operator->phase_inc; |
|
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342 if (chan->pms) { |
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343 //not entirely sure this will get the precision correct, but I'd like to avoid recalculating phase |
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344 //increment every update when LFO phase modulation is enabled |
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345 int16_t lfo_mod = lfo_pm_table[(chan->fnum & 0x7F0) * 16 + chan->pms + context->lfo_pm_step]; |
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346 if (operator->multiple) { |
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347 lfo_mod *= operator->multiple; |
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348 } else { |
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349 lfo_mod >>= 1; |
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350 } |
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351 operator->phase_counter += lfo_mod; |
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352 } |
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353 int16_t mod = 0; |
| 362 | 354 switch (op % 4) |
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355 { |
| 362 | 356 case 0://Operator 1 |
| 377 | 357 if (chan->feedback) { |
|
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358 mod = operator->output >> (9-chan->feedback); |
| 377 | 359 } |
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360 break; |
| 362 | 361 case 1://Operator 3 |
| 362 switch(chan->algorithm) | |
| 363 { | |
| 364 case 0: | |
| 365 case 2: | |
| 366 //modulate by operator 2 | |
|
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367 mod = context->operators[op+1].output >> YM_MOD_SHIFT; |
| 362 | 368 break; |
| 369 case 1: | |
| 370 //modulate by operator 1+2 | |
|
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371 mod = (context->operators[op-1].output + context->operators[op+1].output) >> YM_MOD_SHIFT; |
| 362 | 372 break; |
| 373 case 5: | |
| 374 //modulate by operator 1 | |
|
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375 mod = context->operators[op-1].output >> YM_MOD_SHIFT; |
| 362 | 376 } |
| 377 break; | |
| 378 case 2://Operator 2 | |
|
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379 if (chan->algorithm != 1 && chan->algorithm != 2 && chan->algorithm != 7) { |
| 362 | 380 //modulate by Operator 1 |
|
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381 mod = context->operators[op-2].output >> YM_MOD_SHIFT; |
| 362 | 382 } |
|
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383 break; |
| 362 | 384 case 3://Operator 4 |
| 385 switch(chan->algorithm) | |
| 386 { | |
| 387 case 0: | |
| 388 case 1: | |
| 389 case 4: | |
| 390 //modulate by operator 3 | |
|
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391 mod = context->operators[op-2].output >> YM_MOD_SHIFT; |
| 362 | 392 break; |
| 393 case 2: | |
| 394 //modulate by operator 1+3 | |
|
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395 mod = (context->operators[op-3].output + context->operators[op-2].output) >> YM_MOD_SHIFT; |
| 362 | 396 break; |
| 397 case 3: | |
| 398 //modulate by operator 2+3 | |
|
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399 mod = (context->operators[op-1].output + context->operators[op-2].output) >> YM_MOD_SHIFT; |
| 362 | 400 break; |
| 401 case 5: | |
| 402 //modulate by operator 1 | |
|
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403 mod = context->operators[op-3].output >> YM_MOD_SHIFT; |
| 362 | 404 break; |
| 405 } | |
|
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406 break; |
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407 } |
|
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408 uint16_t env = operator->envelope + operator->total_level; |
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409 if (env > MAX_ENVELOPE) { |
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410 env = MAX_ENVELOPE; |
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411 } |
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412 if (first_key_on) { |
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413 dfprintf(debug_file, "op %d, base phase: %d, mod: %d, sine: %d, out: %d\n", op, phase, mod, sine_table[(phase+mod) & 0x1FF], pow_table[sine_table[phase & 0x1FF] + env]); |
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414 } |
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415 phase += mod; |
|
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416 |
|
371
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417 int16_t output = pow_table[sine_table[phase & 0x1FF] + env]; |
|
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418 if (phase & 0x200) { |
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419 output = -output; |
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420 } |
| 362 | 421 operator->output = output; |
|
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422 //Update the channel output if we've updated all operators |
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423 if (op % 4 == 3) { |
| 362 | 424 if (chan->algorithm < 4) { |
| 425 chan->output = operator->output; | |
| 426 } else if(chan->algorithm == 4) { | |
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427 chan->output = operator->output + context->operators[channel * 4 + 2].output; |
|
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428 } else { |
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429 output = 0; |
| 362 | 430 for (uint32_t op = ((chan->algorithm == 7) ? 0 : 1) + channel*4; op < (channel+1)*4; op++) { |
| 431 output += context->operators[op].output; | |
|
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432 } |
| 362 | 433 chan->output = output; |
|
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434 } |
|
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435 if (first_key_on) { |
|
371
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436 int16_t value = context->channels[channel].output & 0x3FE0; |
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437 if (value & 0x2000) { |
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438 value |= 0xC000; |
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439 } |
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440 dfprintf(debug_file, "channel %d output: %d\n", channel, value / YM_VOLUME_DIVIDER); |
|
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441 } |
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442 } |
| 362 | 443 //puts("operator update done"); |
|
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444 } |
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445 context->current_op++; |
|
380
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446 context->buffer_fraction += context->buffer_inc; |
|
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447 if (context->current_op == NUM_OPERATORS) { |
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448 context->current_op = 0; |
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449 if (context->buffer_fraction > 1.0) { |
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450 context->buffer_fraction -= 1.0; |
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451 context->audio_buffer[context->buffer_pos] = 0; |
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452 context->audio_buffer[context->buffer_pos + 1] = 0; |
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453 for (int i = 0; i < NUM_CHANNELS; i++) { |
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454 int16_t value = context->channels[i].output & 0x3FE0; |
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455 if (value & 0x2000) { |
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456 value |= 0xC000; |
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457 } |
|
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458 if (context->channels[i].logfile) { |
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459 fwrite(&value, sizeof(value), 1, context->channels[i].logfile); |
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460 } |
|
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461 if (context->channels[i].lr & 0x80) { |
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462 context->audio_buffer[context->buffer_pos] += value / YM_VOLUME_DIVIDER; |
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463 } |
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464 if (context->channels[i].lr & 0x40) { |
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465 context->audio_buffer[context->buffer_pos+1] += value / YM_VOLUME_DIVIDER; |
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466 } |
|
380
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467 } |
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468 context->buffer_pos += 2; |
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469 if (context->buffer_pos == context->sample_limit) { |
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470 render_wait_ym(context); |
|
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471 } |
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472 } |
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473 } |
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474 } |
|
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475 if (context->current_cycle >= context->write_cycle + (BUSY_CYCLES * context->clock_inc / 6)) { |
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476 context->status &= 0x7F; |
| 374 | 477 context->write_cycle = CYCLE_NEVER; |
|
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478 } |
| 362 | 479 //printf("Done running YM2612 at cycle %d\n", context->current_cycle, to_cycle); |
|
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480 } |
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481 |
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482 void ym_address_write_part1(ym2612_context * context, uint8_t address) |
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483 { |
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484 //printf("address_write_part1: %X\n", address); |
| 362 | 485 context->selected_reg = address; |
| 486 context->selected_part = 0; | |
|
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487 } |
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488 |
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489 void ym_address_write_part2(ym2612_context * context, uint8_t address) |
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490 { |
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491 //printf("address_write_part2: %X\n", address); |
| 362 | 492 context->selected_reg = address; |
| 493 context->selected_part = 1; | |
| 494 } | |
| 495 | |
| 496 uint8_t fnum_to_keycode[] = { | |
| 497 //F11 = 0 | |
| 498 0,0,0,0,0,0,0,1, | |
| 499 //F11 = 1 | |
| 500 2,3,3,3,3,3,3,3 | |
| 501 }; | |
| 502 | |
| 503 //table courtesy of Nemesis | |
| 504 uint32_t detune_table[][4] = { | |
| 505 {0, 0, 1, 2}, //0 (0x00) | |
| 506 {0, 0, 1, 2}, //1 (0x01) | |
| 507 {0, 0, 1, 2}, //2 (0x02) | |
| 508 {0, 0, 1, 2}, //3 (0x03) | |
| 509 {0, 1, 2, 2}, //4 (0x04) | |
| 510 {0, 1, 2, 3}, //5 (0x05) | |
| 511 {0, 1, 2, 3}, //6 (0x06) | |
| 512 {0, 1, 2, 3}, //7 (0x07) | |
| 513 {0, 1, 2, 4}, //8 (0x08) | |
| 514 {0, 1, 3, 4}, //9 (0x09) | |
| 515 {0, 1, 3, 4}, //10 (0x0A) | |
| 516 {0, 1, 3, 5}, //11 (0x0B) | |
| 517 {0, 2, 4, 5}, //12 (0x0C) | |
| 518 {0, 2, 4, 6}, //13 (0x0D) | |
| 519 {0, 2, 4, 6}, //14 (0x0E) | |
| 520 {0, 2, 5, 7}, //15 (0x0F) | |
| 521 {0, 2, 5, 8}, //16 (0x10) | |
| 522 {0, 3, 6, 8}, //17 (0x11) | |
| 523 {0, 3, 6, 9}, //18 (0x12) | |
| 524 {0, 3, 7,10}, //19 (0x13) | |
| 525 {0, 4, 8,11}, //20 (0x14) | |
| 526 {0, 4, 8,12}, //21 (0x15) | |
| 527 {0, 4, 9,13}, //22 (0x16) | |
| 528 {0, 5,10,14}, //23 (0x17) | |
| 529 {0, 5,11,16}, //24 (0x18) | |
| 530 {0, 6,12,17}, //25 (0x19) | |
| 531 {0, 6,13,19}, //26 (0x1A) | |
| 532 {0, 7,14,20}, //27 (0x1B) | |
| 533 {0, 8,16,22}, //28 (0x1C) | |
| 534 {0, 8,16,22}, //29 (0x1D) | |
| 535 {0, 8,16,22}, //30 (0x1E) | |
| 536 {0, 8,16,22} | |
| 537 }; //31 (0x1F) | |
| 538 | |
| 539 void ym_update_phase_inc(ym2612_context * context, ym_operator * operator, uint32_t op) | |
| 540 { | |
| 541 uint32_t chan_num = op / 4; | |
| 542 //printf("ym_update_phase_inc | channel: %d, op: %d\n", chan_num, op); | |
| 543 //base frequency | |
| 544 ym_channel * channel = context->channels + chan_num; | |
|
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545 uint32_t inc, detune; |
|
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546 if (chan_num == 2 && context->ch3_mode && (op < (2*4 + 3))) { |
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547 inc = context->ch3_supp[op-2*4].fnum; |
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548 if (!context->ch3_supp[op-2*4].block) { |
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549 inc >>= 1; |
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550 } else { |
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551 inc <<= (context->ch3_supp[op-2*4].block-1); |
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552 } |
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553 //detune |
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554 detune = detune_table[context->ch3_supp[op-2*4].keycode][operator->detune & 0x3]; |
|
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555 } else { |
|
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556 inc = channel->fnum; |
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557 if (!channel->block) { |
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558 inc >>= 1; |
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559 } else { |
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560 inc <<= (channel->block-1); |
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561 } |
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562 //detune |
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563 detune = detune_table[channel->keycode][operator->detune & 0x3]; |
|
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564 } |
| 362 | 565 if (operator->detune & 0x40) { |
| 566 inc -= detune; | |
| 567 //this can underflow, mask to 17-bit result | |
| 568 inc &= 0x1FFFF; | |
| 569 } else { | |
| 570 inc += detune; | |
| 571 } | |
| 572 //multiple | |
| 573 if (operator->multiple) { | |
| 574 inc *= operator->multiple; | |
| 575 } else { | |
| 576 //0.5 | |
| 577 inc >>= 1; | |
|
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578 } |
|
365
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579 //printf("phase_inc for operator %d: %d, block: %d, fnum: %d, detune: %d, multiple: %d\n", op, inc, channel->block, channel->fnum, detune, operator->multiple); |
|
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580 operator->phase_inc = inc; |
|
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581 } |
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582 |
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583 void ym_data_write(ym2612_context * context, uint8_t value) |
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584 { |
| 362 | 585 if (context->selected_reg < 0x21 || context->selected_reg > 0xB6 || (context->selected_reg < 0x30 && context->selected_part)) { |
| 586 return; | |
|
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587 } |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
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588 dfprintf(debug_file, "write of %X to reg %X in part %d\n", value, context->selected_reg, context->selected_part+1); |
| 362 | 589 if (context->selected_reg < 0x30) { |
| 590 //Shared regs | |
| 591 switch (context->selected_reg) | |
| 592 { | |
|
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593 //TODO: Test reg |
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594 case REG_LFO: |
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595 if ((value & 0x8) && !context->lfo_enable) { |
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596 printf("LFO Enabled, Freq: %d\n", value & 0x7); |
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597 } |
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598 context->lfo_enable = value & 0x8; |
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599 if (!context->lfo_enable) { |
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600 context->lfo_am_step = context->lfo_pm_step = 0; |
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601 } |
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602 context->lfo_freq = value & 0x7; |
|
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603 |
|
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604 break; |
| 362 | 605 case REG_TIMERA_HIGH: |
| 606 context->timer_a_load &= 0x3; | |
| 607 context->timer_a_load |= value << 2; | |
| 608 break; | |
| 609 case REG_TIMERA_LOW: | |
| 610 context->timer_a_load &= 0xFFFC; | |
| 611 context->timer_a_load |= value & 0x3; | |
| 612 break; | |
| 613 case REG_TIMERB: | |
| 403 | 614 context->timer_b_load = value * 16; |
| 362 | 615 break; |
|
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616 case REG_TIME_CTRL: { |
| 403 | 617 if (value & BIT_TIMERA_ENABLE && !(context->timer_control & BIT_TIMERA_ENABLE)) { |
| 618 context->timer_a = context->timer_a_load; | |
| 619 } | |
| 620 if (value & BIT_TIMERB_ENABLE && !(context->timer_control & BIT_TIMERB_ENABLE)) { | |
| 621 context->timer_b = context->timer_b_load; | |
| 622 } | |
| 623 context->timer_control = value & 0xF; | |
| 624 if (value & BIT_TIMERA_RESET) { | |
| 625 context->status &= ~BIT_STATUS_TIMERA; | |
| 626 } | |
| 627 if (value & BIT_TIMERB_RESET) { | |
| 628 context->status &= ~BIT_STATUS_TIMERB; | |
| 629 } | |
|
383
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382
diff
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|
630 uint8_t old_mode = context->ch3_mode; |
|
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382
diff
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|
631 context->ch3_mode = value & 0xC0; |
|
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632 if (context->ch3_mode != old_mode) { |
|
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Initial implementation of channel 3 special mode
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633 ym_update_phase_inc(context, context->operators + 2*4, 2*4); |
|
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634 ym_update_phase_inc(context, context->operators + 2*4+1, 2*4+1); |
|
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635 ym_update_phase_inc(context, context->operators + 2*4+2, 2*4+2); |
|
72933100c55c
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636 } |
| 362 | 637 break; |
|
383
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382
diff
changeset
|
638 } |
| 362 | 639 case REG_KEY_ONOFF: { |
| 640 uint8_t channel = value & 0x7; | |
|
386
6e5c4f3ab0e2
Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents:
383
diff
changeset
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641 if (channel != 3 && channel != 7) { |
|
6e5c4f3ab0e2
Fix channel mapping in key on/off register
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parents:
383
diff
changeset
|
642 if (channel > 2) { |
|
6e5c4f3ab0e2
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383
diff
changeset
|
643 channel--; |
|
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Mike Pavone <pavone@retrodev.com>
parents:
383
diff
changeset
|
644 } |
| 362 | 645 for (uint8_t op = channel * 4, bit = 0x10; op < (channel + 1) * 4; op++, bit <<= 1) { |
| 646 if (value & bit) { | |
|
448
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
647 if (context->operators[op].env_phase == PHASE_RELEASE) |
|
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|
648 { |
|
e85a107e6ec0
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diff
changeset
|
649 first_key_on = 1; |
|
e85a107e6ec0
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424
diff
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|
650 //printf("Key On for operator %d in channel %d\n", op, channel); |
|
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diff
changeset
|
651 context->operators[op].phase_counter = 0; |
|
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Fix handling of key on in YM2612 core
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424
diff
changeset
|
652 context->operators[op].env_phase = PHASE_ATTACK; |
|
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|
653 } |
| 362 | 654 } else { |
| 655 //printf("Key Off for operator %d in channel %d\n", op, channel); | |
| 656 context->operators[op].env_phase = PHASE_RELEASE; | |
| 657 } | |
| 658 } | |
| 659 } | |
| 660 break; | |
| 661 } | |
| 662 case REG_DAC: | |
| 663 if (context->dac_enable) { | |
| 664 context->channels[5].output = (((int16_t)value) - 0x80) << 6; | |
|
396
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
665 //printf("DAC Write %X(%d) @ %d\n", value, context->channels[5].output, context->current_cycle); |
| 362 | 666 } |
| 667 break; | |
| 668 case REG_DAC_ENABLE: | |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
669 //printf("DAC Enable: %X\n", value); |
| 362 | 670 context->dac_enable = value & 0x80; |
| 671 break; | |
| 672 } | |
| 673 } else if (context->selected_reg < 0xA0) { | |
| 674 //part | |
| 675 uint8_t op = context->selected_part ? (NUM_OPERATORS/2) : 0; | |
| 676 //channel in part | |
| 677 if ((context->selected_reg & 0x3) != 0x3) { | |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
678 op += 4 * (context->selected_reg & 0x3) + ((context->selected_reg & 0xC) / 4); |
| 362 | 679 //printf("write targets operator %d (%d of channel %d)\n", op, op % 4, op / 4); |
| 680 ym_operator * operator = context->operators + op; | |
| 681 switch (context->selected_reg & 0xF0) | |
| 682 { | |
| 683 case REG_DETUNE_MULT: | |
| 684 operator->detune = value >> 4 & 0x7; | |
| 685 operator->multiple = value & 0xF; | |
| 686 ym_update_phase_inc(context, operator, op); | |
| 687 break; | |
| 688 case REG_TOTAL_LEVEL: | |
| 689 operator->total_level = (value & 0x7F) << 5; | |
| 690 break; | |
| 691 case REG_ATTACK_KS: | |
| 376 | 692 operator->key_scaling = 3 - (value >> 6); |
| 362 | 693 operator->rates[PHASE_ATTACK] = value & 0x1F; |
| 694 break; | |
| 695 case REG_DECAY_AM: | |
| 696 //TODO: AM flag for LFO | |
| 697 operator->rates[PHASE_DECAY] = value & 0x1F; | |
| 698 break; | |
| 699 case REG_SUSTAIN_RATE: | |
| 700 operator->rates[PHASE_SUSTAIN] = value & 0x1F; | |
| 701 break; | |
| 702 case REG_S_LVL_R_RATE: | |
| 703 operator->rates[PHASE_RELEASE] = (value & 0xF) << 1 | 1; | |
|
382
b904859964e5
Fix operator precedence bug with sustain level
Mike Pavone <pavone@retrodev.com>
parents:
381
diff
changeset
|
704 operator->sustain_level = (value & 0xF0) << 4; |
| 362 | 705 break; |
| 706 } | |
| 707 } | |
| 708 } else { | |
| 709 uint8_t channel = context->selected_reg & 0x3; | |
| 710 if (channel != 3) { | |
| 711 if (context->selected_part) { | |
| 712 channel += 3; | |
| 713 } | |
| 714 //printf("write targets channel %d\n", channel); | |
| 715 switch (context->selected_reg & 0xFC) | |
| 716 { | |
| 717 case REG_FNUM_LOW: | |
| 718 context->channels[channel].block = context->channels[channel].block_fnum_latch >> 3 & 0x7; | |
| 719 context->channels[channel].fnum = (context->channels[channel].block_fnum_latch & 0x7) << 8 | value; | |
| 720 context->channels[channel].keycode = context->channels[channel].block << 2 | fnum_to_keycode[context->channels[channel].fnum >> 7]; | |
| 721 ym_update_phase_inc(context, context->operators + channel*4, channel*4); | |
| 722 ym_update_phase_inc(context, context->operators + channel*4+1, channel*4+1); | |
| 723 ym_update_phase_inc(context, context->operators + channel*4+2, channel*4+2); | |
| 724 ym_update_phase_inc(context, context->operators + channel*4+3, channel*4+3); | |
| 725 break; | |
| 726 case REG_BLOCK_FNUM_H:{ | |
| 727 context->channels[channel].block_fnum_latch = value; | |
| 728 break; | |
| 729 } | |
|
383
72933100c55c
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Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
730 case REG_FNUM_LOW_CH3: |
|
72933100c55c
Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
731 if (channel < 3) { |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
732 context->ch3_supp[channel].block = context->ch3_supp[channel].block_fnum_latch >> 3 & 0x7; |
|
72933100c55c
Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
733 context->ch3_supp[channel].fnum = (context->ch3_supp[channel].block_fnum_latch & 0x7) << 8 | value; |
|
72933100c55c
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parents:
382
diff
changeset
|
734 context->ch3_supp[channel].keycode = context->ch3_supp[channel].block << 2 | fnum_to_keycode[context->ch3_supp[channel].fnum >> 7]; |
|
72933100c55c
Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
735 if (context->ch3_mode) { |
|
72933100c55c
Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
736 ym_update_phase_inc(context, context->operators + 2*4 + channel, 2*4); |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
737 } |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
738 } |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
739 break; |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
740 case REG_BLOCK_FN_CH3: |
|
72933100c55c
Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
741 if (channel < 3) { |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
742 context->ch3_supp[channel].block_fnum_latch = value; |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
743 } |
|
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
744 break; |
| 362 | 745 case REG_ALG_FEEDBACK: |
| 746 context->channels[channel].algorithm = value & 0x7; | |
| 747 context->channels[channel].feedback = value >> 3 & 0x7; | |
| 748 break; | |
| 749 case REG_LR_AMS_PMS: | |
|
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
750 context->channels[channel].pms = (value & 0x7) * 32; |
| 362 | 751 context->channels[channel].ams = value >> 4 & 0x3; |
| 752 context->channels[channel].lr = value & 0xC0; | |
|
369
fc820ab1394b
Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents:
365
diff
changeset
|
753 //printf("Write of %X to LR_AMS_PMS reg for channel %d\n", value, channel); |
| 362 | 754 break; |
| 755 } | |
| 756 } | |
| 757 } | |
|
448
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
758 |
| 362 | 759 context->write_cycle = context->current_cycle; |
| 374 | 760 context->status |= 0x80; |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
761 } |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
762 |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
763 uint8_t ym_read_status(ym2612_context * context) |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
764 { |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
765 return context->status; |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
766 } |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
767 |
|
424
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
768 #define GST_YM_OFFSET 0x1E4 |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
769 #define GST_YM_SIZE (0x3E4-GST_YM_OFFSET) |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
770 |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
771 uint8_t ym_load_gst(ym2612_context * context, FILE * gstfile) |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
772 { |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
773 uint8_t regdata[GST_YM_SIZE]; |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
774 fseek(gstfile, GST_YM_OFFSET, SEEK_SET); |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
775 if (fread(regdata, 1, sizeof(regdata), gstfile) != sizeof(regdata)) { |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
776 return 0; |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
777 } |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
778 for (int i = 0; i < sizeof(regdata); i++) { |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
779 if (i & 0x100) { |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
780 ym_address_write_part2(context, i & 0xFF); |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
781 } else { |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
782 ym_address_write_part1(context, i); |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
783 } |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
784 ym_data_write(context, regdata[i]); |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
785 } |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
786 return 1; |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
787 } |
|
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
411
diff
changeset
|
788 |