repos/blastem: blastem.c annotate

annotate blastem.c @ 345:29d2ca563499

Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall.

author	Mike Pavone <pavone@retrodev.com>
date	Sun, 19 May 2013 13:47:47 -0700
parents	b46771135442
children	aff29d50afd5

rev	line source
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1 #include "68kinst.h"
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	2 #include "m68k_to_x86.h"
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	3 #include "z80_to_x86.h"
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	4 #include "mem.h"
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	5 #include "vdp.h"
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	6 #include "render.h"
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	7 #include "blastem.h"
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	8 #include <stdio.h>
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	9 #include <stdlib.h>
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	10 #include <string.h>
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	11
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	12 #define CARTRIDGE_WORDS 0x200000
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	13 #define RAM_WORDS 32 * 1024
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	14 #define Z80_RAM_BYTES 8 * 1024
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	15 #define MCLKS_PER_68K 7
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	16 #define MCLKS_PER_Z80 15
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	17 //TODO: Figure out the exact value for this
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	18 #define CYCLE_NEVER 0xFFFFFFFF
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	19 #define LINES_NTSC 262
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	20 #define LINES_PAL 312
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	21
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	22 uint32_t mclks_per_frame = MCLKS_LINE*LINES_NTSC;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	23
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	24 uint16_t cart[CARTRIDGE_WORDS];
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	25 uint16_t ram[RAM_WORDS];
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	26 uint8_t z80_ram[Z80_RAM_BYTES];
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	27
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	28 io_port gamepad_1;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	29 io_port gamepad_2;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	30
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	31 int headless = 0;
265 c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	32 int z80_enabled = 1;
338 5c34a9c39394 Re-enable frame limit, but add a command line flag to disable it Mike Pavone <pavone@retrodev.com> parents: 336 diff changeset	33 int frame_limit = 1;
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	34
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	35 #ifndef MIN
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	36 #define MIN(a,b) ((a) < (b) ? (a) : (b))
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	37 #endif
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	38
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	39 #define SMD_HEADER_SIZE 512
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	40 #define SMD_MAGIC1 0x03
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	41 #define SMD_MAGIC2 0xAA
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	42 #define SMD_MAGIC3 0xBB
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	43 #define SMD_BLOCK_SIZE 0x4000
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	44
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	45 int load_smd_rom(long filesize, FILE * f)
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	46 {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	47 uint8_t block[SMD_BLOCK_SIZE];
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	48 filesize -= SMD_HEADER_SIZE;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	49 fseek(f, SMD_HEADER_SIZE, SEEK_SET);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	50
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	51 uint16_t * dst = cart;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	52 while (filesize > 0) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	53 fread(block, 1, SMD_BLOCK_SIZE, f);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	54 for (uint8_t low = block, high = (block+SMD_BLOCK_SIZE/2), *end = block+SMD_BLOCK_SIZE; high < end; high++, low++) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	55 (dst++) = high << 8 \| *low;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	56 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	57 filesize -= SMD_BLOCK_SIZE;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	58 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	59 return 1;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	60 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	61
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	62 int load_rom(char * filename)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	63 {
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	64 uint8_t header[10];
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	65 FILE * f = fopen(filename, "rb");
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	66 if (!f) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	67 return 0;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	68 }
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	69 fread(header, 1, sizeof(header), f);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	70 fseek(f, 0, SEEK_END);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	71 long filesize = ftell(f);
158 a2ab895d9708 Fix predec address mode when used as source Mike Pavone <pavone@retrodev.com> parents: 153 diff changeset	72 if (filesize/2 > CARTRIDGE_WORDS) {
a2ab895d9708 Fix predec address mode when used as source Mike Pavone <pavone@retrodev.com> parents: 153 diff changeset	73 //carts bigger than 4MB not currently supported
a2ab895d9708 Fix predec address mode when used as source Mike Pavone <pavone@retrodev.com> parents: 153 diff changeset	74 filesize = CARTRIDGE_WORDS*2;
a2ab895d9708 Fix predec address mode when used as source Mike Pavone <pavone@retrodev.com> parents: 153 diff changeset	75 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	76 fseek(f, 0, SEEK_SET);
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	77 if (header[1] == SMD_MAGIC1 && header[8] == SMD_MAGIC2 && header[9] == SMD_MAGIC3) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	78 int i;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	79 for (i = 3; i < 8; i++) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	80 if (header[i] != 0) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	81 break;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	82 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	83 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	84 if (i == 8) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	85 if (header[2]) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	86 fprintf(stderr, "%s is a split SMD ROM which is not currently supported", filename);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	87 exit(1);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	88 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	89 return load_smd_rom(filesize, f);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	90 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	91 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	92 fread(cart, 2, filesize/2, f);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	93 fclose(f);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	94 for(unsigned short * cur = cart; cur - cart < (filesize/2); ++cur)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	95 {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	96 cur = (cur >> 8) \| (*cur << 8);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	97 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	98 //TODO: Mirror ROM
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	99 return 1;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	100 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	101
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	102 uint16_t read_dma_value(uint32_t address)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	103 {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	104 //addresses here are word addresses (i.e. bit 0 corresponds to A1), so no need to do div by 2
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	105 if (address < 0x200000) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	106 return cart[address];
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	107 } else if(address >= 0x700000) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	108 return ram[address & 0x7FFF];
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	109 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	110 //TODO: Figure out what happens when you try to DMA from weird adresses like IO or banked Z80 area
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	111 return 0;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	112 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	113
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	114 //TODO: Make these dependent on the video mode
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	115 //#define VINT_CYCLE ((MCLKS_LINE * 225 + (148 + 40) * 4)/MCLKS_PER_68K)
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	116 #define ZVINT_CYCLE ((MCLKS_LINE * 225 + (148 + 40) * 4)/MCLKS_PER_Z80)
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	117 //#define VINT_CYCLE ((MCLKS_LINE * 226)/MCLKS_PER_68K)
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	118 //#define ZVINT_CYCLE ((MCLKS_LINE * 226)/MCLKS_PER_Z80)
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	119
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	120 void adjust_int_cycle(m68k_context * context, vdp_context * v_context)
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	121 {
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	122 context->int_cycle = CYCLE_NEVER;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	123 if ((context->status & 0x7) < 6) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	124 uint32_t next_vint = vdp_next_vint(v_context);
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	125 if (next_vint != CYCLE_NEVER) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	126 next_vint /= MCLKS_PER_68K;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	127 context->int_cycle = next_vint;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	128 context->int_num = 6;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	129 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	130 if ((context->status & 0x7) < 4) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	131 uint32_t next_hint = vdp_next_hint(v_context);
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	132 if (next_hint != CYCLE_NEVER) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	133 next_hint /= MCLKS_PER_68K;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	134 if (next_hint < context->int_cycle) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	135 context->int_cycle = next_hint;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	136 context->int_num = 4;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	137
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	138 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	139 }
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	140 }
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	141 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	142
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	143 context->target_cycle = context->int_cycle < context->sync_cycle ? context->int_cycle : context->sync_cycle;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	144 /*printf("Cyc: %d, Trgt: %d, Int Cyc: %d, Int: %d, Mask: %X, V: %d, H: %d, HICount: %d, HReg: %d, Line: %d\n",
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	145 context->current_cycle, context->target_cycle, context->int_cycle, context->int_num, (context->status & 0x7),
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	146 v_context->regs[REG_MODE_2] & 0x20, v_context->regs[REG_MODE_1] & 0x10, v_context->hint_counter, v_context->regs[REG_HINT], v_context->cycles / MCLKS_LINE);*/
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	147 }
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	148
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	149 int break_on_sync = 0;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	150
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	151 uint8_t reset = 1;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	152 uint8_t need_reset = 0;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	153 uint8_t busreq = 0;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	154 uint8_t busack = 0;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	155 uint32_t busack_cycle = CYCLE_NEVER;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	156 uint8_t new_busack = 0;
280 9ee64039ddeb Fix bank register update Mike Pavone <pavone@retrodev.com> parents: 279 diff changeset	157 //#define DO_DEBUG_PRINT
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	158 #ifdef DO_DEBUG_PRINT
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	159 #define dprintf printf
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	160 #define dputs puts
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	161 #else
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	162 #define dprintf
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	163 #define dputs
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	164 #endif
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	165
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	166 void sync_z80(z80_context * z_context, uint32_t mclks)
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	167 {
265 c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	168 if (z80_enabled && !reset && !busreq) {
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 327 diff changeset	169 genesis_context * gen = z_context->system;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	170 if (need_reset) {
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	171 z80_reset(z_context);
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	172 need_reset = 0;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	173 }
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	174 z_context->sync_cycle = mclks / MCLKS_PER_Z80;
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 327 diff changeset	175 uint32_t vint_cycle = vdp_next_vint_z80(gen->vdp) / MCLKS_PER_Z80;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	176 while (z_context->current_cycle < z_context->sync_cycle) {
335 14a937097c2b Some Z80 interrupt fixes Mike Pavone <pavone@retrodev.com> parents: 333 diff changeset	177 if (z_context->iff1 && z_context->current_cycle < vint_cycle) {
14a937097c2b Some Z80 interrupt fixes Mike Pavone <pavone@retrodev.com> parents: 333 diff changeset	178 z_context->int_cycle = vint_cycle < z_context->int_enable_cycle ? z_context->int_enable_cycle : vint_cycle;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	179 }
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	180 z_context->target_cycle = z_context->sync_cycle < z_context->int_cycle ? z_context->sync_cycle : z_context->int_cycle;
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	181 dprintf("Running Z80 from cycle %d to cycle %d. Native PC: %p\n", z_context->current_cycle, z_context->sync_cycle, z_context->native_pc);
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	182 z80_run(z_context);
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	183 dprintf("Z80 ran to cycle %d\n", z_context->current_cycle);
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	184 }
289 1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	185 } else {
1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	186 z_context->current_cycle = mclks / MCLKS_PER_Z80;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	187 }
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	188 }
321 146c87616b05 Don't update interrupt mask on non-interrupt exceptions Mike Pavone <pavone@retrodev.com> parents: 317 diff changeset	189 uint32_t frame=0;
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	190 m68k_context * sync_components(m68k_context * context, uint32_t address)
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	191 {
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	192 //TODO: Handle sync targets smaller than a single frame
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	193 genesis_context * gen = context->system;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	194 vdp_context * v_context = gen->vdp;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	195 z80_context * z_context = gen->z80;
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	196 uint32_t mclks = context->current_cycle * MCLKS_PER_68K;
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	197 sync_z80(z_context, mclks);
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	198 if (mclks >= mclks_per_frame) {
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	199 ym_run(gen->ym, context->current_cycle);
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	200 gen->ym->current_cycle -= mclks_per_frame/MCLKS_PER_68K;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	201 //printf("reached frame end \| 68K Cycles: %d, MCLK Cycles: %d\n", context->current_cycle, mclks);
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	202 vdp_run_context(v_context, mclks_per_frame);
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	203 if (!headless) {
338 5c34a9c39394 Re-enable frame limit, but add a command line flag to disable it Mike Pavone <pavone@retrodev.com> parents: 336 diff changeset	204 break_on_sync \|= wait_render_frame(v_context, frame_limit);
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	205 }
321 146c87616b05 Don't update interrupt mask on non-interrupt exceptions Mike Pavone <pavone@retrodev.com> parents: 317 diff changeset	206 frame++;
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	207 mclks -= mclks_per_frame;
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	208 vdp_adjust_cycles(v_context, mclks_per_frame);
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	209 io_adjust_cycles(&gamepad_1, context->current_cycle, mclks_per_frame/MCLKS_PER_68K);
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	210 io_adjust_cycles(&gamepad_2, context->current_cycle, mclks_per_frame/MCLKS_PER_68K);
344 b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	211 if (busack_cycle != CYCLE_NEVER) {
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	212 if (busack_cycle > mclks_per_frame/MCLKS_PER_68K) {
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	213 busack_cycle -= mclks_per_frame/MCLKS_PER_68K;
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	214 } else {
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	215 busack_cycle = CYCLE_NEVER;
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	216 busack = new_busack;
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	217 }
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	218 }
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	219 context->current_cycle -= mclks_per_frame/MCLKS_PER_68K;
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	220 if (z_context->current_cycle >= mclks_per_frame/MCLKS_PER_Z80) {
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	221 z_context->current_cycle -= mclks_per_frame/MCLKS_PER_Z80;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	222 } else {
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	223 z_context->current_cycle = 0;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	224 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	225 if (mclks) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	226 vdp_run_context(v_context, mclks);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	227 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	228 } else {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	229 //printf("running VDP for %d cycles\n", mclks - v_context->cycles);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	230 vdp_run_context(v_context, mclks);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	231 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	232 if (context->int_ack) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	233 vdp_int_ack(v_context, context->int_ack);
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	234 context->int_ack = 0;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	235 }
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	236 adjust_int_cycle(context, v_context);
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	237 if (break_on_sync && address) {
209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	238 break_on_sync = 0;
209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	239 debugger(context, address);
209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	240 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	241 return context;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	242 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	243
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	244 m68k_context * vdp_port_write(uint32_t vdp_port, m68k_context * context, uint16_t value)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	245 {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	246 if (vdp_port & 0x2700E0) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	247 printf("machine freeze due to write to address %X\n", 0xC00000 \| vdp_port);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	248 exit(1);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	249 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	250 vdp_port &= 0x1F;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	251 //printf("vdp_port write: %X, value: %X, cycle: %d\n", vdp_port, value, context->current_cycle);
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	252 sync_components(context, 0);
263 2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K. Mike Pavone <pavone@retrodev.com> parents: 260 diff changeset	253 vdp_context * v_context = context->video_context;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	254 if (vdp_port < 0x10) {
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	255 int blocked;
345 29d2ca563499 Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall. Mike Pavone <pavone@retrodev.com> parents: 344 diff changeset	256 uint32_t before_cycle = v_context->cycles;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	257 if (vdp_port < 4) {
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	258 while (vdp_data_port_write(v_context, value) < 0) {
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	259 while(v_context->flags & FLAG_DMA_RUN) {
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	260 vdp_run_dma_done(v_context, mclks_per_frame);
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	261 if (v_context->cycles >= mclks_per_frame) {
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	262 if (!headless) {
338 5c34a9c39394 Re-enable frame limit, but add a command line flag to disable it Mike Pavone <pavone@retrodev.com> parents: 336 diff changeset	263 wait_render_frame(v_context, frame_limit);
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	264 }
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	265 vdp_adjust_cycles(v_context, mclks_per_frame);
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	266 io_adjust_cycles(&gamepad_1, v_context->cycles/MCLKS_PER_68K, mclks_per_frame/MCLKS_PER_68K);
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	267 io_adjust_cycles(&gamepad_2, v_context->cycles/MCLKS_PER_68K, mclks_per_frame/MCLKS_PER_68K);
344 b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	268 if (busack_cycle != CYCLE_NEVER) {
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	269 if (busack_cycle > mclks_per_frame/MCLKS_PER_68K) {
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	270 busack_cycle -= mclks_per_frame/MCLKS_PER_68K;
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	271 } else {
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	272 busack_cycle = CYCLE_NEVER;
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	273 busack = new_busack;
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	274 }
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	275 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	276 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	277 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	278 context->current_cycle = v_context->cycles / MCLKS_PER_68K;
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	279 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	280 } else if(vdp_port < 8) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	281 blocked = vdp_control_port_write(v_context, value);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	282 if (blocked) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	283 while (blocked) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	284 while(v_context->flags & FLAG_DMA_RUN) {
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	285 vdp_run_dma_done(v_context, mclks_per_frame);
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	286 if (v_context->cycles >= mclks_per_frame) {
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	287 if (!headless) {
338 5c34a9c39394 Re-enable frame limit, but add a command line flag to disable it Mike Pavone <pavone@retrodev.com> parents: 336 diff changeset	288 wait_render_frame(v_context, frame_limit);
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	289 }
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	290 vdp_adjust_cycles(v_context, mclks_per_frame);
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	291 io_adjust_cycles(&gamepad_1, v_context->cycles/MCLKS_PER_68K, mclks_per_frame/MCLKS_PER_68K);
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	292 io_adjust_cycles(&gamepad_2, v_context->cycles/MCLKS_PER_68K, mclks_per_frame/MCLKS_PER_68K);
344 b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	293 if (busack_cycle != CYCLE_NEVER) {
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	294 if (busack_cycle > mclks_per_frame/MCLKS_PER_68K) {
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	295 busack_cycle -= mclks_per_frame/MCLKS_PER_68K;
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	296 } else {
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	297 busack_cycle = CYCLE_NEVER;
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	298 busack = new_busack;
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	299 }
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	300 }
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	301 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	302 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	303 if (blocked < 0) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	304 blocked = vdp_control_port_write(v_context, value);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	305 } else {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	306 blocked = 0;
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	307 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	308 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	309 context->current_cycle = v_context->cycles / MCLKS_PER_68K;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	310 } else {
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	311 adjust_int_cycle(context, v_context);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	312 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	313 } else {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	314 printf("Illegal write to HV Counter port %X\n", vdp_port);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	315 exit(1);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	316 }
345 29d2ca563499 Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall. Mike Pavone <pavone@retrodev.com> parents: 344 diff changeset	317 if (v_context->cycles != before_cycle) {
29d2ca563499 Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall. Mike Pavone <pavone@retrodev.com> parents: 344 diff changeset	318 context->current_cycle = v_context->cycles / MCLKS_PER_68K;
29d2ca563499 Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall. Mike Pavone <pavone@retrodev.com> parents: 344 diff changeset	319 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	320 } else if (vdp_port < 0x18) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	321 //TODO: Implement PSG
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	322 } else {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	323 //TODO: Implement undocumented test register(s)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	324 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	325 return context;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	326 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	327
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	328 m68k_context * vdp_port_write_b(uint32_t vdp_port, m68k_context * context, uint8_t value)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	329 {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	330 return vdp_port_write(vdp_port, context, value \| value << 8);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	331 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	332
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	333 uint16_t vdp_port_read(uint32_t vdp_port, m68k_context * context)
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	334 {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	335 if (vdp_port & 0x2700E0) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	336 printf("machine freeze due to read from address %X\n", 0xC00000 \| vdp_port);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	337 exit(1);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	338 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	339 vdp_port &= 0x1F;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	340 uint16_t value;
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	341 sync_components(context, 0);
263 2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K. Mike Pavone <pavone@retrodev.com> parents: 260 diff changeset	342 vdp_context * v_context = context->video_context;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	343 if (vdp_port < 0x10) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	344 if (vdp_port < 4) {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	345 value = vdp_data_port_read(v_context);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	346 } else if(vdp_port < 8) {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	347 value = vdp_control_port_read(v_context);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	348 } else {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	349 value = vdp_hv_counter_read(v_context);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	350 //printf("HV Counter: %X at cycle %d\n", value, v_context->cycles);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	351 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	352 context->current_cycle = v_context->cycles/MCLKS_PER_68K;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	353 } else {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	354 printf("Illegal read from PSG or test register port %X\n", vdp_port);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	355 exit(1);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	356 }
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	357 return value;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	358 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	359
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	360 uint8_t vdp_port_read_b(uint32_t vdp_port, m68k_context * context)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	361 {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	362 uint16_t value = vdp_port_read(vdp_port, context);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	363 if (vdp_port & 1) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	364 return value;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	365 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	366 return value >> 8;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	367 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	368 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	369
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	370 #define TH 0x40
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	371 #define TH_TIMEOUT 8000
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	372
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	373 void io_adjust_cycles(io_port * pad, uint32_t current_cycle, uint32_t deduction)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	374 {
89 9757b4c6c33f Minor joypad fix and commeount out some debug printfs Mike Pavone <pavone@retrodev.com> parents: 88 diff changeset	375 /*uint8_t control = pad->control \| 0x80;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	376 uint8_t th = control & pad->output;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	377 if (pad->input[GAMEPAD_TH0] \|\| pad->input[GAMEPAD_TH1]) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	378 printf("adjust_cycles \| control: %X, TH: %X, GAMEPAD_TH0: %X, GAMEPAD_TH1: %X, TH Counter: %d, Timeout: %d, Cycle: %d\n", control, th, pad->input[GAMEPAD_TH0], pad->input[GAMEPAD_TH1], pad->th_counter,pad->timeout_cycle, current_cycle);
89 9757b4c6c33f Minor joypad fix and commeount out some debug printfs Mike Pavone <pavone@retrodev.com> parents: 88 diff changeset	379 }*/
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	380 if (current_cycle >= pad->timeout_cycle) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	381 pad->th_counter = 0;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	382 } else {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	383 pad->timeout_cycle -= deduction;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	384 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	385 if (busack_cycle < CYCLE_NEVER && current_cycle < busack_cycle) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	386 busack_cycle -= deduction;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	387 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	388 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	389
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	390 void io_data_write(io_port * pad, m68k_context * context, uint8_t value)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	391 {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	392 if (pad->control & TH) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	393 //check if TH has changed
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	394 if ((pad->output & TH) ^ (value & TH)) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	395 if (context->current_cycle >= pad->timeout_cycle) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	396 pad->th_counter = 0;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	397 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	398 if (!(value & TH)) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	399 pad->th_counter++;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	400 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	401 pad->timeout_cycle = context->current_cycle + TH_TIMEOUT;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	402 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	403 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	404 pad->output = value;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	405 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	406
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	407 uint8_t io_data_read(io_port * pad, m68k_context * context)
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	408 {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	409 uint8_t control = pad->control \| 0x80;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	410 uint8_t th = control & pad->output;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	411 uint8_t input;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	412 if (context->current_cycle >= pad->timeout_cycle) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	413 pad->th_counter = 0;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	414 }
89 9757b4c6c33f Minor joypad fix and commeount out some debug printfs Mike Pavone <pavone@retrodev.com> parents: 88 diff changeset	415 /*if (pad->input[GAMEPAD_TH0] \|\| pad->input[GAMEPAD_TH1]) {
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	416 printf("io_data_read \| control: %X, TH: %X, GAMEPAD_TH0: %X, GAMEPAD_TH1: %X, TH Counter: %d, Timeout: %d, Cycle: %d\n", control, th, pad->input[GAMEPAD_TH0], pad->input[GAMEPAD_TH1], pad->th_counter,pad->timeout_cycle, context->current_cycle);
89 9757b4c6c33f Minor joypad fix and commeount out some debug printfs Mike Pavone <pavone@retrodev.com> parents: 88 diff changeset	417 }*/
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	418 if (th) {
195 c615061f7914 Fix 6-button controller emulation Mike Pavone <pavone@retrodev.com> parents: 186 diff changeset	419 if (pad->th_counter == 3) {
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	420 input = pad->input[GAMEPAD_EXTRA];
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	421 } else {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	422 input = pad->input[GAMEPAD_TH1];
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	423 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	424 } else {
195 c615061f7914 Fix 6-button controller emulation Mike Pavone <pavone@retrodev.com> parents: 186 diff changeset	425 if (pad->th_counter == 3) {
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	426 input = pad->input[GAMEPAD_TH0] \| 0xF;
195 c615061f7914 Fix 6-button controller emulation Mike Pavone <pavone@retrodev.com> parents: 186 diff changeset	427 } else if(pad->th_counter == 4) {
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	428 input = pad->input[GAMEPAD_TH0] & 0x30;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	429 } else {
89 9757b4c6c33f Minor joypad fix and commeount out some debug printfs Mike Pavone <pavone@retrodev.com> parents: 88 diff changeset	430 input = pad->input[GAMEPAD_TH0] \| 0xC;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	431 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	432 }
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	433 uint8_t value = ((~input) & (~control)) \| (pad->output & control);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	434 /*if (pad->input[GAMEPAD_TH0] \|\| pad->input[GAMEPAD_TH1]) {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	435 printf ("value: %X\n", value);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	436 }*/
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	437 return value;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	438 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	439
279 6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	440 uint32_t zram_counter = 0;
289 1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	441 #define Z80_ACK_DELAY 3
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	442 #define Z80_BUSY_DELAY 1//TODO: Find the actual value for this
289 1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	443 #define Z80_REQ_BUSY 1
1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	444 #define Z80_REQ_ACK 0
1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	445 #define Z80_RES_BUSACK reset
279 6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	446
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	447 m68k_context * io_write(uint32_t location, m68k_context * context, uint8_t value)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	448 {
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	449 genesis_context * gen = context->system;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	450 if (location < 0x10000) {
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	451 if (busack_cycle <= context->current_cycle) {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	452 busack = new_busack;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	453 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	454 }
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	455 if (!(busack \|\| reset)) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	456 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	457 if (location < 0x4000) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	458 z80_ram[location & 0x1FFF] = value;
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	459 z80_handle_code_write(location & 0x1FFF, gen->z80);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	460 } else if (location < 0x6000) {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	461 ym_run(gen->ym, context->current_cycle);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	462 if (location & 1) {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	463 ym_data_write(gen->ym, value);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	464 } else if(location & 2) {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	465 ym_address_write_part2(gen->ym, value);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	466 } else {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	467 ym_address_write_part1(gen->ym, value);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	468 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	469 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	470 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	471 } else {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	472 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	473 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	474 switch(location/2)
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	475 {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	476 case 0x1:
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	477 io_data_write(&gamepad_1, context, value);
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	478 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	479 case 0x2:
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	480 io_data_write(&gamepad_2, context, value);
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	481 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	482 case 0x3://PORT C Data
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	483 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	484 case 0x4:
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	485 gamepad_1.control = value;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	486 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	487 case 0x5:
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	488 gamepad_2.control = value;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	489 break;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	490 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	491 } else {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	492 if (location == 0x1100) {
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	493 sync_z80(gen->z80, context->current_cycle * MCLKS_PER_68K);
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	494 if (busack_cycle <= context->current_cycle) {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	495 busack = new_busack;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	496 busack_cycle = CYCLE_NEVER;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	497 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	498 if (value & 1) {
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	499 dputs("bus requesting Z80");
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	500
87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	501 if(!reset && !busreq) {
289 1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	502 busack_cycle = ((gen->z80->current_cycle + Z80_ACK_DELAY) * MCLKS_PER_Z80) / MCLKS_PER_68K;//context->current_cycle + Z80_ACK_DELAY;
1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	503 new_busack = Z80_REQ_ACK;
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	504 busreq = 1;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	505 }
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	506 } else {
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	507 if (busreq) {
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	508 dputs("releasing z80 bus");
280 9ee64039ddeb Fix bank register update Mike Pavone <pavone@retrodev.com> parents: 279 diff changeset	509 #ifdef DO_DEBUG_PRINT
279 6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	510 char fname[20];
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	511 sprintf(fname, "zram-%d", zram_counter++);
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	512 FILE * f = fopen(fname, "wb");
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	513 fwrite(z80_ram, 1, sizeof(z80_ram), f);
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	514 fclose(f);
280 9ee64039ddeb Fix bank register update Mike Pavone <pavone@retrodev.com> parents: 279 diff changeset	515 #endif
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	516 busack_cycle = ((gen->z80->current_cycle + Z80_BUSY_DELAY) * MCLKS_PER_Z80) / MCLKS_PER_68K;
87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	517 new_busack = Z80_REQ_BUSY;
87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	518 busreq = 0;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	519 }
289 1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	520 //busack_cycle = CYCLE_NEVER;
1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	521 //busack = Z80_REQ_BUSY;
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	522
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	523 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	524 } else if (location == 0x1200) {
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	525 sync_z80(gen->z80, context->current_cycle * MCLKS_PER_68K);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	526 if (value & 1) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	527 if (reset && busreq) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	528 new_busack = 0;
289 1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	529 busack_cycle = ((gen->z80->current_cycle + Z80_ACK_DELAY) * MCLKS_PER_Z80) / MCLKS_PER_68K;//context->current_cycle + Z80_ACK_DELAY;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	530 }
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	531 //TODO: Deal with the scenario in which reset is not asserted long enough
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	532 if (reset) {
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	533 need_reset = 1;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	534 //TODO: Add necessary delay between release of reset and start of execution
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	535 gen->z80->current_cycle = (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	536 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	537 reset = 0;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	538 } else {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	539 reset = 1;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	540 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	541 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	542 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	543 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	544 return context;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	545 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	546
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	547 m68k_context * io_write_w(uint32_t location, m68k_context * context, uint16_t value)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	548 {
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	549 genesis_context * gen = context->system;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	550 if (location < 0x10000) {
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	551 if (busack_cycle <= context->current_cycle) {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	552 busack = new_busack;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	553 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	554 }
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	555 if (!(busack \|\| reset)) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	556 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	557 if (location < 0x4000) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	558 z80_ram[location & 0x1FFE] = value >> 8;
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	559 z80_handle_code_write(location & 0x1FFE, gen->z80);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	560 } else if (location < 0x6000) {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	561 ym_run(gen->ym, context->current_cycle);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	562 if (location & 1) {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	563 ym_data_write(gen->ym, value >> 8);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	564 } else if(location & 2) {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	565 ym_address_write_part2(gen->ym, value >> 8);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	566 } else {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	567 ym_address_write_part1(gen->ym, value >> 8);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	568 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	569 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	570 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	571 } else {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	572 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	573 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	574 switch(location/2)
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	575 {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	576 case 0x1:
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	577 io_data_write(&gamepad_1, context, value);
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	578 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	579 case 0x2:
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	580 io_data_write(&gamepad_2, context, value);
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	581 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	582 case 0x3://PORT C Data
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	583 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	584 case 0x4:
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	585 gamepad_1.control = value;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	586 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	587 case 0x5:
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	588 gamepad_2.control = value;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	589 break;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	590 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	591 } else {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	592 //printf("IO Write of %X to %X @ %d\n", value, location, context->current_cycle);
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	593 if (location == 0x1100) {
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	594 sync_z80(gen->z80, context->current_cycle * MCLKS_PER_68K);
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	595 if (busack_cycle <= context->current_cycle) {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	596 busack = new_busack;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	597 busack_cycle = CYCLE_NEVER;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	598 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	599 if (value & 0x100) {
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	600 dprintf("bus requesting Z80 @ %d\n", (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80);
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	601
87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	602 if(!reset && !busreq) {
289 1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	603 busack_cycle = ((gen->z80->current_cycle + Z80_ACK_DELAY) * MCLKS_PER_Z80) / MCLKS_PER_68K;//context->current_cycle + Z80_ACK_DELAY;
1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	604 new_busack = Z80_REQ_ACK;
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	605 busreq = 1;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	606 }
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	607 } else {
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	608 if (busreq) {
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	609 dprintf("releasing Z80 bus @ %d\n", (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80);
280 9ee64039ddeb Fix bank register update Mike Pavone <pavone@retrodev.com> parents: 279 diff changeset	610 #ifdef DO_DEBUG_PRINT
279 6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	611 char fname[20];
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	612 sprintf(fname, "zram-%d", zram_counter++);
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	613 FILE * f = fopen(fname, "wb");
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	614 fwrite(z80_ram, 1, sizeof(z80_ram), f);
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	615 fclose(f);
280 9ee64039ddeb Fix bank register update Mike Pavone <pavone@retrodev.com> parents: 279 diff changeset	616 #endif
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	617 busack_cycle = ((gen->z80->current_cycle + Z80_BUSY_DELAY) * MCLKS_PER_Z80) / MCLKS_PER_68K;
87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	618 new_busack = Z80_REQ_BUSY;
87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	619 busreq = 0;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	620 }
289 1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	621 //busack_cycle = CYCLE_NEVER;
1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	622 //busack = Z80_REQ_BUSY;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	623 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	624 } else if (location == 0x1200) {
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	625 sync_z80(gen->z80, context->current_cycle * MCLKS_PER_68K);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	626 if (value & 0x100) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	627 if (reset && busreq) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	628 new_busack = 0;
289 1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	629 busack_cycle = ((gen->z80->current_cycle + Z80_ACK_DELAY) * MCLKS_PER_Z80) / MCLKS_PER_68K;//context->current_cycle + Z80_ACK_DELAY;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	630 }
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	631 //TODO: Deal with the scenario in which reset is not asserted long enough
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	632 if (reset) {
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	633 need_reset = 1;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	634 //TODO: Add necessary delay between release of reset and start of execution
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	635 gen->z80->current_cycle = (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	636 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	637 reset = 0;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	638 } else {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	639 reset = 1;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	640 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	641 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	642 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	643 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	644 return context;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	645 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	646
130 0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	647 #define USA 0x80
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	648 #define JAP 0x00
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	649 #define EUR 0xC0
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	650 #define NO_DISK 0x20
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	651 uint8_t version_reg = NO_DISK \| USA;
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	652
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	653 uint8_t io_read(uint32_t location, m68k_context * context)
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	654 {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	655 uint8_t value;
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	656 genesis_context *gen = context->system;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	657 if (location < 0x10000) {
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	658 if (busack_cycle <= context->current_cycle) {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	659 busack = new_busack;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	660 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	661 }
289 1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	662 if (!(busack==Z80_REQ_BUSY \|\| reset)) {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	663 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	664 if (location < 0x4000) {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	665 value = z80_ram[location & 0x1FFF];
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	666 } else if (location < 0x6000) {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	667 ym_run(gen->ym, context->current_cycle);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	668 value = ym_read_status(gen->ym);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	669 } else {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	670 value = 0xFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	671 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	672 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	673 value = 0xFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	674 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	675 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	676 location &= 0x1FFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	677 if (location < 0x100) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	678 switch(location/2)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	679 {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	680 case 0x0:
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	681 //version bits should be 0 for now since we're not emulating TMSS
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	682 value = version_reg;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	683 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	684 case 0x1:
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	685 value = io_data_read(&gamepad_1, context);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	686 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	687 case 0x2:
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	688 value = io_data_read(&gamepad_2, context);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	689 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	690 case 0x3://PORT C Data
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	691 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	692 case 0x4:
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	693 value = gamepad_1.control;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	694 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	695 case 0x5:
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	696 value = gamepad_2.control;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	697 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	698 default:
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	699 value = 0xFF;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	700 }
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	701 } else {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	702 if (location == 0x1100) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	703 if (busack_cycle <= context->current_cycle) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	704 busack = new_busack;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	705 busack_cycle = CYCLE_NEVER;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	706 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	707 value = Z80_RES_BUSACK \|\| busack;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	708 dprintf("Byte read of BUSREQ returned %d @ %d (reset: %d, busack: %d, busack_cycle %d)\n", value, context->current_cycle, reset, busack, busack_cycle);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	709 } else if (location == 0x1200) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	710 value = !reset;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	711 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	712 value = 0xFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	713 printf("Byte read of unknown IO location: %X\n", location);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	714 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	715 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	716 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	717 return value;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	718 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	719
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	720 uint16_t io_read_w(uint32_t location, m68k_context * context)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	721 {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	722 uint16_t value;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	723 genesis_context * gen = context->system;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	724 if (location < 0x10000) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	725 if (busack_cycle <= context->current_cycle) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	726 busack = new_busack;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	727 busack_cycle = CYCLE_NEVER;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	728 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	729 if (!(busack==Z80_REQ_BUSY \|\| reset)) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	730 location &= 0x7FFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	731 if (location < 0x4000) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	732 value = z80_ram[location & 0x1FFE];
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	733 } else if (location < 0x6000) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	734 ym_run(gen->ym, context->current_cycle);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	735 value = ym_read_status(gen->ym);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	736 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	737 value = 0xFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	738 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	739 value = value \| (value << 8);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	740 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	741 value = 0xFFFF;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	742 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	743 } else {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	744 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	745 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	746 switch(location/2)
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	747 {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	748 case 0x0:
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	749 //version bits should be 0 for now since we're not emulating TMSS
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	750 //Not sure about the other bits
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	751 value = version_reg;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	752 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	753 case 0x1:
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	754 value = io_data_read(&gamepad_1, context);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	755 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	756 case 0x2:
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	757 value = io_data_read(&gamepad_2, context);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	758 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	759 case 0x3://PORT C Data
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	760 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	761 case 0x4:
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	762 value = gamepad_1.control;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	763 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	764 case 0x5:
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	765 value = gamepad_2.control;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	766 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	767 case 0x6:
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	768 //PORT C Control
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	769 value = 0;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	770 break;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	771 default:
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	772 value = 0;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	773 }
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	774 value = value \| (value << 8);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	775 //printf("Word read to %X returned %d\n", location, value);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	776 } else {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	777 if (location == 0x1100) {
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	778 if (busack_cycle <= context->current_cycle) {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	779 busack = new_busack;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	780 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	781 }
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	782 value = (Z80_RES_BUSACK \|\| busack) << 8;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	783 //printf("Word read of BUSREQ returned %d\n", value);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	784 } else if (location == 0x1200) {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	785 value = (!reset) << 8;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	786 } else {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	787 printf("Word read of unknown IO location: %X\n", location);
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	788 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	789 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	790 }
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	791 return value;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	792 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	793
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	794 z80_context * z80_write_ym(uint16_t location, z80_context * context, uint8_t value)
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	795 {
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	796 genesis_context * gen = context->system;
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	797 ym_run(gen->ym, (context->current_cycle * MCLKS_PER_Z80) / MCLKS_PER_68K);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	798 if (location & 1) {
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	799 ym_data_write(gen->ym, value);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	800 } else if (location & 2) {
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	801 ym_address_write_part2(gen->ym, value);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	802 } else {
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	803 ym_address_write_part1(gen->ym, value);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	804 }
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	805 return context;
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	806 }
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	807
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	808 uint8_t z80_read_ym(uint16_t location, z80_context * context)
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	809 {
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	810 genesis_context * gen = context->system;
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	811 ym_run(gen->ym, (context->current_cycle * MCLKS_PER_Z80) / MCLKS_PER_68K);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	812 return ym_read_status(gen->ym);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	813 }
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	814
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	815 typedef struct bp_def {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	816 struct bp_def * next;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	817 uint32_t address;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	818 uint32_t index;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	819 } bp_def;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	820
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	821 bp_def * breakpoints = NULL;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	822 uint32_t bp_index = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	823
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	824 bp_def find_breakpoint(bp_def cur, uint32_t address)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	825 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	826 while (*cur) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	827 if ((*cur)->address == address) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	828 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	829 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	830 cur = &((*cur)->next);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	831 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	832 return cur;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	833 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	834
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	835 bp_def find_breakpoint_idx(bp_def cur, uint32_t index)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	836 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	837 while (*cur) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	838 if ((*cur)->index == index) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	839 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	840 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	841 cur = &((*cur)->next);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	842 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	843 return cur;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	844 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	845
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	846 char * find_param(char * buf)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	847 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	848 for (; *buf; buf++) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	849 if (*buf == ' ') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	850 if (*(buf+1)) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	851 return buf+1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	852 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	853 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	854 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	855 return NULL;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	856 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	857
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	858 void strip_nl(char * buf)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	859 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	860 for(; *buf; buf++) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	861 if (*buf == '\n') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	862 *buf = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	863 return;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	864 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	865 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	866 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	867
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	868 m68k_context * debugger(m68k_context * context, uint32_t address)
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	869 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	870 static char last_cmd[1024];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	871 char input_buf[1024];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	872 static uint32_t branch_t;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	873 static uint32_t branch_f;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	874 m68kinst inst;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	875 //probably not necessary, but let's play it safe
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	876 address &= 0xFFFFFF;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	877 if (address == branch_t) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	878 bp_def ** f_bp = find_breakpoint(&breakpoints, branch_f);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	879 if (!*f_bp) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	880 remove_breakpoint(context, branch_f);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	881 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	882 branch_t = branch_f = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	883 } else if(address == branch_f) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	884 bp_def ** t_bp = find_breakpoint(&breakpoints, branch_t);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	885 if (!*t_bp) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	886 remove_breakpoint(context, branch_t);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	887 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	888 branch_t = branch_f = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	889 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	890 //Check if this is a user set breakpoint, or just a temporary one
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	891 bp_def ** this_bp = find_breakpoint(&breakpoints, address);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	892 if (*this_bp) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	893 printf("Breakpoint %d hit\n", (*this_bp)->index);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	894 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	895 remove_breakpoint(context, address);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	896 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	897 uint16_t * pc;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	898 if (address < 0x400000) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	899 pc = cart + address/2;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	900 } else if(address > 0xE00000) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	901 pc = ram + (address & 0xFFFF)/2;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	902 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	903 fprintf(stderr, "Entered debugger at address %X\n", address);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	904 exit(1);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	905 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	906 uint16_t * after_pc = m68k_decode(pc, &inst, address);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	907 m68k_disasm(&inst, input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	908 printf("%X: %s\n", address, input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	909 uint32_t after = address + (after_pc-pc)*2;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	910 int debugging = 1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	911 while (debugging) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	912 fputs(">", stdout);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	913 if (!fgets(input_buf, sizeof(input_buf), stdin)) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	914 fputs("fgets failed", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	915 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	916 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	917 strip_nl(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	918 //hitting enter repeats last command
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	919 if (input_buf[0]) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	920 strcpy(last_cmd, input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	921 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	922 strcpy(input_buf, last_cmd);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	923 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	924 char * param;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	925 char format[8];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	926 uint32_t value;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	927 bp_def * new_bp;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	928 switch(input_buf[0])
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	929 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	930 case 'c':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	931 puts("Continuing");
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	932 debugging = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	933 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	934 case 'b':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	935 param = find_param(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	936 if (!param) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	937 fputs("b command requires a parameter\n", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	938 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	939 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	940 value = strtol(param, NULL, 16);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	941 insert_breakpoint(context, value, (uint8_t *)debugger);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	942 new_bp = malloc(sizeof(bp_def));
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	943 new_bp->next = breakpoints;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	944 new_bp->address = value;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	945 new_bp->index = bp_index++;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	946 breakpoints = new_bp;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	947 printf("Breakpoint %d set at %X\n", new_bp->index, value);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	948 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	949 case 'a':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	950 param = find_param(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	951 if (!param) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	952 fputs("a command requires a parameter\n", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	953 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	954 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	955 value = strtol(param, NULL, 16);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	956 insert_breakpoint(context, value, (uint8_t *)debugger);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	957 debugging = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	958 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	959 case 'd':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	960 param = find_param(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	961 if (!param) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	962 fputs("b command requires a parameter\n", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	963 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	964 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	965 value = atoi(param);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	966 this_bp = find_breakpoint_idx(&breakpoints, value);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	967 if (!*this_bp) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	968 fprintf(stderr, "Breakpoint %d does not exist\n", value);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	969 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	970 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	971 new_bp = *this_bp;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	972 this_bp = (this_bp)->next;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	973 free(new_bp);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	974 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	975 case 'p':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	976 strcpy(format, "%s: %d\n");
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	977 if (input_buf[1] == '/') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	978 switch (input_buf[2])
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	979 {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	980 case 'x':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	981 case 'X':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	982 case 'd':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	983 case 'c':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	984 format[5] = input_buf[2];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	985 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	986 default:
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	987 fprintf(stderr, "Unrecognized format character: %c\n", input_buf[2]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	988 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	989 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	990 param = find_param(input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	991 if (!param) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	992 fputs("p command requires a parameter\n", stderr);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	993 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	994 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	995 if (param[0] == 'd' && param[1] >= '0' && param[1] <= '7') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	996 value = context->dregs[param[1]-'0'];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	997 } else if (param[0] == 'a' && param[1] >= '0' && param[1] <= '7') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	998 value = context->aregs[param[1]-'0'];
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	999 } else if (param[0] == 'S' && param[1] == 'R') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1000 value = (context->status << 8);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1001 for (int flag = 0; flag < 5; flag++) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1002 value \|= context->flags[flag] << (4-flag);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1003 }
185 b204fbed4efe Add ability to print out current 68K cycle in debugger Mike Pavone <pavone@retrodev.com> parents: 184 diff changeset	1004 } else if(param[0] == 'c') {
b204fbed4efe Add ability to print out current 68K cycle in debugger Mike Pavone <pavone@retrodev.com> parents: 184 diff changeset	1005 value = context->current_cycle;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1006 } else if (param[0] == '0' && param[1] == 'x') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1007 uint32_t p_addr = strtol(param+2, NULL, 16);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1008 value = read_dma_value(p_addr/2);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1009 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1010 fprintf(stderr, "Unrecognized parameter to p: %s\n", param);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1011 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1012 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1013 printf(format, param, value);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1014 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1015 case 'n':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1016 //TODO: Deal with jmp, dbcc, rtr and rte
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1017 if (inst.op == M68K_RTS) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1018 after = (read_dma_value(context->aregs[7]/2) << 16) \| read_dma_value(context->aregs[7]/2 + 1);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1019 } else if(inst.op == M68K_BCC && inst.extra.cond != COND_FALSE) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1020 if (inst.extra.cond = COND_TRUE) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1021 after = inst.address + 2 + inst.src.params.immed;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1022 } else {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1023 branch_f = after;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1024 branch_t = inst.address + 2 + inst.src.params.immed;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1025 insert_breakpoint(context, branch_t, (uint8_t *)debugger);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1026 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1027 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1028 insert_breakpoint(context, after, (uint8_t *)debugger);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1029 debugging = 0;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1030 break;
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 321 diff changeset	1031 case 'v': {
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 321 diff changeset	1032 genesis_context * gen = context->system;
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 321 diff changeset	1033 //VDP debug commands
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 321 diff changeset	1034 switch(input_buf[1])
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 321 diff changeset	1035 {
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 321 diff changeset	1036 case 's':
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 321 diff changeset	1037 vdp_print_sprite_table(gen->vdp);
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 321 diff changeset	1038 break;
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 321 diff changeset	1039 case 'r':
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 321 diff changeset	1040 vdp_print_reg_explain(gen->vdp);
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 321 diff changeset	1041 break;
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 321 diff changeset	1042 }
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 321 diff changeset	1043 break;
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 321 diff changeset	1044 }
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1045 case 'q':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1046 puts("Quitting");
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1047 exit(0);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1048 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1049 default:
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1050 fprintf(stderr, "Unrecognized debugger command %s\n", input_buf);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1051 break;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1052 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1053 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1054 return context;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1055 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1056
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1057 void init_run_cpu(genesis_context * gen, int debug, FILE * address_log)
211 464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1058 {
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1059 m68k_context context;
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1060 x86_68k_options opts;
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1061 gen->m68k = &context;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1062 memmap_chunk memmap[] = {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1063 {0, 0x400000, 0xFFFFFF, 0, MMAP_READ \| MMAP_WRITE, cart,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1064 NULL, NULL, NULL, NULL},
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1065 {0xE00000, 0x1000000, 0xFFFF, 0, MMAP_READ \| MMAP_WRITE \| MMAP_CODE, ram,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1066 NULL, NULL, NULL, NULL},
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1067 {0xC00000, 0xE00000, 0x1FFFFF, 0, 0, NULL,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1068 (read_16_fun)vdp_port_read, (write_16_fun)vdp_port_write,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1069 (read_8_fun)vdp_port_read_b, (write_8_fun)vdp_port_write_b},
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1070 {0xA00000, 0xA12000, 0x1FFFF, 0, 0, NULL,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1071 (read_16_fun)io_read_w, (write_16_fun)io_write_w,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1072 (read_8_fun)io_read, (write_8_fun)io_write}
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1073 };
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1074 init_x86_68k_opts(&opts, memmap, sizeof(memmap)/sizeof(memmap_chunk));
211 464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1075 opts.address_log = address_log;
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1076 init_68k_context(&context, opts.native_code_map, &opts);
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1077
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1078 context.video_context = gen->vdp;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1079 context.system = gen;
211 464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1080 //cartridge ROM
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1081 context.mem_pointers[0] = cart;
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	1082 context.target_cycle = context.sync_cycle = mclks_per_frame/MCLKS_PER_68K;
211 464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1083 //work RAM
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1084 context.mem_pointers[1] = ram;
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1085 uint32_t address;
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1086 /*address = cart[0x68/2] << 16 \| cart[0x6A/2];
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1087 translate_m68k_stream(address, &context);
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1088 address = cart[0x70/2] << 16 \| cart[0x72/2];
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1089 translate_m68k_stream(address, &context);
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1090 address = cart[0x78/2] << 16 \| cart[0x7A/2];
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1091 translate_m68k_stream(address, &context);*/
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1092 address = cart[2] << 16 \| cart[3];
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1093 translate_m68k_stream(address, &context);
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1094 if (debug) {
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1095 insert_breakpoint(&context, address, (uint8_t *)debugger);
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1096 }
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1097 m68k_reset(&context);
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1098 }
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1099
340 58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1100 char title[64];
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1101
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1102 #define TITLE_START 0x150
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1103 #define TITLE_END (TITLE_START+48)
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1104
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1105 void update_title()
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1106 {
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1107 uint16_t *last = cart + TITLE_END/2 - 1;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1108 while(last > cart + TITLE_START/2 && *last == 0x2020)
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1109 {
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1110 last--;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1111 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1112 uint16_t *start = cart + TITLE_START/2;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1113 char *cur = title;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1114 char last_char = ' ';
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1115 for (; start != last; start++)
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1116 {
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1117 if ((last_char != ' ' \|\| (start >> 8) != ' ') && (start >> 8) < 0x80) {
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1118 (cur++) = start >> 8;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1119 last_char = *start >> 8;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1120 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1121 if (last_char != ' ' \|\| (start & 0xFF) != ' ' && (start & 0xFF) < 0x80) {
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1122 (cur++) = start;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1123 last_char = *start & 0xFF;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1124 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1125 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1126 (cur++) = start >> 8;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1127 if ((*start & 0xFF) != ' ') {
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1128 (cur++) = start;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1129 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1130 strcpy(cur, " - BlastEm");
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1131 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1132
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1133 #define REGION_START 0x1F0
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1134
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1135 int detect_specific_region(char region)
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1136 {
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1137 return cart[REGION_START/2] & 0xFF == region \|\| (cart[REGION_START/2]) >> 8 == region \|\| cart[REGION_START/2+1] & 0xFF == region;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1138 }
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1139
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1140 void detect_region()
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1141 {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1142 if (detect_specific_region('U')\|\| detect_specific_region('B') \|\| detect_specific_region('4')) {
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1143 version_reg = NO_DISK \| USA;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1144 } else if (detect_specific_region('J')) {
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1145 version_reg = NO_DISK \| JAP;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1146 } else if (detect_specific_region('E') \|\| detect_specific_region('A')) {
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1147 version_reg = NO_DISK \| EUR;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1148 }
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1149 }
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1150
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1151 int main(int argc, char ** argv)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1152 {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1153 if (argc < 2) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1154 fputs("Usage: blastem FILENAME\n", stderr);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1155 return 1;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1156 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1157 if(!load_rom(argv[1])) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1158 fprintf(stderr, "Failed to open %s for reading\n", argv[1]);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1159 return 1;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1160 }
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1161 detect_region();
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1162 int width = -1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1163 int height = -1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1164 int debug = 0;
197 7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	1165 FILE *address_log = NULL;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1166 for (int i = 2; i < argc; i++) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1167 if (argv[i][0] == '-') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1168 switch(argv[i][1]) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1169 case 'd':
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1170 debug = 1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1171 break;
338 5c34a9c39394 Re-enable frame limit, but add a command line flag to disable it Mike Pavone <pavone@retrodev.com> parents: 336 diff changeset	1172 case 'f':
5c34a9c39394 Re-enable frame limit, but add a command line flag to disable it Mike Pavone <pavone@retrodev.com> parents: 336 diff changeset	1173 frame_limit = 0;
5c34a9c39394 Re-enable frame limit, but add a command line flag to disable it Mike Pavone <pavone@retrodev.com> parents: 336 diff changeset	1174 break;
197 7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	1175 case 'l':
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	1176 address_log = fopen("address.log", "w");
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	1177 break;
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	1178 case 'v':
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	1179 headless = 1;
2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	1180 break;
265 c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	1181 case 'n':
c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	1182 z80_enabled = 0;
c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	1183 break;
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1184 case 'r':
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1185 i++;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1186 if (i >= argc) {
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1187 fputs("-r must be followed by region (J, U or E)\n", stderr);
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1188 return 1;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1189 }
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1190 switch (argv[i][0])
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1191 {
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1192 case 'j':
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1193 case 'J':
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1194 version_reg = NO_DISK \| JAP;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1195 break;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1196 case 'u':
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1197 case 'U':
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1198 version_reg = NO_DISK \| USA;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1199 break;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1200 case 'e':
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1201 case 'E':
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1202 version_reg = NO_DISK \| EUR;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1203 break;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1204 default:
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1205 fprintf(stderr, "'%c' is not a valid region character for the -r option\n", argv[i][0]);
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1206 return 1;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1207 }
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1208 break;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1209 default:
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1210 fprintf(stderr, "Unrecognized switch %s\n", argv[i]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1211 return 1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1212 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1213 } else if (width < 0) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1214 width = atoi(argv[i]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1215 } else if (height < 0) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1216 height = atoi(argv[i]);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1217 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1218 }
340 58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1219 update_title();
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1220 width = width < 320 ? 320 : width;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1221 height = height < 240 ? (width/320) * 240 : height;
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	1222 if (!headless) {
340 58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1223 render_init(width, height, title);
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	1224 }
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	1225 if (version_reg & 0x40) {
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	1226 mclks_per_frame = MCLKS_LINE * LINES_PAL;
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	1227 render_fps(50);
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	1228 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1229 vdp_context v_context;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1230
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1231 init_vdp_context(&v_context);
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1232
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1233 ym2612_context y_context;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1234 ym_init(&y_context);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1235
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1236 z80_context z_context;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1237 x86_z80_options z_opts;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1238 init_x86_z80_opts(&z_opts);
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1239 init_z80_context(&z_context, &z_opts);
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	1240
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	1241 genesis_context gen;
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	1242
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	1243 z_context.system = &gen;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1244 z_context.mem_pointers[0] = z80_ram;
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	1245 z_context.sync_cycle = z_context.target_cycle = mclks_per_frame/MCLKS_PER_Z80;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1246 z_context.int_cycle = CYCLE_NEVER;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1247 z_context.mem_pointers[1] = z_context.mem_pointers[2] = (uint8_t *)cart;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1248
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1249 gen.z80 = &z_context;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1250 gen.vdp = &v_context;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1251 gen.ym = &y_context;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1252
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1253 init_run_cpu(&gen, debug, address_log);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1254 return 0;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1255 }

Mercurial > repos > blastem

annotate blastem.c @ 345:29d2ca563499