Mercurial > repos > blastem
annotate ym2612.c @ 511:2c1679058727
Add support for VGM 1.50 PCM data blocks
| author | Michael Pavone <pavone@retrodev.com> |
|---|---|
| date | Thu, 06 Feb 2014 22:18:19 -0800 |
| parents | b7b7a1cab44a |
| children | 24ebabd89162 |
| rev | line source |
|---|---|
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1 /* |
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2 Copyright 2013 Michael Pavone |
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #include <string.h> |
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7 #include <math.h> |
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8 #include <stdio.h> |
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9 #include <stdlib.h> |
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10 #include "ym2612.h" |
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11 #include "render.h" |
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12 #include "wave.h" |
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13 #include "blastem.h" |
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14 |
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15 //#define DO_DEBUG_PRINT |
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16 #ifdef DO_DEBUG_PRINT |
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17 #define dfprintf fprintf |
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18 #define dfopen(var, fname, mode) var=fopen(fname, mode) |
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19 #else |
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20 #define dfprintf |
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21 #define dfopen(var, fname, mode) |
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22 #endif |
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23 |
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24 #define BUSY_CYCLES 17 |
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25 #define OP_UPDATE_PERIOD 144 |
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26 |
| 362 | 27 enum { |
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28 REG_LFO = 0x22, |
| 362 | 29 REG_TIMERA_HIGH = 0x24, |
| 30 REG_TIMERA_LOW, | |
| 31 REG_TIMERB, | |
| 32 REG_TIME_CTRL, | |
| 33 REG_KEY_ONOFF, | |
| 34 REG_DAC = 0x2A, | |
| 35 REG_DAC_ENABLE, | |
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36 |
| 362 | 37 REG_DETUNE_MULT = 0x30, |
| 38 REG_TOTAL_LEVEL = 0x40, | |
| 39 REG_ATTACK_KS = 0x50, | |
| 40 REG_DECAY_AM = 0x60, | |
| 41 REG_SUSTAIN_RATE = 0x70, | |
| 42 REG_S_LVL_R_RATE = 0x80, | |
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43 |
| 362 | 44 REG_FNUM_LOW = 0xA0, |
| 45 REG_BLOCK_FNUM_H = 0xA4, | |
| 46 REG_FNUM_LOW_CH3 = 0xA8, | |
| 47 REG_BLOCK_FN_CH3 = 0xAC, | |
| 48 REG_ALG_FEEDBACK = 0xB0, | |
| 49 REG_LR_AMS_PMS = 0xB4 | |
| 50 }; | |
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51 |
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52 #define BIT_TIMERA_ENABLE 0x1 |
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53 #define BIT_TIMERB_ENABLE 0x2 |
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54 #define BIT_TIMERA_OVEREN 0x4 |
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55 #define BIT_TIMERB_OVEREN 0x8 |
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56 #define BIT_TIMERA_RESET 0x10 |
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57 #define BIT_TIMERB_RESET 0x20 |
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58 |
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59 #define BIT_STATUS_TIMERA 0x1 |
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60 #define BIT_STATUS_TIMERB 0x2 |
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61 |
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62 enum { |
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63 PHASE_ATTACK, |
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64 PHASE_DECAY, |
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65 PHASE_SUSTAIN, |
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66 PHASE_RELEASE |
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67 }; |
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68 |
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69 uint8_t did_tbl_init = 0; |
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70 //According to Nemesis, real hardware only uses a 256 entry quarter sine table; however, |
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71 //memory is cheap so using a half sine table will probably save some cycles |
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72 //a full sine table would be nice, but negative numbers don't get along with log2 |
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73 #define SINE_TABLE_SIZE 512 |
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74 uint16_t sine_table[SINE_TABLE_SIZE]; |
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75 //Similar deal here with the power table for log -> linear conversion |
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76 //According to Nemesis, real hardware only uses a 256 entry table for the fractional part |
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77 //and uses the whole part as a shift amount. |
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78 #define POW_TABLE_SIZE (1 << 13) |
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79 uint16_t pow_table[POW_TABLE_SIZE]; |
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80 |
| 362 | 81 uint16_t rate_table_base[] = { |
| 82 //main portion | |
| 83 0,1,0,1,0,1,0,1, | |
| 84 0,1,0,1,1,1,0,1, | |
| 85 0,1,1,1,0,1,1,1, | |
| 86 0,1,1,1,1,1,1,1, | |
| 87 //top end | |
| 88 1,1,1,1,1,1,1,1, | |
| 89 1,1,1,2,1,1,1,2, | |
| 90 1,2,1,2,1,2,1,2, | |
| 91 1,2,2,2,1,2,2,2, | |
| 92 }; | |
| 93 | |
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94 uint16_t rate_table[64*8]; |
| 362 | 95 |
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96 uint8_t lfo_timer_values[] = {108, 77, 71, 67, 62, 44, 8, 5}; |
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97 uint8_t lfo_pm_base[][8] = { |
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98 {0, 0, 0, 0, 0, 0, 0, 0}, |
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99 {0, 0, 0, 0, 4, 4, 4, 4}, |
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100 {0, 0, 0, 4, 4, 4, 8, 8}, |
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101 {0, 0, 4, 4, 8, 8, 0xc, 0xc}, |
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102 {0, 0, 4, 8, 8, 8, 0xc,0x10}, |
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103 {0, 0, 8, 0xc,0x10,0x10,0x14,0x18}, |
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104 {0, 0,0x10,0x18,0x20,0x20,0x28,0x30}, |
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105 {0, 0,0x20,0x30,0x40,0x40,0x50,0x60} |
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106 }; |
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107 int16_t lfo_pm_table[128 * 32 * 8]; |
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108 |
| 362 | 109 #define MAX_ENVELOPE 0xFFC |
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110 #define YM_DIVIDER 2 |
| 374 | 111 #define CYCLE_NEVER 0xFFFFFFFF |
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112 |
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113 uint16_t round_fixed_point(double value, int dec_bits) |
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114 { |
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115 return value * (1 << dec_bits) + 0.5; |
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116 } |
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117 |
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118 FILE * debug_file = NULL; |
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119 uint32_t first_key_on=0; |
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120 |
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121 ym2612_context * log_context = NULL; |
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122 |
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123 void ym_finalize_log() |
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124 { |
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125 for (int i = 0; i < NUM_CHANNELS; i++) { |
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126 if (log_context->channels[i].logfile) { |
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127 wave_finalize(log_context->channels[i].logfile); |
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128 } |
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129 } |
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130 } |
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131 #define BUFFER_INC_RES 1000000000UL |
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132 |
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133 void ym_adjust_master_clock(ym2612_context * context, uint32_t master_clock) |
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134 { |
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135 uint64_t old_inc = context->buffer_inc; |
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136 context->buffer_inc = ((BUFFER_INC_RES * (uint64_t)context->sample_rate) / (uint64_t)master_clock) * (uint64_t)context->clock_inc; |
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137 } |
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138 |
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139 void ym_init(ym2612_context * context, uint32_t sample_rate, uint32_t master_clock, uint32_t clock_div, uint32_t sample_limit, uint32_t options) |
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140 { |
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141 dfopen(debug_file, "ym_debug.txt", "w"); |
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142 memset(context, 0, sizeof(*context)); |
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143 context->audio_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
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144 context->back_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
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145 context->sample_rate = sample_rate; |
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146 context->clock_inc = clock_div * 6; |
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147 ym_adjust_master_clock(context, master_clock); |
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148 |
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149 context->sample_limit = sample_limit*2; |
| 374 | 150 context->write_cycle = CYCLE_NEVER; |
| 362 | 151 for (int i = 0; i < NUM_OPERATORS; i++) { |
| 152 context->operators[i].envelope = MAX_ENVELOPE; | |
| 153 context->operators[i].env_phase = PHASE_RELEASE; | |
| 154 } | |
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155 //some games seem to expect that the LR flags start out as 1 |
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156 for (int i = 0; i < NUM_CHANNELS; i++) { |
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157 context->channels[i].lr = 0xC0; |
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158 if (options & YM_OPT_WAVE_LOG) { |
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159 char fname[64]; |
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160 sprintf(fname, "ym_channel_%d.wav", i); |
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161 FILE * f = context->channels[i].logfile = fopen(fname, "wb"); |
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162 if (!f) { |
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163 fprintf(stderr, "Failed to open WAVE log file %s for writing\n", fname); |
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164 continue; |
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165 } |
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166 if (!wave_init(f, sample_rate, 16, 1)) { |
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167 fclose(f); |
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168 context->channels[i].logfile = NULL; |
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169 } |
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170 } |
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171 } |
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172 if (options & YM_OPT_WAVE_LOG) { |
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173 log_context = context; |
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174 atexit(ym_finalize_log); |
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175 } |
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176 if (!did_tbl_init) { |
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177 //populate sine table |
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178 for (int32_t i = 0; i < 512; i++) { |
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179 double sine = sin( ((double)(i*2+1) / SINE_TABLE_SIZE) * M_PI_2 ); |
|
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180 |
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181 //table stores 4.8 fixed pointed representation of the base 2 log |
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182 sine_table[i] = round_fixed_point(-log2(sine), 8); |
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183 } |
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184 //populate power table |
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185 for (int32_t i = 0; i < POW_TABLE_SIZE; i++) { |
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186 double linear = pow(2, -((double)((i & 0xFF)+1) / 256.0)); |
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187 int32_t tmp = round_fixed_point(linear, 11); |
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188 int32_t shift = (i >> 8) - 2; |
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189 if (shift < 0) { |
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190 tmp <<= 0-shift; |
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191 } else { |
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192 tmp >>= shift; |
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193 } |
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194 pow_table[i] = tmp; |
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195 } |
| 362 | 196 //populate envelope generator rate table, from small base table |
| 197 for (int rate = 0; rate < 64; rate++) { | |
|
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198 for (int cycle = 0; cycle < 8; cycle++) { |
| 362 | 199 uint16_t value; |
|
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200 if (rate < 2) { |
| 362 | 201 value = 0; |
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202 } else if (rate >= 60) { |
| 362 | 203 value = 8; |
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204 } else if (rate < 8) { |
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205 value = rate_table_base[((rate & 6) == 6 ? 16 : 0) + cycle]; |
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206 } else if (rate < 48) { |
| 362 | 207 value = rate_table_base[(rate & 0x3) * 8 + cycle]; |
| 208 } else { | |
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209 value = rate_table_base[32 + (rate & 0x3) * 8 + cycle] << ((rate - 48) >> 2); |
| 362 | 210 } |
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211 rate_table[rate * 8 + cycle] = value; |
| 362 | 212 } |
| 213 } | |
|
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214 //populate LFO PM table from small base table |
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215 //seems like there must be a better way to derive this |
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216 for (int freq = 0; freq < 128; freq++) { |
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217 for (int pms = 0; pms < 8; pms++) { |
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218 for (int step = 0; step < 32; step++) { |
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219 int16_t value = 0; |
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220 for (int bit = 0x40, shift = 0; bit > 0; bit >>= 1, shift++) { |
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221 if (freq & bit) { |
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222 value += lfo_pm_base[pms][(step & 0x8) ? 7-step & 7 : step & 7] >> shift; |
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223 } |
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224 } |
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225 if (step & 0x10) { |
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226 value = -value; |
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227 } |
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228 lfo_pm_table[freq * 256 + pms * 32 + step] = value; |
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229 } |
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230 } |
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231 } |
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232 } |
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233 } |
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234 |
| 377 | 235 #define YM_VOLUME_DIVIDER 2 |
|
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236 #define YM_MOD_SHIFT 1 |
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237 |
| 403 | 238 #define TIMER_A_MAX 1023 |
| 239 #define TIMER_B_MAX (255*16) | |
| 240 | |
|
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241 void ym_run(ym2612_context * context, uint32_t to_cycle) |
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242 { |
| 362 | 243 //printf("Running YM2612 from cycle %d to cycle %d\n", context->current_cycle, to_cycle); |
| 244 //TODO: Fix channel update order OR remap channels in register write | |
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245 for (; context->current_cycle < to_cycle; context->current_cycle += context->clock_inc) { |
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246 //Update timers at beginning of 144 cycle period |
| 403 | 247 if (!context->current_op) { |
| 248 if (context->timer_control & BIT_TIMERA_ENABLE) { | |
| 249 if (context->timer_a != TIMER_A_MAX) { | |
| 250 context->timer_a++; | |
| 251 } else { | |
| 252 if (context->timer_control & BIT_TIMERA_OVEREN) { | |
| 253 context->status |= BIT_STATUS_TIMERA; | |
| 254 } | |
| 255 context->timer_a = context->timer_a_load; | |
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256 } |
|
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257 } |
| 362 | 258 if (context->timer_control & BIT_TIMERB_ENABLE) { |
| 403 | 259 if (context->timer_b != TIMER_B_MAX) { |
| 260 context->timer_b++; | |
| 261 } else { | |
| 262 if (context->timer_control & BIT_TIMERB_OVEREN) { | |
| 263 context->status |= BIT_STATUS_TIMERB; | |
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264 } |
| 403 | 265 context->timer_b = context->timer_b_load; |
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266 } |
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267 } |
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268 } |
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269 //Update LFO |
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270 if (context->lfo_enable) { |
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271 if (context->lfo_counter) { |
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272 context->lfo_counter--; |
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273 } else { |
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274 context->lfo_counter = lfo_timer_values[context->lfo_freq]; |
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275 context->lfo_am_step += 2; |
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276 context->lfo_am_step &= 0xFE; |
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277 context->lfo_pm_step = context->lfo_am_step / 8; |
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278 } |
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279 } |
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359
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280 //Update Envelope Generator |
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281 if (!(context->current_op % 3)) { |
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282 uint32_t env_cyc = context->env_counter; |
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283 uint32_t op = context->current_env_op; |
| 362 | 284 ym_operator * operator = context->operators + op; |
| 285 ym_channel * channel = context->channels + op/4; | |
|
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286 uint8_t rate; |
| 362 | 287 for(;;) { |
| 288 rate = operator->rates[operator->env_phase]; | |
| 289 if (rate) { | |
| 290 uint8_t ks = channel->keycode >> operator->key_scaling;; | |
| 291 rate = rate*2 + ks; | |
| 292 if (rate > 63) { | |
| 293 rate = 63; | |
| 294 } | |
| 295 } | |
| 296 //Deal with "infinite" rates | |
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297 //According to Nemesis this should be handled in key-on instead |
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298 if (rate >= 62 && operator->env_phase == PHASE_ATTACK) { |
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299 operator->env_phase = PHASE_DECAY; |
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300 operator->envelope = 0; |
| 362 | 301 } else { |
| 302 break; | |
| 303 } | |
| 304 } | |
| 305 uint32_t cycle_shift = rate < 0x30 ? ((0x2F - rate) >> 2) : 0; | |
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306 if (first_key_on) { |
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307 dfprintf(debug_file, "Operator: %d, env rate: %d (2*%d+%d), env_cyc: %d, cycle_shift: %d, env_cyc & ((1 << cycle_shift) - 1): %d\n", op, rate, operator->rates[operator->env_phase], channel->keycode >> operator->key_scaling,env_cyc, cycle_shift, env_cyc & ((1 << cycle_shift) - 1)); |
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308 } |
| 362 | 309 if (!(env_cyc & ((1 << cycle_shift) - 1))) { |
| 310 uint32_t update_cycle = env_cyc >> cycle_shift & 0x7; | |
| 311 //envelope value is 10-bits, but it will be used as a 4.8 value | |
| 312 uint16_t envelope_inc = rate_table[rate * 8 + update_cycle] << 2; | |
| 313 if (operator->env_phase == PHASE_ATTACK) { | |
| 314 //this can probably be optimized to a single shift rather than a multiply + shift | |
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315 if (first_key_on) { |
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316 dfprintf(debug_file, "Changing op %d envelope %d by %d(%d * %d) in attack phase\n", op, operator->envelope, (~operator->envelope * envelope_inc) >> 4, ~operator->envelope, envelope_inc); |
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317 } |
| 362 | 318 operator->envelope += (~operator->envelope * envelope_inc) >> 4; |
| 319 operator->envelope &= MAX_ENVELOPE; | |
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320 if (!operator->envelope) { |
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321 operator->envelope = 0; |
| 362 | 322 operator->env_phase = PHASE_DECAY; |
| 323 } | |
| 324 } else { | |
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325 if (first_key_on) { |
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326 dfprintf(debug_file, "Changing op %d envelope %d by %d in %s phase\n", op, operator->envelope, envelope_inc, |
|
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327 operator->env_phase == PHASE_SUSTAIN ? "sustain" : (operator->env_phase == PHASE_DECAY ? "decay": "release")); |
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328 } |
| 362 | 329 operator->envelope += envelope_inc; |
| 330 //clamp to max attenuation value | |
| 331 if (operator->envelope > MAX_ENVELOPE) { | |
| 332 operator->envelope = MAX_ENVELOPE; | |
| 333 } | |
| 334 if (operator->env_phase == PHASE_DECAY && operator->envelope >= operator->sustain_level) { | |
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335 //operator->envelope = operator->sustain_level; |
| 362 | 336 operator->env_phase = PHASE_SUSTAIN; |
| 337 } | |
| 338 } | |
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339 } |
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340 context->current_env_op++; |
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341 if (context->current_env_op == NUM_OPERATORS) { |
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342 context->current_env_op = 0; |
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343 context->env_counter++; |
| 362 | 344 } |
| 345 } | |
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346 |
| 362 | 347 //Update Phase Generator |
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348 uint32_t channel = context->current_op / 4; |
| 362 | 349 if (channel != 5 || !context->dac_enable) { |
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350 uint32_t op = context->current_op; |
| 362 | 351 //printf("updating operator %d of channel %d\n", op, channel); |
| 352 ym_operator * operator = context->operators + op; | |
| 353 ym_channel * chan = context->channels + channel; | |
| 354 //TODO: Modulate phase by LFO if necessary | |
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355 uint16_t phase = operator->phase_counter >> 10 & 0x3FF; |
| 362 | 356 operator->phase_counter += operator->phase_inc; |
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357 if (chan->pms) { |
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358 //not entirely sure this will get the precision correct, but I'd like to avoid recalculating phase |
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359 //increment every update when LFO phase modulation is enabled |
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360 int16_t lfo_mod = lfo_pm_table[(chan->fnum & 0x7F0) * 16 + chan->pms + context->lfo_pm_step]; |
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361 if (operator->multiple) { |
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362 lfo_mod *= operator->multiple; |
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363 } else { |
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364 lfo_mod >>= 1; |
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365 } |
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366 operator->phase_counter += lfo_mod; |
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367 } |
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368 int16_t mod = 0; |
| 362 | 369 switch (op % 4) |
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370 { |
| 362 | 371 case 0://Operator 1 |
| 377 | 372 if (chan->feedback) { |
|
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373 mod = operator->output >> (9-chan->feedback); |
| 377 | 374 } |
|
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375 break; |
| 362 | 376 case 1://Operator 3 |
| 377 switch(chan->algorithm) | |
| 378 { | |
| 379 case 0: | |
| 380 case 2: | |
| 381 //modulate by operator 2 | |
|
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382 mod = context->operators[op+1].output >> YM_MOD_SHIFT; |
| 362 | 383 break; |
| 384 case 1: | |
| 385 //modulate by operator 1+2 | |
|
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386 mod = (context->operators[op-1].output + context->operators[op+1].output) >> YM_MOD_SHIFT; |
| 362 | 387 break; |
| 388 case 5: | |
| 389 //modulate by operator 1 | |
|
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390 mod = context->operators[op-1].output >> YM_MOD_SHIFT; |
| 362 | 391 } |
| 392 break; | |
| 393 case 2://Operator 2 | |
|
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394 if (chan->algorithm != 1 && chan->algorithm != 2 && chan->algorithm != 7) { |
| 362 | 395 //modulate by Operator 1 |
|
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396 mod = context->operators[op-2].output >> YM_MOD_SHIFT; |
| 362 | 397 } |
|
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398 break; |
| 362 | 399 case 3://Operator 4 |
| 400 switch(chan->algorithm) | |
| 401 { | |
| 402 case 0: | |
| 403 case 1: | |
| 404 case 4: | |
| 405 //modulate by operator 3 | |
|
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406 mod = context->operators[op-2].output >> YM_MOD_SHIFT; |
| 362 | 407 break; |
| 408 case 2: | |
| 409 //modulate by operator 1+3 | |
|
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410 mod = (context->operators[op-3].output + context->operators[op-2].output) >> YM_MOD_SHIFT; |
| 362 | 411 break; |
| 412 case 3: | |
| 413 //modulate by operator 2+3 | |
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414 mod = (context->operators[op-1].output + context->operators[op-2].output) >> YM_MOD_SHIFT; |
| 362 | 415 break; |
| 416 case 5: | |
| 417 //modulate by operator 1 | |
|
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418 mod = context->operators[op-3].output >> YM_MOD_SHIFT; |
| 362 | 419 break; |
| 420 } | |
|
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421 break; |
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422 } |
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423 uint16_t env = operator->envelope + operator->total_level; |
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424 if (env > MAX_ENVELOPE) { |
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425 env = MAX_ENVELOPE; |
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426 } |
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427 if (first_key_on) { |
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428 dfprintf(debug_file, "op %d, base phase: %d, mod: %d, sine: %d, out: %d\n", op, phase, mod, sine_table[(phase+mod) & 0x1FF], pow_table[sine_table[phase & 0x1FF] + env]); |
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429 } |
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430 phase += mod; |
|
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431 |
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432 int16_t output = pow_table[sine_table[phase & 0x1FF] + env]; |
|
359
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433 if (phase & 0x200) { |
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434 output = -output; |
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435 } |
| 362 | 436 operator->output = output; |
|
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437 //Update the channel output if we've updated all operators |
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438 if (op % 4 == 3) { |
| 362 | 439 if (chan->algorithm < 4) { |
| 440 chan->output = operator->output; | |
| 441 } else if(chan->algorithm == 4) { | |
|
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442 chan->output = operator->output + context->operators[channel * 4 + 2].output; |
|
359
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443 } else { |
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444 output = 0; |
| 362 | 445 for (uint32_t op = ((chan->algorithm == 7) ? 0 : 1) + channel*4; op < (channel+1)*4; op++) { |
| 446 output += context->operators[op].output; | |
|
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447 } |
| 362 | 448 chan->output = output; |
|
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449 } |
|
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Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
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450 if (first_key_on) { |
|
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451 int16_t value = context->channels[channel].output & 0x3FE0; |
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452 if (value & 0x2000) { |
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453 value |= 0xC000; |
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454 } |
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455 dfprintf(debug_file, "channel %d output: %d\n", channel, value / YM_VOLUME_DIVIDER); |
|
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456 } |
|
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457 } |
| 362 | 458 //puts("operator update done"); |
|
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459 } |
|
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460 context->current_op++; |
|
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461 context->buffer_fraction += context->buffer_inc; |
|
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462 if (context->current_op == NUM_OPERATORS) { |
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463 context->current_op = 0; |
|
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464 } |
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465 if (context->buffer_fraction > BUFFER_INC_RES) { |
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466 context->buffer_fraction -= BUFFER_INC_RES; |
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467 context->audio_buffer[context->buffer_pos] = 0; |
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468 context->audio_buffer[context->buffer_pos + 1] = 0; |
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469 for (int i = 0; i < NUM_CHANNELS; i++) { |
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470 int16_t value = context->channels[i].output & 0x3FE0; |
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471 if (value & 0x2000) { |
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472 value |= 0xC000; |
|
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473 } |
|
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474 if (context->channels[i].logfile) { |
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475 fwrite(&value, sizeof(value), 1, context->channels[i].logfile); |
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476 } |
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477 if (context->channels[i].lr & 0x80) { |
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478 context->audio_buffer[context->buffer_pos] += value / YM_VOLUME_DIVIDER; |
|
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479 } |
|
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480 if (context->channels[i].lr & 0x40) { |
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481 context->audio_buffer[context->buffer_pos+1] += value / YM_VOLUME_DIVIDER; |
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482 } |
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483 } |
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484 context->buffer_pos += 2; |
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485 if (context->buffer_pos == context->sample_limit) { |
|
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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486 if (!headless) { |
|
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487 render_wait_ym(context); |
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488 } |
|
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489 } |
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490 } |
|
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491 } |
|
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492 if (context->current_cycle >= context->write_cycle + (BUSY_CYCLES * context->clock_inc / 6)) { |
|
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493 context->status &= 0x7F; |
| 374 | 494 context->write_cycle = CYCLE_NEVER; |
|
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495 } |
| 362 | 496 //printf("Done running YM2612 at cycle %d\n", context->current_cycle, to_cycle); |
|
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497 } |
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498 |
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499 void ym_address_write_part1(ym2612_context * context, uint8_t address) |
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500 { |
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501 //printf("address_write_part1: %X\n", address); |
| 362 | 502 context->selected_reg = address; |
| 503 context->selected_part = 0; | |
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504 } |
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505 |
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506 void ym_address_write_part2(ym2612_context * context, uint8_t address) |
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507 { |
|
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508 //printf("address_write_part2: %X\n", address); |
| 362 | 509 context->selected_reg = address; |
| 510 context->selected_part = 1; | |
| 511 } | |
| 512 | |
| 513 uint8_t fnum_to_keycode[] = { | |
| 514 //F11 = 0 | |
| 515 0,0,0,0,0,0,0,1, | |
| 516 //F11 = 1 | |
| 517 2,3,3,3,3,3,3,3 | |
| 518 }; | |
| 519 | |
| 520 //table courtesy of Nemesis | |
| 521 uint32_t detune_table[][4] = { | |
| 522 {0, 0, 1, 2}, //0 (0x00) | |
| 523 {0, 0, 1, 2}, //1 (0x01) | |
| 524 {0, 0, 1, 2}, //2 (0x02) | |
| 525 {0, 0, 1, 2}, //3 (0x03) | |
| 526 {0, 1, 2, 2}, //4 (0x04) | |
| 527 {0, 1, 2, 3}, //5 (0x05) | |
| 528 {0, 1, 2, 3}, //6 (0x06) | |
| 529 {0, 1, 2, 3}, //7 (0x07) | |
| 530 {0, 1, 2, 4}, //8 (0x08) | |
| 531 {0, 1, 3, 4}, //9 (0x09) | |
| 532 {0, 1, 3, 4}, //10 (0x0A) | |
| 533 {0, 1, 3, 5}, //11 (0x0B) | |
| 534 {0, 2, 4, 5}, //12 (0x0C) | |
| 535 {0, 2, 4, 6}, //13 (0x0D) | |
| 536 {0, 2, 4, 6}, //14 (0x0E) | |
| 537 {0, 2, 5, 7}, //15 (0x0F) | |
| 538 {0, 2, 5, 8}, //16 (0x10) | |
| 539 {0, 3, 6, 8}, //17 (0x11) | |
| 540 {0, 3, 6, 9}, //18 (0x12) | |
| 541 {0, 3, 7,10}, //19 (0x13) | |
| 542 {0, 4, 8,11}, //20 (0x14) | |
| 543 {0, 4, 8,12}, //21 (0x15) | |
| 544 {0, 4, 9,13}, //22 (0x16) | |
| 545 {0, 5,10,14}, //23 (0x17) | |
| 546 {0, 5,11,16}, //24 (0x18) | |
| 547 {0, 6,12,17}, //25 (0x19) | |
| 548 {0, 6,13,19}, //26 (0x1A) | |
| 549 {0, 7,14,20}, //27 (0x1B) | |
| 550 {0, 8,16,22}, //28 (0x1C) | |
| 551 {0, 8,16,22}, //29 (0x1D) | |
| 552 {0, 8,16,22}, //30 (0x1E) | |
| 553 {0, 8,16,22} | |
| 554 }; //31 (0x1F) | |
| 555 | |
| 556 void ym_update_phase_inc(ym2612_context * context, ym_operator * operator, uint32_t op) | |
| 557 { | |
| 558 uint32_t chan_num = op / 4; | |
| 559 //printf("ym_update_phase_inc | channel: %d, op: %d\n", chan_num, op); | |
| 560 //base frequency | |
| 561 ym_channel * channel = context->channels + chan_num; | |
|
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562 uint32_t inc, detune; |
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563 if (chan_num == 2 && context->ch3_mode && (op < (2*4 + 3))) { |
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564 inc = context->ch3_supp[op-2*4].fnum; |
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565 if (!context->ch3_supp[op-2*4].block) { |
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566 inc >>= 1; |
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567 } else { |
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568 inc <<= (context->ch3_supp[op-2*4].block-1); |
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569 } |
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570 //detune |
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571 detune = detune_table[context->ch3_supp[op-2*4].keycode][operator->detune & 0x3]; |
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572 } else { |
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573 inc = channel->fnum; |
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574 if (!channel->block) { |
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575 inc >>= 1; |
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576 } else { |
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577 inc <<= (channel->block-1); |
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578 } |
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579 //detune |
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580 detune = detune_table[channel->keycode][operator->detune & 0x3]; |
|
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581 } |
| 362 | 582 if (operator->detune & 0x40) { |
| 583 inc -= detune; | |
| 584 //this can underflow, mask to 17-bit result | |
| 585 inc &= 0x1FFFF; | |
| 586 } else { | |
| 587 inc += detune; | |
| 588 } | |
| 589 //multiple | |
| 590 if (operator->multiple) { | |
| 591 inc *= operator->multiple; | |
| 592 } else { | |
| 593 //0.5 | |
| 594 inc >>= 1; | |
|
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595 } |
|
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596 //printf("phase_inc for operator %d: %d, block: %d, fnum: %d, detune: %d, multiple: %d\n", op, inc, channel->block, channel->fnum, detune, operator->multiple); |
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597 operator->phase_inc = inc; |
|
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598 } |
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599 |
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600 void ym_data_write(ym2612_context * context, uint8_t value) |
|
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601 { |
|
451
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602 if (context->selected_reg >= YM_REG_END) { |
| 362 | 603 return; |
|
288
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604 } |
|
451
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605 if (context->selected_part) { |
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606 if (context->selected_reg < YM_PART2_START) { |
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607 return; |
|
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608 } |
|
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609 context->part2_regs[context->selected_reg - YM_PART2_START] = value; |
|
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610 } else { |
|
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611 if (context->selected_reg < YM_PART1_START) { |
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612 return; |
|
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613 } |
|
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614 context->part1_regs[context->selected_reg - YM_PART1_START] = value; |
|
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615 } |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
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616 dfprintf(debug_file, "write of %X to reg %X in part %d\n", value, context->selected_reg, context->selected_part+1); |
| 362 | 617 if (context->selected_reg < 0x30) { |
| 618 //Shared regs | |
| 619 switch (context->selected_reg) | |
| 620 { | |
|
411
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621 //TODO: Test reg |
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622 case REG_LFO: |
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623 if ((value & 0x8) && !context->lfo_enable) { |
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624 printf("LFO Enabled, Freq: %d\n", value & 0x7); |
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625 } |
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626 context->lfo_enable = value & 0x8; |
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627 if (!context->lfo_enable) { |
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628 context->lfo_am_step = context->lfo_pm_step = 0; |
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629 } |
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630 context->lfo_freq = value & 0x7; |
|
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631 |
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632 break; |
| 362 | 633 case REG_TIMERA_HIGH: |
| 634 context->timer_a_load &= 0x3; | |
| 635 context->timer_a_load |= value << 2; | |
| 636 break; | |
| 637 case REG_TIMERA_LOW: | |
| 638 context->timer_a_load &= 0xFFFC; | |
| 639 context->timer_a_load |= value & 0x3; | |
| 640 break; | |
| 641 case REG_TIMERB: | |
| 403 | 642 context->timer_b_load = value * 16; |
| 362 | 643 break; |
|
383
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644 case REG_TIME_CTRL: { |
| 403 | 645 if (value & BIT_TIMERA_ENABLE && !(context->timer_control & BIT_TIMERA_ENABLE)) { |
| 646 context->timer_a = context->timer_a_load; | |
| 647 } | |
| 648 if (value & BIT_TIMERB_ENABLE && !(context->timer_control & BIT_TIMERB_ENABLE)) { | |
| 649 context->timer_b = context->timer_b_load; | |
| 650 } | |
| 651 context->timer_control = value & 0xF; | |
| 652 if (value & BIT_TIMERA_RESET) { | |
| 653 context->status &= ~BIT_STATUS_TIMERA; | |
| 654 } | |
| 655 if (value & BIT_TIMERB_RESET) { | |
| 656 context->status &= ~BIT_STATUS_TIMERB; | |
| 657 } | |
|
383
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658 uint8_t old_mode = context->ch3_mode; |
|
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659 context->ch3_mode = value & 0xC0; |
|
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660 if (context->ch3_mode != old_mode) { |
|
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661 ym_update_phase_inc(context, context->operators + 2*4, 2*4); |
|
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662 ym_update_phase_inc(context, context->operators + 2*4+1, 2*4+1); |
|
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663 ym_update_phase_inc(context, context->operators + 2*4+2, 2*4+2); |
|
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664 } |
| 362 | 665 break; |
|
383
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666 } |
| 362 | 667 case REG_KEY_ONOFF: { |
| 668 uint8_t channel = value & 0x7; | |
|
386
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Fix channel mapping in key on/off register
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|
669 if (channel != 3 && channel != 7) { |
|
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670 if (channel > 2) { |
|
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|
671 channel--; |
|
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672 } |
| 362 | 673 for (uint8_t op = channel * 4, bit = 0x10; op < (channel + 1) * 4; op++, bit <<= 1) { |
| 674 if (value & bit) { | |
|
448
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675 if (context->operators[op].env_phase == PHASE_RELEASE) |
|
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|
676 { |
|
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Fix handling of key on in YM2612 core
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|
677 first_key_on = 1; |
|
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678 //printf("Key On for operator %d in channel %d\n", op, channel); |
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679 context->operators[op].phase_counter = 0; |
|
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680 context->operators[op].env_phase = PHASE_ATTACK; |
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681 } |
| 362 | 682 } else { |
| 683 //printf("Key Off for operator %d in channel %d\n", op, channel); | |
| 684 context->operators[op].env_phase = PHASE_RELEASE; | |
| 685 } | |
| 686 } | |
| 687 } | |
| 688 break; | |
| 689 } | |
| 690 case REG_DAC: | |
| 691 if (context->dac_enable) { | |
| 692 context->channels[5].output = (((int16_t)value) - 0x80) << 6; | |
|
396
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
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386
diff
changeset
|
693 //printf("DAC Write %X(%d) @ %d\n", value, context->channels[5].output, context->current_cycle); |
| 362 | 694 } |
| 695 break; | |
| 696 case REG_DAC_ENABLE: | |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
697 //printf("DAC Enable: %X\n", value); |
| 362 | 698 context->dac_enable = value & 0x80; |
| 699 break; | |
| 700 } | |
| 701 } else if (context->selected_reg < 0xA0) { | |
| 702 //part | |
| 703 uint8_t op = context->selected_part ? (NUM_OPERATORS/2) : 0; | |
| 704 //channel in part | |
| 705 if ((context->selected_reg & 0x3) != 0x3) { | |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
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parents:
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diff
changeset
|
706 op += 4 * (context->selected_reg & 0x3) + ((context->selected_reg & 0xC) / 4); |
| 362 | 707 //printf("write targets operator %d (%d of channel %d)\n", op, op % 4, op / 4); |
| 708 ym_operator * operator = context->operators + op; | |
| 709 switch (context->selected_reg & 0xF0) | |
| 710 { | |
| 711 case REG_DETUNE_MULT: | |
| 712 operator->detune = value >> 4 & 0x7; | |
| 713 operator->multiple = value & 0xF; | |
| 714 ym_update_phase_inc(context, operator, op); | |
| 715 break; | |
| 716 case REG_TOTAL_LEVEL: | |
| 717 operator->total_level = (value & 0x7F) << 5; | |
| 718 break; | |
| 719 case REG_ATTACK_KS: | |
| 376 | 720 operator->key_scaling = 3 - (value >> 6); |
| 362 | 721 operator->rates[PHASE_ATTACK] = value & 0x1F; |
| 722 break; | |
| 723 case REG_DECAY_AM: | |
| 724 //TODO: AM flag for LFO | |
| 725 operator->rates[PHASE_DECAY] = value & 0x1F; | |
| 726 break; | |
| 727 case REG_SUSTAIN_RATE: | |
| 728 operator->rates[PHASE_SUSTAIN] = value & 0x1F; | |
| 729 break; | |
| 730 case REG_S_LVL_R_RATE: | |
| 731 operator->rates[PHASE_RELEASE] = (value & 0xF) << 1 | 1; | |
|
382
b904859964e5
Fix operator precedence bug with sustain level
Mike Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
732 operator->sustain_level = (value & 0xF0) << 4; |
| 362 | 733 break; |
| 734 } | |
| 735 } | |
| 736 } else { | |
| 737 uint8_t channel = context->selected_reg & 0x3; | |
| 738 if (channel != 3) { | |
| 739 if (context->selected_part) { | |
| 740 channel += 3; | |
| 741 } | |
| 742 //printf("write targets channel %d\n", channel); | |
| 743 switch (context->selected_reg & 0xFC) | |
| 744 { | |
| 745 case REG_FNUM_LOW: | |
| 746 context->channels[channel].block = context->channels[channel].block_fnum_latch >> 3 & 0x7; | |
| 747 context->channels[channel].fnum = (context->channels[channel].block_fnum_latch & 0x7) << 8 | value; | |
| 748 context->channels[channel].keycode = context->channels[channel].block << 2 | fnum_to_keycode[context->channels[channel].fnum >> 7]; | |
| 749 ym_update_phase_inc(context, context->operators + channel*4, channel*4); | |
| 750 ym_update_phase_inc(context, context->operators + channel*4+1, channel*4+1); | |
| 751 ym_update_phase_inc(context, context->operators + channel*4+2, channel*4+2); | |
| 752 ym_update_phase_inc(context, context->operators + channel*4+3, channel*4+3); | |
| 753 break; | |
| 754 case REG_BLOCK_FNUM_H:{ | |
| 755 context->channels[channel].block_fnum_latch = value; | |
| 756 break; | |
| 757 } | |
|
383
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diff
changeset
|
758 case REG_FNUM_LOW_CH3: |
|
72933100c55c
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diff
changeset
|
759 if (channel < 3) { |
|
72933100c55c
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diff
changeset
|
760 context->ch3_supp[channel].block = context->ch3_supp[channel].block_fnum_latch >> 3 & 0x7; |
|
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changeset
|
761 context->ch3_supp[channel].fnum = (context->ch3_supp[channel].block_fnum_latch & 0x7) << 8 | value; |
|
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Initial implementation of channel 3 special mode
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changeset
|
762 context->ch3_supp[channel].keycode = context->ch3_supp[channel].block << 2 | fnum_to_keycode[context->ch3_supp[channel].fnum >> 7]; |
|
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Initial implementation of channel 3 special mode
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diff
changeset
|
763 if (context->ch3_mode) { |
|
72933100c55c
Initial implementation of channel 3 special mode
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diff
changeset
|
764 ym_update_phase_inc(context, context->operators + 2*4 + channel, 2*4); |
|
72933100c55c
Initial implementation of channel 3 special mode
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diff
changeset
|
765 } |
|
72933100c55c
Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
766 } |
|
72933100c55c
Initial implementation of channel 3 special mode
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382
diff
changeset
|
767 break; |
|
72933100c55c
Initial implementation of channel 3 special mode
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diff
changeset
|
768 case REG_BLOCK_FN_CH3: |
|
72933100c55c
Initial implementation of channel 3 special mode
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diff
changeset
|
769 if (channel < 3) { |
|
72933100c55c
Initial implementation of channel 3 special mode
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382
diff
changeset
|
770 context->ch3_supp[channel].block_fnum_latch = value; |
|
72933100c55c
Initial implementation of channel 3 special mode
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382
diff
changeset
|
771 } |
|
72933100c55c
Initial implementation of channel 3 special mode
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changeset
|
772 break; |
| 362 | 773 case REG_ALG_FEEDBACK: |
| 774 context->channels[channel].algorithm = value & 0x7; | |
| 775 context->channels[channel].feedback = value >> 3 & 0x7; | |
| 776 break; | |
| 777 case REG_LR_AMS_PMS: | |
|
411
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Initial stab at LFO phase modulation
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diff
changeset
|
778 context->channels[channel].pms = (value & 0x7) * 32; |
| 362 | 779 context->channels[channel].ams = value >> 4 & 0x3; |
| 780 context->channels[channel].lr = value & 0xC0; | |
|
369
fc820ab1394b
Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents:
365
diff
changeset
|
781 //printf("Write of %X to LR_AMS_PMS reg for channel %d\n", value, channel); |
| 362 | 782 break; |
| 783 } | |
| 784 } | |
| 785 } | |
|
448
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
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424
diff
changeset
|
786 |
| 362 | 787 context->write_cycle = context->current_cycle; |
| 374 | 788 context->status |= 0x80; |
|
288
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Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
789 } |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
790 |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
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parents:
diff
changeset
|
791 uint8_t ym_read_status(ym2612_context * context) |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
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parents:
diff
changeset
|
792 { |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
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parents:
diff
changeset
|
793 return context->status; |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
794 } |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
795 |