Mercurial > repos > blastem
annotate runtime.S @ 347:b24556b45d1e
Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions
| author | Mike Pavone <pavone@retrodev.com> |
|---|---|
| date | Tue, 21 May 2013 00:56:56 -0700 |
| parents | b46771135442 |
| children | 3923dbc2dcc4 |
| rev | line source |
|---|---|
|
17
de0085d4ea40
Add asssembly runtime code stub
Mike Pavone <pavone@retrodev.com>
parents:
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1 |
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18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
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17
diff
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2 .global handle_cycle_limit |
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150
3e68e517cc01
Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
Mike Pavone <pavone@retrodev.com>
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3 .global do_sync |
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18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
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17
diff
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4 handle_cycle_limit: |
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82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
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5 cmp 84(%rsi), %eax |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
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6 jb skip_sync |
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150
3e68e517cc01
Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
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7 do_sync: |
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343
467bfa17004a
Mostly working runtime generation of memory map read/write functions
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8 push %rcx |
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467bfa17004a
Mostly working runtime generation of memory map read/write functions
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9 push %rdi |
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54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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10 call m68k_save_context |
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3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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11 mov %rsi, %rdi |
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198
209a37eed3e7
Add support for breaking into the debugger while game is running
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12 xor %esi, %esi |
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54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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diff
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13 call sync_components |
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3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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diff
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14 mov %rax, %rsi |
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3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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diff
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15 call m68k_load_context |
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343
467bfa17004a
Mostly working runtime generation of memory map read/write functions
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parents:
321
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16 pop %rdi |
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467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
321
diff
changeset
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17 pop %rcx |
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82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
18 skip_sync: |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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19 ret |
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87
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
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86
diff
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20 |
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321
146c87616b05
Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
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320
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21 sr_msg_int: |
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146c87616b05
Don't update interrupt mask on non-interrupt exceptions
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22 .asciz "SR set to $%X due to interrupt\n" |
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146c87616b05
Don't update interrupt mask on non-interrupt exceptions
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23 debug_print_sr_int: |
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24 call m68k_save_context |
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Don't update interrupt mask on non-interrupt exceptions
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25 push %rsi |
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26 lea sr_msg_int(%rip), %rdi |
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27 movzxb 5(%rsi), %rsi |
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146c87616b05
Don't update interrupt mask on non-interrupt exceptions
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parents:
320
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28 xor %rax, %rax |
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146c87616b05
Don't update interrupt mask on non-interrupt exceptions
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29 call printf |
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Don't update interrupt mask on non-interrupt exceptions
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30 pop %rsi |
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Don't update interrupt mask on non-interrupt exceptions
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31 call m68k_load_context |
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Don't update interrupt mask on non-interrupt exceptions
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32 ret |
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146c87616b05
Don't update interrupt mask on non-interrupt exceptions
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parents:
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33 |
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Don't update interrupt mask on non-interrupt exceptions
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34 sr_msg: |
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Don't update interrupt mask on non-interrupt exceptions
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35 .asciz "SR set to $%X\n" |
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146c87616b05
Don't update interrupt mask on non-interrupt exceptions
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parents:
320
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36 .global debug_print_sr |
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Don't update interrupt mask on non-interrupt exceptions
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37 debug_print_sr: |
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146c87616b05
Don't update interrupt mask on non-interrupt exceptions
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38 call m68k_save_context |
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146c87616b05
Don't update interrupt mask on non-interrupt exceptions
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39 push %rsi |
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Don't update interrupt mask on non-interrupt exceptions
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40 lea sr_msg(%rip), %rdi |
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146c87616b05
Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents:
320
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41 movzxb 5(%rsi), %rsi |
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146c87616b05
Don't update interrupt mask on non-interrupt exceptions
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parents:
320
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42 xor %rax, %rax |
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146c87616b05
Don't update interrupt mask on non-interrupt exceptions
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parents:
320
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43 call printf |
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146c87616b05
Don't update interrupt mask on non-interrupt exceptions
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44 pop %rsi |
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Don't update interrupt mask on non-interrupt exceptions
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45 call m68k_load_context |
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Don't update interrupt mask on non-interrupt exceptions
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46 ret |
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146c87616b05
Don't update interrupt mask on non-interrupt exceptions
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47 |
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152
79958b95526f
Implement TRAP (untested)
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48 .global m68k_trap |
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49 m68k_trap: |
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50 push %rdi |
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51 push %rcx |
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52 /* swap USP and SSP if not already in supervisor mode */ |
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53 bt $5, 5(%rsi) |
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54 jc already_supervisor_trap |
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55 mov 72(%rsi), %edi |
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56 mov %r15d, 72(%rsi) |
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57 mov %edi, %r15d |
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58 already_supervisor_trap: |
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175
7504200cac86
Fix order of SR and PC saved in an exception stack frame
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59 /* save PC */ |
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7504200cac86
Fix order of SR and PC saved in an exception stack frame
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60 sub $4, %r15d |
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7504200cac86
Fix order of SR and PC saved in an exception stack frame
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61 mov %r15d, %edi |
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7504200cac86
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parents:
160
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62 pop %rcx |
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7504200cac86
Fix order of SR and PC saved in an exception stack frame
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63 call m68k_write_long_lowfirst |
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152
79958b95526f
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64 /* save status register on stack */ |
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65 sub $2, %r15d |
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66 mov %r15d, %edi |
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67 call get_sr |
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68 call m68k_write_word |
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321
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Don't update interrupt mask on non-interrupt exceptions
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69 /* set supervisor bit */ |
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146c87616b05
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70 or $0x20, 5(%rsi) |
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152
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71 /* calculate interrupt vector address */ |
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72 pop %rcx |
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73 shl $2, %ecx |
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74 call m68k_read_long_scratch1 |
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75 call m68k_native_addr_and_sync |
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226
28a6697e847b
Implement CHK instruction (not fully tested).
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76 add $18, %eax |
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77 jmp *%rcx |
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176
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Print a message when we try to run an invalid instruction, not when we try to translate it
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78 |
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79 invalid_msg: |
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80 .asciz "Invalid instruction at %X\n" |
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81 |
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82 .global m68k_invalid |
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83 m68k_invalid: |
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84 lea invalid_msg(%rip), %rdi |
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85 mov %ecx, %esi |
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86 xor %rax, %rax |
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87 call printf |
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88 mov $1, %rdi |
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89 call exit |
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194
811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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90 |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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91 .global bcd_add |
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Implement ABCD an SBCD. Fix BTEST with register source.
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92 bcd_add: |
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93 xchg %rax, %rdi |
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Implement ABCD an SBCD. Fix BTEST with register source.
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94 |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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95 mov %cl, %ch |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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96 mov %al, %ah |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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97 and $0xF, %ch |
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811163790e6c
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98 and $0xF, %ah |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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99 and $0xF0, %cl |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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parents:
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100 and $0xF0, %al |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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101 add %ah, %ch |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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102 cmp $10, %ch |
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Implement ABCD an SBCD. Fix BTEST with register source.
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103 jb no_adjust |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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104 add $6, %ch |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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parents:
193
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105 no_adjust: |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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106 add %ch, %al |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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parents:
193
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107 add %al, %cl |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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108 mov $0, %ch |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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109 jc def_adjust |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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110 cmp $0xA0, %cl |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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parents:
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111 jb no_adjust_h |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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parents:
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112 def_adjust: |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
Mike Pavone <pavone@retrodev.com>
parents:
193
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113 add $0x60, %cl |
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811163790e6c
Implement ABCD an SBCD. Fix BTEST with register source.
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|
114 mov $1, %ch |
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115 no_adjust_h: |
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116 |
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|
117 mov %rdi, %rax |
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118 ret |
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|
119 |
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|
120 .global bcd_sub |
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|
121 bcd_sub: |
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|
122 xchg %rax, %rdi |
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123 |
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|
124 mov %cl, %ch |
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811163790e6c
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|
125 mov %al, %ah |
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811163790e6c
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126 and $0xF, %ch |
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|
127 and $0xF, %ah |
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811163790e6c
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|
128 and $0xF0, %cl |
|
811163790e6c
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|
129 and $0xF0, %al |
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|
130 sub %ah, %ch |
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|
131 cmp $10, %ch |
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|
132 jb no_adjusts |
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|
133 sub $6, %ch |
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134 no_adjusts: |
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|
135 add %ch, %cl |
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136 sub %al, %cl |
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|
137 mov $0, %ch |
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|
138 jc def_adjusts |
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139 cmp $0xA0, %cl |
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140 jb no_adjust_hs |
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141 def_adjusts: |
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|
142 sub $0x60, %cl |
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|
143 mov $1, %ch |
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144 no_adjust_hs: |
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|
145 |
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146 mov %rdi, %rax |
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147 ret |
|
150
3e68e517cc01
Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
Mike Pavone <pavone@retrodev.com>
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diff
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|
148 |
|
87
60b5c9e2f4e0
vertical interrupts now work
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|
149 int_dbg_msg: |
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60b5c9e2f4e0
vertical interrupts now work
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150 .asciz "Executing Interrupt!" |
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vertical interrupts now work
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151 print_int_dbg: |
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vertical interrupts now work
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152 call m68k_save_context |
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vertical interrupts now work
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|
153 push %rsi |
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vertical interrupts now work
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|
154 lea int_dbg_msg(%rip), %rdi |
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60b5c9e2f4e0
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|
155 call puts |
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60b5c9e2f4e0
vertical interrupts now work
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|
156 pop %rsi |
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60b5c9e2f4e0
vertical interrupts now work
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|
157 call m68k_load_context |
|
60b5c9e2f4e0
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|
158 ret |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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159 |
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6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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160 .global get_sr |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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161 get_sr: |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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162 mov 5(%rsi), %cl |
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6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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163 shl $8, %cx |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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164 mov (%rsi), %cl |
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6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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165 shl $1, %cl |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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166 or %bl, %cl |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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167 shl $1, %cl |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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168 or %dl, %cl |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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169 shl $1, %cl |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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170 or %bh, %cl |
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6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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171 shl $1, %cl |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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|
172 or %dh, %cl |
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6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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|
173 ret |
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6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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|
174 |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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|
175 .global set_sr |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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|
176 set_sr: |
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6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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|
177 mov %cl, %dh |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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|
178 and $1, %dh |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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changeset
|
179 shr $1, %cl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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parents:
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changeset
|
180 mov %cl, %bh |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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changeset
|
181 and $1, %bh |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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changeset
|
182 shr $1, %cl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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|
183 mov %cl, %dl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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|
184 and $1, %dl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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changeset
|
185 shr $1, %cl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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changeset
|
186 mov %cl, %bl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
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changeset
|
187 and $1, %bl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
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changeset
|
188 shr $1, %cl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
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changeset
|
189 and $1, %cl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
190 mov %cl, (%rsi) |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
191 shr $8, %cx |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
192 mov %cl, 5(%rsi) |
|
321
146c87616b05
Don't update interrupt mask on non-interrupt exceptions
Mike Pavone <pavone@retrodev.com>
parents:
320
diff
changeset
|
193 /* call debug_print_sr */ |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
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changeset
|
194 ret |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
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changeset
|
195 |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
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changeset
|
196 .global set_ccr |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
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|
197 set_ccr: |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
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changeset
|
198 mov %cl, %dh |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
199 and $1, %dh |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
200 shr $1, %cl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
201 mov %cl, %bh |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
202 and $1, %bh |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
203 shr $1, %cl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
204 mov %cl, %dl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
205 and $1, %dl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
206 shr $1, %cl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
207 mov %cl, %bl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
208 and $1, %bl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
209 shr $1, %cl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
210 and $1, %cl |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
211 mov %cl, (%rsi) |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
212 ret |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
213 |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
214 do_vdp_port_write: |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
215 call m68k_save_context |
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216 mov %rcx, %rdx |
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217 call vdp_port_write |
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218 mov %rax, %rsi |
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219 call m68k_load_context |
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220 ret |
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221 |
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222 do_vdp_port_read: |
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223 mov %ecx, %edi |
|
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224 call m68k_save_context |
|
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225 push %rsi |
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226 call vdp_port_read |
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227 pop %rsi |
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228 mov %ax, %cx |
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229 call m68k_load_context |
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230 ret |
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231 |
| 66 | 232 do_io_write: |
| 233 call m68k_save_context | |
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234 and $0x1FFFF, %edi |
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235 mov %ecx, %edx |
| 66 | 236 call io_write |
| 237 mov %rax, %rsi | |
| 238 call m68k_load_context | |
| 239 ret | |
| 240 do_io_read: | |
| 241 mov %ecx, %edi | |
|
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242 and $0x1FFFF, %edi |
| 66 | 243 call m68k_save_context |
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244 push %rsi |
| 66 | 245 call io_read |
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246 pop %rsi |
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247 mov %al, %cl |
| 66 | 248 call m68k_load_context |
| 249 ret | |
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250 |
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251 do_io_write_w: |
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252 call m68k_save_context |
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253 and $0x1FFFF, %edi |
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254 mov %ecx, %edx |
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255 call io_write_w |
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256 mov %rax, %rsi |
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257 call m68k_load_context |
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258 ret |
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259 do_io_read_w: |
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260 mov %ecx, %edi |
|
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261 and $0x1FFFF, %edi |
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262 call m68k_save_context |
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263 push %rsi |
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264 call io_read_w |
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265 pop %rsi |
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266 mov %ax, %cx |
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267 call m68k_load_context |
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268 ret |
| 66 | 269 |
|
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270 bad_access_msg: |
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271 .asciz "Program tried to access illegal 68K address %X\n" |
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272 |
|
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273 .global m68k_write_word |
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274 .global try_fifo_write |
|
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275 m68k_write_word: |
|
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276 call inccycles |
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277 and $0xFFFFFF, %rdi |
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278 cmp $0x400000, %edi |
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279 jbe cart_w |
|
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280 cmp $0xE00000, %edi |
|
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281 jae workram_w |
|
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282 cmp $0xC00000, %edi |
|
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283 jae vdp_psg_w |
|
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284 cmp $0xA00000, %edi |
|
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285 jb not_io_w |
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286 cmp $0xA12000, %edi |
|
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287 jae not_io_w |
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288 jmp do_io_write_w |
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289 not_io_w: |
|
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290 ret |
|
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291 workram_w: |
|
193
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292 and $0xFFFF, %edi |
|
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293 mov %cx, (%r9, %rdi) |
|
193
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294 mov %edi, %ecx |
|
320
67b6d351df0e
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295 shr $11, %ecx |
|
193
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296 bt %ecx, 160(%rsi) |
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297 jnc not_code |
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298 call m68k_save_context |
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299 call m68k_handle_code_write |
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300 mov %rax, %rsi |
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301 call m68k_load_context |
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302 not_code: |
|
64
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|
303 ret |
|
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304 cart_w: |
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305 mov %cx, (%r8, %rdi) |
|
64
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|
306 ret |
|
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307 vdp_psg_w: |
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|
308 test $0x2700E0, %edi |
|
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309 jnz crash |
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310 and $0x1F, %edi |
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311 cmp $4, %edi |
|
104
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312 jb try_fifo_write |
|
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|
313 jmp do_vdp_port_write |
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|
314 try_fifo_write: |
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|
315 push %rdx |
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|
316 push %rbx |
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|
317 /* fetch VDP context pointer from 68K context */ |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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|
318 mov 128(%rsi), %rdx |
|
149
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
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|
319 /* check DMA flag */ |
|
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|
320 bt $6, 19(%rdx) |
|
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|
321 jc fifo_fallback |
|
54
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|
322 /* get fifo_cur and compare it to fifo_end */ |
|
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|
323 mov (%rdx), %rbx |
|
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|
324 cmp %rbx, 8(%rdx) |
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|
325 /* bail out if fifo is full */ |
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|
326 je fifo_fallback |
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|
327 /* populate FIFO entry */ |
| 138 | 328 mov %cx, 6(%rbx) /* value */ |
| 329 mov 16(%rdx), %cx | |
| 330 mov %cx, 4(%rbx) /* address */ | |
| 331 mov 18(%rdx), %cl | |
| 332 mov %cl, 8(%rbx) /* cd */ | |
| 333 movb $0, 9(%rbx) /* partial */ | |
|
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changeset
|
334 mov %eax, %ecx |
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|
335 shl $3, %ecx /* multiply by 68K cycle by 7 to get MCLK cycle */ |
|
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|
336 sub %eax, %ecx |
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|
337 mov %ecx, (%rbx) /* cycle */ |
|
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changeset
|
338 /* update fifo_cur and store back in 68K context */ |
| 138 | 339 add $12, %rbx |
|
54
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|
340 mov %rbx, (%rdx) |
| 138 | 341 /* update address register */ |
| 342 movzbw 35(%rdx), %bx | |
| 343 add %bx, 16(%rdx) | |
|
54
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changeset
|
344 /* clear pending flag */ |
|
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|
345 andb $0xEF, 19(%rdx) |
|
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diff
changeset
|
346 pop %rbx |
|
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diff
changeset
|
347 pop %rdx |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
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59
diff
changeset
|
348 ret |
|
54
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diff
changeset
|
349 fifo_fallback: |
|
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diff
changeset
|
350 pop %rbx |
|
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diff
changeset
|
351 pop %rdx |
|
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diff
changeset
|
352 jmp do_vdp_port_write |
|
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diff
changeset
|
353 crash: |
|
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diff
changeset
|
354 mov %edi, %esi |
|
3b79cbcf6846
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diff
changeset
|
355 lea bad_access_msg(%rip), %rdi |
|
160
69ac23d42897
Fix crash in printf from "crash" function due to lack of clearing rax
Mike Pavone <pavone@retrodev.com>
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153
diff
changeset
|
356 xor %rax, %rax |
|
54
3b79cbcf6846
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diff
changeset
|
357 call printf |
|
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diff
changeset
|
358 mov $1, %rdi |
|
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diff
changeset
|
359 call exit |
|
18
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diff
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|
360 |
|
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changeset
|
361 .global m68k_write_byte |
|
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|
362 m68k_write_byte: |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
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diff
changeset
|
363 call inccycles |
|
18
3e7bfde7606e
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changeset
|
364 and $0xFFFFFF, %rdi |
|
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diff
changeset
|
365 cmp $0x400000, %edi |
|
104
a0fdaa134964
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diff
changeset
|
366 jbe cart_wb |
|
18
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|
367 cmp $0xE00000, %edi |
|
104
a0fdaa134964
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diff
changeset
|
368 jae workram_wb |
| 66 | 369 cmp $0xC00000, %edi |
|
104
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diff
changeset
|
370 jae vdp_psg_wb |
|
153
42c031184e8a
Implement access to Z80 RAM
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diff
changeset
|
371 cmp $0xA00000, %edi |
|
104
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diff
changeset
|
372 jb not_io_wb |
|
85
1db2a0b655d1
Fix Z80 BUSREQ/RESET implementation.
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diff
changeset
|
373 cmp $0xA12000, %edi |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
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diff
changeset
|
374 jae not_io_wb |
| 66 | 375 jmp do_io_write |
| 376 not_io_wb: | |
|
64
2b1a65f4b85d
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59
diff
changeset
|
377 ret |
|
18
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diff
changeset
|
378 workram_wb: |
|
83
2c7267617d71
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diff
changeset
|
379 /* deal with byte swapping */ |
|
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Implement Z80 reset and bus request registers.
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82
diff
changeset
|
380 xor $1, %edi |
|
18
3e7bfde7606e
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diff
changeset
|
381 and $0xFFFF, %rdi |
|
3e7bfde7606e
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diff
changeset
|
382 mov %cl, (%r9, %rdi) |
|
193
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
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176
diff
changeset
|
383 mov %edi, %ecx |
|
320
67b6d351df0e
Fix check for code writes
Mike Pavone <pavone@retrodev.com>
parents:
317
diff
changeset
|
384 shr $11, %ecx |
|
193
c66e4636f991
Implement support for self-modifying code
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176
diff
changeset
|
385 bt %ecx, 160(%rsi) |
|
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Implement support for self-modifying code
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176
diff
changeset
|
386 jnc not_code_b |
|
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Implement support for self-modifying code
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176
diff
changeset
|
387 xor $1, %edi |
|
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Implement support for self-modifying code
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176
diff
changeset
|
388 call m68k_save_context |
|
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Implement support for self-modifying code
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176
diff
changeset
|
389 call m68k_handle_code_write |
|
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Implement support for self-modifying code
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176
diff
changeset
|
390 mov %rax, %rsi |
|
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Implement support for self-modifying code
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parents:
176
diff
changeset
|
391 call m68k_load_context |
|
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176
diff
changeset
|
392 not_code_b: |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
393 ret |
|
18
3e7bfde7606e
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17
diff
changeset
|
394 cart_wb: |
|
83
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
395 /* deal with byte swapping */ |
|
2c7267617d71
Implement Z80 reset and bus request registers.
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parents:
82
diff
changeset
|
396 xor $1, %edi |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
397 mov %cl, (%r8, %rdi) |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
398 ret |
| 66 | 399 vdp_psg_wb: |
| 400 push %rdx | |
| 401 mov %cl, %dl | |
| 402 and $0xFF, %cx | |
| 403 shl $8, %dx | |
| 404 or %dx, %cx | |
| 405 pop %rdx | |
| 406 jmp vdp_psg_w | |
|
18
3e7bfde7606e
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Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
407 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
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17
diff
changeset
|
408 .global m68k_write_long_lowfirst |
|
3e7bfde7606e
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parents:
17
diff
changeset
|
409 m68k_write_long_lowfirst: |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
410 push %rdi |
|
86
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
411 push %rcx |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
412 add $2, %edi |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
413 call m68k_write_word |
|
86
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
414 pop %rcx |
|
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
415 pop %rdi |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
416 shr $16, %ecx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
417 jmp m68k_write_word |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
418 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
419 .global m68k_write_long_highfirst |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
420 m68k_write_long_highfirst: |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
421 push %rdi |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
422 push %rcx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
423 shr $16, %ecx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
424 call m68k_write_word |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
425 pop %rcx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
426 pop %rdi |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
427 add $2, %rdi |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
428 jmp m68k_write_word |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
429 |
|
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
430 inccycles: |
|
251
4a7ac10ac2d9
Fix target cycle count after 68K interrupt
Mike Pavone <pavone@retrodev.com>
parents:
226
diff
changeset
|
431 cmp %ebp, %eax |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
432 jnb do_limit |
|
251
4a7ac10ac2d9
Fix target cycle count after 68K interrupt
Mike Pavone <pavone@retrodev.com>
parents:
226
diff
changeset
|
433 add $4, %eax |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
434 ret |
|
344
b46771135442
Handle busack across frame boundary
Mike Pavone <pavone@retrodev.com>
parents:
343
diff
changeset
|
435 do_limit: |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
436 call handle_cycle_limit |
|
251
4a7ac10ac2d9
Fix target cycle count after 68K interrupt
Mike Pavone <pavone@retrodev.com>
parents:
226
diff
changeset
|
437 add $4, %eax |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
438 ret |
|
17
de0085d4ea40
Add asssembly runtime code stub
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
439 |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
440 .global m68k_read_word_scratch1 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
441 m68k_read_word_scratch1: |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
442 call inccycles |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
443 and $0xFFFFFF, %rcx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
444 cmp $0x400000, %ecx |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
445 jbe cart |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
446 cmp $0xE00000, %ecx |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
447 jae workram |
|
57
bc3bc7a60c4e
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
Mike Pavone <pavone@retrodev.com>
parents:
54
diff
changeset
|
448 cmp $0xC00000, %ecx |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
449 jae vdp_psg |
|
153
42c031184e8a
Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents:
152
diff
changeset
|
450 cmp $0xA00000, %ecx |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
451 jb not_io |
|
85
1db2a0b655d1
Fix Z80 BUSREQ/RESET implementation.
Mike Pavone <pavone@retrodev.com>
parents:
84
diff
changeset
|
452 cmp $0xA12000, %ecx |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
453 jae not_io |
|
83
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
454 call do_io_read_w |
|
72
7935cd64d5c8
Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents:
66
diff
changeset
|
455 ret |
|
7935cd64d5c8
Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents:
66
diff
changeset
|
456 not_io: |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
457 xor %cx, %cx |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
458 dec %cx |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
459 ret |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
460 workram: |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
461 and $0xFFFF, %rcx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
462 mov (%r9, %rcx), %cx |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
463 ret |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
464 vdp_psg: |
|
57
bc3bc7a60c4e
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
Mike Pavone <pavone@retrodev.com>
parents:
54
diff
changeset
|
465 test $0x2700E0, %ecx |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
466 jnz crash |
|
57
bc3bc7a60c4e
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
Mike Pavone <pavone@retrodev.com>
parents:
54
diff
changeset
|
467 and $0x1F, %ecx |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
468 jmp do_vdp_port_read |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
469 cart: |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
470 mov (%r8, %rcx), %cx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
471 ret |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
472 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
473 .global m68k_read_long_scratch1 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
474 m68k_read_long_scratch1: |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
475 push %rcx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
476 call m68k_read_word_scratch1 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
477 mov %cx, %di |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
478 pop %rcx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
479 add $2, %ecx |
|
84
2d1ae596db7a
Fix long reads from IO ports or long reads that trigger sync cycles by saving rdi. Possibly fix word wide IO reads.
Mike Pavone <pavone@retrodev.com>
parents:
83
diff
changeset
|
480 push %rdi |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
481 call m68k_read_word_scratch1 |
|
84
2d1ae596db7a
Fix long reads from IO ports or long reads that trigger sync cycles by saving rdi. Possibly fix word wide IO reads.
Mike Pavone <pavone@retrodev.com>
parents:
83
diff
changeset
|
482 pop %rdi |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
483 and $0xFFFF, %ecx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
484 shl $16, %edi |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
485 or %edi, %ecx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
486 ret |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
487 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
488 .global m68k_read_byte_scratch1 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
489 m68k_read_byte_scratch1: |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
490 call inccycles |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
491 and $0xFFFFFF, %rcx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
492 cmp $0x400000, %ecx |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
493 jbe cart_b |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
494 cmp $0xE00000, %ecx |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
495 jae workram_b |
| 137 | 496 cmp $0xC00000, %ecx |
| 497 jae vdp_psg_b | |
|
153
42c031184e8a
Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents:
152
diff
changeset
|
498 cmp $0xA00000, %ecx |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
499 jb not_io_b |
|
85
1db2a0b655d1
Fix Z80 BUSREQ/RESET implementation.
Mike Pavone <pavone@retrodev.com>
parents:
84
diff
changeset
|
500 cmp $0xA12000, %ecx |
|
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
501 jae not_io_b |
| 66 | 502 jmp do_io_read |
| 503 not_io_b: | |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
504 xor %cl, %cl |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
505 dec %cl |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
506 ret |
| 137 | 507 vdp_psg_b: |
| 508 test $0x2700E0, %ecx | |
| 509 jnz crash | |
| 510 and $0x1F, %ecx | |
| 511 bt $0, %ecx | |
| 512 jnc vdp_swap | |
| 513 jmp do_vdp_port_read | |
| 514 vdp_swap: | |
| 515 call do_vdp_port_read | |
| 516 shr $8, %cx | |
| 517 ret | |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
518 workram_b: |
|
83
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
519 /* deal with byte swapping */ |
|
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
520 xor $1, %ecx |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
521 and $0xFFFF, %rcx |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
522 mov (%r9, %rcx), %cl |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
523 ret |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
524 cart_b: |
|
83
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
525 /* deal with byte swapping */ |
|
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
526 xor $1, %ecx |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
527 mov (%r8, %rcx), %cl |
|
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
528 ret |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
529 |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
530 .global m68k_modified_ret_addr |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
531 m68k_modified_ret_addr: |
|
145
15b8dce19cf4
Implement m68k_modified_ret_addr
Mike Pavone <pavone@retrodev.com>
parents:
138
diff
changeset
|
532 add $16, %rsp |
|
15b8dce19cf4
Implement m68k_modified_ret_addr
Mike Pavone <pavone@retrodev.com>
parents:
138
diff
changeset
|
533 call m68k_native_addr |
|
15b8dce19cf4
Implement m68k_modified_ret_addr
Mike Pavone <pavone@retrodev.com>
parents:
138
diff
changeset
|
534 jmp *%rcx |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
535 |
|
53
44e661913a51
Add preliminary support for JMP
Mike Pavone <pavone@retrodev.com>
parents:
18
diff
changeset
|
536 dyn_addr_msg: |
|
44e661913a51
Add preliminary support for JMP
Mike Pavone <pavone@retrodev.com>
parents:
18
diff
changeset
|
537 .asciz "Program needs dynamically calculated native address\n" |
|
44e661913a51
Add preliminary support for JMP
Mike Pavone <pavone@retrodev.com>
parents:
18
diff
changeset
|
538 |
|
86
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
539 .global m68k_native_addr_and_sync |
|
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
540 m68k_native_addr_and_sync: |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
541 call m68k_save_context |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
542 push %rcx |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
543 mov %rsi, %rdi |
|
198
209a37eed3e7
Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
544 xor %esi, %esi |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
545 call sync_components |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
546 pop %rsi |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
547 push %rax |
|
95
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
548 mov %rax, %rdi |
|
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
549 call get_native_address_trans |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
550 mov %rax, %rcx |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
551 pop %rsi |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
552 call m68k_load_context |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
553 ret |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
554 |
|
86
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
555 .global m68k_native_addr |
|
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
556 m68k_native_addr: |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
557 call m68k_save_context |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
558 push %rsi |
|
95
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
559 mov %rsi, %rdi |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
560 mov %ecx, %esi |
|
95
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
561 call get_native_address_trans |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
562 mov %rax, %rcx |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
563 pop %rsi |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
564 call m68k_load_context |
|
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
565 ret |
|
193
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
566 |
|
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
567 .global m68k_retrans_stub |
|
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
568 m68k_retrans_stub: |
|
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
569 call m68k_save_context |
|
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
570 push %rsi |
|
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
571 call m68k_retranslate_inst |
|
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
572 pop %rsi |
|
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
573 mov %rax, %rcx |
|
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
574 call m68k_load_context |
|
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
575 jmp *%rcx |
|
53
44e661913a51
Add preliminary support for JMP
Mike Pavone <pavone@retrodev.com>
parents:
18
diff
changeset
|
576 |
|
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
577 .global m68k_save_context |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
578 m68k_save_context: |
|
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
579 mov %bl, 1(%rsi) /* N Flag */ |
| 207 | 580 mov %dl, 2(%rsi) /* Z flag */ |
| 581 mov %bh, 3(%rsi) /* V flag */ | |
|
18
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582 mov %dh, 4(%rsi) /* C flag */ |
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583 mov %r10d, 8(%rsi) /* d0 */ |
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584 mov %r11d, 12(%rsi) /* d1 */ |
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585 mov %r12d, 16(%rsi) /* d2 */ |
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586 mov %r13d, 40(%rsi) /* a0 */ |
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587 mov %r14d, 44(%rsi) /* a1 */ |
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588 mov %r15d, 68(%rsi) /* a7 */ |
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589 mov %eax, 80(%rsi) /* current cycle count */ |
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590 ret |
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591 |
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592 .global m68k_load_context |
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593 m68k_load_context: |
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594 mov 1(%rsi), %bl /* N Flag */ |
| 207 | 595 mov 2(%rsi), %dl /* Z flag */ |
| 596 mov 3(%rsi), %bh /* V flag */ | |
|
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597 mov 4(%rsi), %dh /* C flag */ |
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598 mov 8(%rsi), %r10d /* d0 */ |
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599 mov 12(%rsi), %r11d /* d1 */ |
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600 mov 16(%rsi), %r12d /* d2 */ |
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601 mov 40(%rsi), %r13d /* a0 */ |
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602 mov 44(%rsi), %r14d /* a1 */ |
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603 mov 68(%rsi), %r15d /* a7 */ |
|
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604 mov 76(%rsi), %ebp /* target cycle count */ |
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605 mov 80(%rsi), %eax /* current cycle count */ |
|
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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606 mov 96(%rsi), %r8d /* cartridge address */ |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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607 mov 104(%rsi), %r9d /* work ram address */ |
|
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608 ret |
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609 |
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610 .global m68k_start_context |
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611 m68k_start_context: |
|
208
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612 push %rbp |
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613 push %r12 |
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614 push %r13 |
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615 push %r14 |
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616 push %r15 |
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617 |
|
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618 call m68k_load_context |
|
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619 call *%rdi |
|
209
922b59c09259
Flag fixes for div, negx and not
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620 call m68k_save_context |
|
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621 |
|
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622 pop %r15 |
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623 pop %r14 |
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624 pop %r13 |
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625 pop %r12 |
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626 pop %rbp |
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|
627 |
|
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628 ret |